xref: /openbmc/qemu/hw/hppa/machine.c (revision 6ce18d53)
1 /*
2  * QEMU HPPA hardware system emulator.
3  * (C) Copyright 2018-2023 Helge Deller <deller@gmx.de>
4  *
5  * This work is licensed under the GNU GPL license version 2 or later.
6  */
7 
8 #include "qemu/osdep.h"
9 #include "qemu/datadir.h"
10 #include "cpu.h"
11 #include "elf.h"
12 #include "hw/loader.h"
13 #include "qemu/error-report.h"
14 #include "sysemu/reset.h"
15 #include "sysemu/sysemu.h"
16 #include "sysemu/runstate.h"
17 #include "hw/rtc/mc146818rtc.h"
18 #include "hw/timer/i8254.h"
19 #include "hw/char/serial.h"
20 #include "hw/char/parallel.h"
21 #include "hw/intc/i8259.h"
22 #include "hw/input/lasips2.h"
23 #include "hw/net/lasi_82596.h"
24 #include "hw/nmi.h"
25 #include "hw/usb.h"
26 #include "hw/pci/pci.h"
27 #include "hw/pci/pci_device.h"
28 #include "hw/pci-host/astro.h"
29 #include "hw/pci-host/dino.h"
30 #include "hw/misc/lasi.h"
31 #include "hppa_hardware.h"
32 #include "qemu/units.h"
33 #include "qapi/error.h"
34 #include "net/net.h"
35 #include "qemu/log.h"
36 
37 #define MIN_SEABIOS_HPPA_VERSION 12 /* require at least this fw version */
38 
39 /* Power button address at &PAGE0->pad[4] */
40 #define HPA_POWER_BUTTON (0x40 + 4 * sizeof(uint32_t))
41 
42 #define enable_lasi_lan()       0
43 
44 static DeviceState *lasi_dev;
45 
46 static void hppa_powerdown_req(Notifier *n, void *opaque)
47 {
48     hwaddr soft_power_reg = HPA_POWER_BUTTON;
49     uint32_t val;
50 
51     val = ldl_be_phys(&address_space_memory, soft_power_reg);
52     if ((val >> 8) == 0) {
53         /* immediately shut down when under hardware control */
54         qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
55         return;
56     }
57 
58     /* clear bit 31 to indicate that the power switch was pressed. */
59     val &= ~1;
60     stl_be_phys(&address_space_memory, soft_power_reg, val);
61 }
62 
63 static Notifier hppa_system_powerdown_notifier = {
64     .notify = hppa_powerdown_req
65 };
66 
67 /* Fallback for unassigned PCI I/O operations.  Avoids MCHK.  */
68 static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size)
69 {
70     return 0;
71 }
72 
73 static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size)
74 {
75 }
76 
77 static const MemoryRegionOps hppa_pci_ignore_ops = {
78     .read = ignore_read,
79     .write = ignore_write,
80     .endianness = DEVICE_BIG_ENDIAN,
81     .valid = {
82         .min_access_size = 1,
83         .max_access_size = 8,
84     },
85     .impl = {
86         .min_access_size = 1,
87         .max_access_size = 8,
88     },
89 };
90 
91 static ISABus *hppa_isa_bus(hwaddr addr)
92 {
93     ISABus *isa_bus;
94     qemu_irq *isa_irqs;
95     MemoryRegion *isa_region;
96 
97     isa_region = g_new(MemoryRegion, 1);
98     memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops,
99                           NULL, "isa-io", 0x800);
100     memory_region_add_subregion(get_system_memory(), addr, isa_region);
101 
102     isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region,
103                           &error_abort);
104     isa_irqs = i8259_init(isa_bus, NULL);
105     isa_bus_register_input_irqs(isa_bus, isa_irqs);
106 
107     return isa_bus;
108 }
109 
110 /*
111  * Helper functions to emulate RTC clock and DebugOutputPort
112  */
113 static time_t rtc_ref;
114 
115 static uint64_t io_cpu_read(void *opaque, hwaddr addr, unsigned size)
116 {
117     uint64_t val = 0;
118 
119     switch (addr) {
120     case 0:             /* RTC clock */
121         val = time(NULL);
122         val += rtc_ref;
123         break;
124     case 8:             /* DebugOutputPort */
125         return 0xe9;    /* readback */
126     }
127     return val;
128 }
129 
130 static void io_cpu_write(void *opaque, hwaddr addr,
131                          uint64_t val, unsigned size)
132 {
133     unsigned char ch;
134     Chardev *debugout;
135 
136     switch (addr) {
137     case 0:             /* RTC clock */
138         rtc_ref = val - time(NULL);
139         break;
140     case 8:             /* DebugOutputPort */
141         ch = val;
142         debugout = serial_hd(0);
143         if (debugout) {
144             qemu_chr_fe_write_all(debugout->be, &ch, 1);
145         } else {
146             fprintf(stderr, "%c", ch);
147         }
148         break;
149     }
150 }
151 
152 static const MemoryRegionOps hppa_io_helper_ops = {
153     .read = io_cpu_read,
154     .write = io_cpu_write,
155     .endianness = DEVICE_BIG_ENDIAN,
156     .valid = {
157         .min_access_size = 1,
158         .max_access_size = 8,
159     },
160     .impl = {
161         .min_access_size = 1,
162         .max_access_size = 8,
163     },
164 };
165 
166 typedef uint64_t TranslateFn(void *opaque, uint64_t addr);
167 
168 static uint64_t linux_kernel_virt_to_phys(void *opaque, uint64_t addr)
169 {
170     addr &= (0x10000000 - 1);
171     return addr;
172 }
173 
174 static uint64_t translate_pa10(void *dummy, uint64_t addr)
175 {
176     return (uint32_t)addr;
177 }
178 
179 static uint64_t translate_pa20(void *dummy, uint64_t addr)
180 {
181     return hppa_abs_to_phys_pa2_w0(addr);
182 }
183 
184 static HPPACPU *cpu[HPPA_MAX_CPUS];
185 static uint64_t firmware_entry;
186 
187 static void fw_cfg_boot_set(void *opaque, const char *boot_device,
188                             Error **errp)
189 {
190     fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
191 }
192 
193 static FWCfgState *create_fw_cfg(MachineState *ms, PCIBus *pci_bus,
194                                  hwaddr addr)
195 {
196     FWCfgState *fw_cfg;
197     uint64_t val;
198     const char qemu_version[] = QEMU_VERSION;
199     MachineClass *mc = MACHINE_GET_CLASS(ms);
200     int btlb_entries = HPPA_BTLB_ENTRIES(&cpu[0]->env);
201     int len;
202 
203     fw_cfg = fw_cfg_init_mem(addr, addr + 4);
204     fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus);
205     fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS);
206     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size);
207 
208     val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION);
209     fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version",
210                     g_memdup(&val, sizeof(val)), sizeof(val));
211 
212     val = cpu_to_le64(HPPA_TLB_ENTRIES - btlb_entries);
213     fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries",
214                     g_memdup(&val, sizeof(val)), sizeof(val));
215 
216     val = cpu_to_le64(btlb_entries);
217     fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries",
218                     g_memdup(&val, sizeof(val)), sizeof(val));
219 
220     len = strlen(mc->name) + 1;
221     fw_cfg_add_file(fw_cfg, "/etc/hppa/machine",
222                     g_memdup(mc->name, len), len);
223 
224     val = cpu_to_le64(HPA_POWER_BUTTON);
225     fw_cfg_add_file(fw_cfg, "/etc/hppa/power-button-addr",
226                     g_memdup(&val, sizeof(val)), sizeof(val));
227 
228     val = cpu_to_le64(CPU_HPA + 16);
229     fw_cfg_add_file(fw_cfg, "/etc/hppa/rtc-addr",
230                     g_memdup(&val, sizeof(val)), sizeof(val));
231 
232     val = cpu_to_le64(CPU_HPA + 24);
233     fw_cfg_add_file(fw_cfg, "/etc/hppa/DebugOutputPort",
234                     g_memdup(&val, sizeof(val)), sizeof(val));
235 
236     fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_config.order[0]);
237     qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
238 
239     fw_cfg_add_file(fw_cfg, "/etc/qemu-version",
240                     g_memdup(qemu_version, sizeof(qemu_version)),
241                     sizeof(qemu_version));
242 
243     fw_cfg_add_extra_pci_roots(pci_bus, fw_cfg);
244 
245     return fw_cfg;
246 }
247 
248 static LasiState *lasi_init(void)
249 {
250     DeviceState *dev;
251 
252     dev = qdev_new(TYPE_LASI_CHIP);
253     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
254 
255     return LASI_CHIP(dev);
256 }
257 
258 static DinoState *dino_init(MemoryRegion *addr_space)
259 {
260     DeviceState *dev;
261 
262     dev = qdev_new(TYPE_DINO_PCI_HOST_BRIDGE);
263     object_property_set_link(OBJECT(dev), "memory-as", OBJECT(addr_space),
264                              &error_fatal);
265     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
266 
267     return DINO_PCI_HOST_BRIDGE(dev);
268 }
269 
270 /*
271  * Step 1: Create CPUs and Memory
272  */
273 static TranslateFn *machine_HP_common_init_cpus(MachineState *machine)
274 {
275     MemoryRegion *addr_space = get_system_memory();
276     unsigned int smp_cpus = machine->smp.cpus;
277     TranslateFn *translate;
278     MemoryRegion *cpu_region;
279     uint64_t ram_max;
280 
281     /* Create CPUs.  */
282     for (unsigned int i = 0; i < smp_cpus; i++) {
283         cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type));
284     }
285 
286     /*
287      * For now, treat address layout as if PSW_W is clear.
288      * TODO: create a proper hppa64 board model and load elf64 firmware.
289      */
290     if (hppa_is_pa20(&cpu[0]->env)) {
291         translate = translate_pa20;
292         ram_max = 0xf0000000;      /* 3.75 GB (limited by 32-bit firmware) */
293     } else {
294         translate = translate_pa10;
295         ram_max = 0xf0000000;      /* 3.75 GB (32-bit CPU) */
296     }
297 
298     for (unsigned int i = 0; i < smp_cpus; i++) {
299         g_autofree char *name = g_strdup_printf("cpu%u-io-eir", i);
300 
301         cpu_region = g_new(MemoryRegion, 1);
302         memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops,
303                               cpu[i], name, 4);
304         memory_region_add_subregion(addr_space,
305                                     translate(NULL, CPU_HPA + i * 0x1000),
306                                     cpu_region);
307     }
308 
309     /* RTC and DebugOutputPort on CPU #0 */
310     cpu_region = g_new(MemoryRegion, 1);
311     memory_region_init_io(cpu_region, OBJECT(cpu[0]), &hppa_io_helper_ops,
312                           cpu[0], "cpu0-io-rtc", 2 * sizeof(uint64_t));
313     memory_region_add_subregion(addr_space, translate(NULL, CPU_HPA + 16),
314                                 cpu_region);
315 
316     /* Main memory region. */
317     if (machine->ram_size > ram_max) {
318         info_report("Max RAM size limited to %" PRIu64 " MB", ram_max / MiB);
319         machine->ram_size = ram_max;
320     }
321     memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1);
322 
323     return translate;
324 }
325 
326 /*
327  * Last creation step: Add SCSI discs, NICs, graphics & load firmware
328  */
329 static void machine_HP_common_init_tail(MachineState *machine, PCIBus *pci_bus,
330                                         TranslateFn *translate)
331 {
332     const char *kernel_filename = machine->kernel_filename;
333     const char *kernel_cmdline = machine->kernel_cmdline;
334     const char *initrd_filename = machine->initrd_filename;
335     MachineClass *mc = MACHINE_GET_CLASS(machine);
336     DeviceState *dev;
337     PCIDevice *pci_dev;
338     char *firmware_filename;
339     uint64_t firmware_low, firmware_high;
340     long size;
341     uint64_t kernel_entry = 0, kernel_low, kernel_high;
342     MemoryRegion *addr_space = get_system_memory();
343     MemoryRegion *rom_region;
344     long i;
345     unsigned int smp_cpus = machine->smp.cpus;
346     SysBusDevice *s;
347 
348     /* SCSI disk setup. */
349     if (drive_get_max_bus(IF_SCSI) >= 0) {
350         dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a"));
351         lsi53c8xx_handle_legacy_cmdline(dev);
352     }
353 
354     /* Graphics setup. */
355     if (machine->enable_graphics && vga_interface_type != VGA_NONE) {
356         vga_interface_created = true;
357         dev = qdev_new("artist");
358         s = SYS_BUS_DEVICE(dev);
359         sysbus_realize_and_unref(s, &error_fatal);
360         sysbus_mmio_map(s, 0, translate(NULL, LASI_GFX_HPA));
361         sysbus_mmio_map(s, 1, translate(NULL, ARTIST_FB_ADDR));
362     }
363 
364     /* Network setup. */
365     if (nd_table[0].used && enable_lasi_lan()) {
366         lasi_82596_init(addr_space, translate(NULL, LASI_LAN_HPA),
367                         qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA));
368     }
369 
370     for (i = 0; i < nb_nics; i++) {
371         if (!enable_lasi_lan()) {
372             pci_nic_init_nofail(&nd_table[i], pci_bus, mc->default_nic, NULL);
373         }
374     }
375 
376     /* BMC board: HP Powerbar SP2 Diva (with console only) */
377     pci_dev = pci_new(-1, "pci-serial");
378     if (!lasi_dev) {
379         /* bind default keyboard/serial to Diva card */
380         qdev_prop_set_chr(DEVICE(pci_dev), "chardev", serial_hd(0));
381     }
382     qdev_prop_set_uint8(DEVICE(pci_dev), "prog_if", 0);
383     pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
384     pci_config_set_vendor_id(pci_dev->config, PCI_VENDOR_ID_HP);
385     pci_config_set_device_id(pci_dev->config, 0x1048);
386     pci_set_word(&pci_dev->config[PCI_SUBSYSTEM_VENDOR_ID], PCI_VENDOR_ID_HP);
387     pci_set_word(&pci_dev->config[PCI_SUBSYSTEM_ID], 0x1227); /* Powerbar */
388 
389     /* create a second serial PCI card when running Astro */
390     if (serial_hd(1) && !lasi_dev) {
391         pci_dev = pci_new(-1, "pci-serial-4x");
392         qdev_prop_set_chr(DEVICE(pci_dev), "chardev1", serial_hd(1));
393         qdev_prop_set_chr(DEVICE(pci_dev), "chardev2", serial_hd(2));
394         qdev_prop_set_chr(DEVICE(pci_dev), "chardev3", serial_hd(3));
395         qdev_prop_set_chr(DEVICE(pci_dev), "chardev4", serial_hd(4));
396         pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
397     }
398 
399     /* create USB OHCI controller for USB keyboard & mouse on Astro machines */
400     if (!lasi_dev && machine->enable_graphics) {
401         pci_create_simple(pci_bus, -1, "pci-ohci");
402         usb_create_simple(usb_bus_find(-1), "usb-kbd");
403         usb_create_simple(usb_bus_find(-1), "usb-mouse");
404     }
405 
406     /* register power switch emulation */
407     qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier);
408 
409     /* fw_cfg configuration interface */
410     create_fw_cfg(machine, pci_bus, translate(NULL, FW_CFG_IO_BASE));
411 
412     /* Load firmware.  Given that this is not "real" firmware,
413        but one explicitly written for the emulation, we might as
414        well load it directly from an ELF image.  */
415     firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
416                                        machine->firmware ?: "hppa-firmware.img");
417     if (firmware_filename == NULL) {
418         error_report("no firmware provided");
419         exit(1);
420     }
421 
422     size = load_elf(firmware_filename, NULL, translate, NULL,
423                     &firmware_entry, &firmware_low, &firmware_high, NULL,
424                     true, EM_PARISC, 0, 0);
425 
426     if (size < 0) {
427         error_report("could not load firmware '%s'", firmware_filename);
428         exit(1);
429     }
430     qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64
431                   "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n",
432                   firmware_low, firmware_high, firmware_entry);
433     if (firmware_low < translate(NULL, FIRMWARE_START) ||
434         firmware_high >= translate(NULL, FIRMWARE_END)) {
435         error_report("Firmware overlaps with memory or IO space");
436         exit(1);
437     }
438     g_free(firmware_filename);
439 
440     rom_region = g_new(MemoryRegion, 1);
441     memory_region_init_ram(rom_region, NULL, "firmware",
442                            (FIRMWARE_END - FIRMWARE_START), &error_fatal);
443     memory_region_add_subregion(addr_space,
444                                 translate(NULL, FIRMWARE_START), rom_region);
445 
446     /* Load kernel */
447     if (kernel_filename) {
448         size = load_elf(kernel_filename, NULL, linux_kernel_virt_to_phys,
449                         NULL, &kernel_entry, &kernel_low, &kernel_high, NULL,
450                         true, EM_PARISC, 0, 0);
451 
452         kernel_entry = linux_kernel_virt_to_phys(NULL, kernel_entry);
453 
454         if (size < 0) {
455             error_report("could not load kernel '%s'", kernel_filename);
456             exit(1);
457         }
458         qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64
459                       "-0x%08" PRIx64 ", entry at 0x%08" PRIx64
460                       ", size %" PRIu64 " kB\n",
461                       kernel_low, kernel_high, kernel_entry, size / KiB);
462 
463         if (kernel_cmdline) {
464             cpu[0]->env.gr[24] = 0x4000;
465             pstrcpy_targphys("cmdline", cpu[0]->env.gr[24],
466                              TARGET_PAGE_SIZE, kernel_cmdline);
467         }
468 
469         if (initrd_filename) {
470             ram_addr_t initrd_base;
471             int64_t initrd_size;
472 
473             initrd_size = get_image_size(initrd_filename);
474             if (initrd_size < 0) {
475                 error_report("could not load initial ram disk '%s'",
476                              initrd_filename);
477                 exit(1);
478             }
479 
480             /* Load the initrd image high in memory.
481                Mirror the algorithm used by palo:
482                (1) Due to sign-extension problems and PDC,
483                put the initrd no higher than 1G.
484                (2) Reserve 64k for stack.  */
485             initrd_base = MIN(machine->ram_size, 1 * GiB);
486             initrd_base = initrd_base - 64 * KiB;
487             initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK;
488 
489             if (initrd_base < kernel_high) {
490                 error_report("kernel and initial ram disk too large!");
491                 exit(1);
492             }
493 
494             load_image_targphys(initrd_filename, initrd_base, initrd_size);
495             cpu[0]->env.gr[23] = initrd_base;
496             cpu[0]->env.gr[22] = initrd_base + initrd_size;
497         }
498     }
499 
500     if (!kernel_entry) {
501         /* When booting via firmware, tell firmware if we want interactive
502          * mode (kernel_entry=1), and to boot from CD (gr[24]='d')
503          * or hard disc * (gr[24]='c').
504          */
505         kernel_entry = machine->boot_config.has_menu ? machine->boot_config.menu : 0;
506         cpu[0]->env.gr[24] = machine->boot_config.order[0];
507     }
508 
509     /* We jump to the firmware entry routine and pass the
510      * various parameters in registers. After firmware initialization,
511      * firmware will start the Linux kernel with ramdisk and cmdline.
512      */
513     cpu[0]->env.gr[26] = machine->ram_size;
514     cpu[0]->env.gr[25] = kernel_entry;
515 
516     /* tell firmware how many SMP CPUs to present in inventory table */
517     cpu[0]->env.gr[21] = smp_cpus;
518 
519     /* tell firmware fw_cfg port */
520     cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
521 }
522 
523 /*
524  * Create HP B160L workstation
525  */
526 static void machine_HP_B160L_init(MachineState *machine)
527 {
528     DeviceState *dev, *dino_dev;
529     MemoryRegion *addr_space = get_system_memory();
530     TranslateFn *translate;
531     ISABus *isa_bus;
532     PCIBus *pci_bus;
533 
534     /* Create CPUs and RAM.  */
535     translate = machine_HP_common_init_cpus(machine);
536 
537     if (hppa_is_pa20(&cpu[0]->env)) {
538         error_report("The HP B160L workstation requires a 32-bit "
539                      "CPU. Use '-machine C3700' instead.");
540         exit(1);
541     }
542 
543     /* Init Lasi chip */
544     lasi_dev = DEVICE(lasi_init());
545     memory_region_add_subregion(addr_space, translate(NULL, LASI_HPA),
546                                 sysbus_mmio_get_region(
547                                     SYS_BUS_DEVICE(lasi_dev), 0));
548 
549     /* Init Dino (PCI host bus chip).  */
550     dino_dev = DEVICE(dino_init(addr_space));
551     memory_region_add_subregion(addr_space, translate(NULL, DINO_HPA),
552                                 sysbus_mmio_get_region(
553                                     SYS_BUS_DEVICE(dino_dev), 0));
554     pci_bus = PCI_BUS(qdev_get_child_bus(dino_dev, "pci"));
555     assert(pci_bus);
556 
557     /* Create ISA bus, needed for PS/2 kbd/mouse port emulation */
558     isa_bus = hppa_isa_bus(translate(NULL, IDE_HPA));
559     assert(isa_bus);
560 
561     /* Serial ports: Lasi and Dino use a 7.272727 MHz clock. */
562     serial_mm_init(addr_space, translate(NULL, LASI_UART_HPA + 0x800), 0,
563         qdev_get_gpio_in(lasi_dev, LASI_IRQ_UART_HPA), 7272727 / 16,
564         serial_hd(0), DEVICE_BIG_ENDIAN);
565 
566     serial_mm_init(addr_space, translate(NULL, DINO_UART_HPA + 0x800), 0,
567         qdev_get_gpio_in(dino_dev, DINO_IRQ_RS232INT), 7272727 / 16,
568         serial_hd(1), DEVICE_BIG_ENDIAN);
569 
570     /* Parallel port */
571     parallel_mm_init(addr_space, translate(NULL, LASI_LPT_HPA + 0x800), 0,
572                      qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA),
573                      parallel_hds[0]);
574 
575     /* PS/2 Keyboard/Mouse */
576     dev = qdev_new(TYPE_LASIPS2);
577     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
578     sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
579                        qdev_get_gpio_in(lasi_dev, LASI_IRQ_PS2KBD_HPA));
580     memory_region_add_subregion(addr_space,
581                                 translate(NULL, LASI_PS2KBD_HPA),
582                                 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev),
583                                                        0));
584     memory_region_add_subregion(addr_space,
585                                 translate(NULL, LASI_PS2KBD_HPA + 0x100),
586                                 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev),
587                                                        1));
588 
589     /* Add SCSI discs, NICs, graphics & load firmware */
590     machine_HP_common_init_tail(machine, pci_bus, translate);
591 }
592 
593 static AstroState *astro_init(void)
594 {
595     DeviceState *dev;
596 
597     dev = qdev_new(TYPE_ASTRO_CHIP);
598     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
599 
600     return ASTRO_CHIP(dev);
601 }
602 
603 /*
604  * Create HP C3700 workstation
605  */
606 static void machine_HP_C3700_init(MachineState *machine)
607 {
608     PCIBus *pci_bus;
609     AstroState *astro;
610     DeviceState *astro_dev;
611     MemoryRegion *addr_space = get_system_memory();
612     TranslateFn *translate;
613 
614     /* Create CPUs and RAM.  */
615     translate = machine_HP_common_init_cpus(machine);
616 
617     if (!hppa_is_pa20(&cpu[0]->env)) {
618         error_report("The HP C3000 workstation requires a 64-bit CPU. "
619                      "Use '-machine B160L' instead.");
620         exit(1);
621     }
622 
623     /* Init Astro and the Elroys (PCI host bus chips).  */
624     astro = astro_init();
625     astro_dev = DEVICE(astro);
626     memory_region_add_subregion(addr_space, translate(NULL, ASTRO_HPA),
627                                 sysbus_mmio_get_region(
628                                     SYS_BUS_DEVICE(astro_dev), 0));
629     pci_bus = PCI_BUS(qdev_get_child_bus(DEVICE(astro->elroy[0]), "pci"));
630     assert(pci_bus);
631 
632     /* Add SCSI discs, NICs, graphics & load firmware */
633     machine_HP_common_init_tail(machine, pci_bus, translate);
634 }
635 
636 static void hppa_machine_reset(MachineState *ms, ShutdownCause reason)
637 {
638     unsigned int smp_cpus = ms->smp.cpus;
639     int i;
640 
641     qemu_devices_reset(reason);
642 
643     /* Start all CPUs at the firmware entry point.
644      *  Monarch CPU will initialize firmware, secondary CPUs
645      *  will enter a small idle loop and wait for rendevouz. */
646     for (i = 0; i < smp_cpus; i++) {
647         CPUState *cs = CPU(cpu[i]);
648 
649         cpu_set_pc(cs, firmware_entry);
650         cpu[i]->env.psw = PSW_Q;
651         cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000;
652 
653         cs->exception_index = -1;
654         cs->halted = 0;
655     }
656 
657     /* already initialized by machine_hppa_init()? */
658     if (cpu[0]->env.gr[26] == ms->ram_size) {
659         return;
660     }
661 
662     cpu[0]->env.gr[26] = ms->ram_size;
663     cpu[0]->env.gr[25] = 0; /* no firmware boot menu */
664     cpu[0]->env.gr[24] = 'c';
665     /* gr22/gr23 unused, no initrd while reboot. */
666     cpu[0]->env.gr[21] = smp_cpus;
667     /* tell firmware fw_cfg port */
668     cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
669 }
670 
671 static void hppa_nmi(NMIState *n, int cpu_index, Error **errp)
672 {
673     CPUState *cs;
674 
675     CPU_FOREACH(cs) {
676         cpu_interrupt(cs, CPU_INTERRUPT_NMI);
677     }
678 }
679 
680 static void HP_B160L_machine_init_class_init(ObjectClass *oc, void *data)
681 {
682     static const char * const valid_cpu_types[] = {
683         TYPE_HPPA_CPU,
684         NULL
685     };
686     MachineClass *mc = MACHINE_CLASS(oc);
687     NMIClass *nc = NMI_CLASS(oc);
688 
689     mc->desc = "HP B160L workstation";
690     mc->default_cpu_type = TYPE_HPPA_CPU;
691     mc->valid_cpu_types = valid_cpu_types;
692     mc->init = machine_HP_B160L_init;
693     mc->reset = hppa_machine_reset;
694     mc->block_default_type = IF_SCSI;
695     mc->max_cpus = HPPA_MAX_CPUS;
696     mc->default_cpus = 1;
697     mc->is_default = true;
698     mc->default_ram_size = 512 * MiB;
699     mc->default_boot_order = "cd";
700     mc->default_ram_id = "ram";
701     mc->default_nic = "tulip";
702 
703     nc->nmi_monitor_handler = hppa_nmi;
704 }
705 
706 static const TypeInfo HP_B160L_machine_init_typeinfo = {
707     .name = MACHINE_TYPE_NAME("B160L"),
708     .parent = TYPE_MACHINE,
709     .class_init = HP_B160L_machine_init_class_init,
710     .interfaces = (InterfaceInfo[]) {
711         { TYPE_NMI },
712         { }
713     },
714 };
715 
716 static void HP_C3700_machine_init_class_init(ObjectClass *oc, void *data)
717 {
718     static const char * const valid_cpu_types[] = {
719         TYPE_HPPA64_CPU,
720         NULL
721     };
722     MachineClass *mc = MACHINE_CLASS(oc);
723     NMIClass *nc = NMI_CLASS(oc);
724 
725     mc->desc = "HP C3700 workstation";
726     mc->default_cpu_type = TYPE_HPPA64_CPU;
727     mc->valid_cpu_types = valid_cpu_types;
728     mc->init = machine_HP_C3700_init;
729     mc->reset = hppa_machine_reset;
730     mc->block_default_type = IF_SCSI;
731     mc->max_cpus = HPPA_MAX_CPUS;
732     mc->default_cpus = 1;
733     mc->is_default = false;
734     mc->default_ram_size = 1024 * MiB;
735     mc->default_boot_order = "cd";
736     mc->default_ram_id = "ram";
737     mc->default_nic = "tulip";
738 
739     nc->nmi_monitor_handler = hppa_nmi;
740 }
741 
742 static const TypeInfo HP_C3700_machine_init_typeinfo = {
743     .name = MACHINE_TYPE_NAME("C3700"),
744     .parent = TYPE_MACHINE,
745     .class_init = HP_C3700_machine_init_class_init,
746     .interfaces = (InterfaceInfo[]) {
747         { TYPE_NMI },
748         { }
749     },
750 };
751 
752 static void hppa_machine_init_register_types(void)
753 {
754     type_register_static(&HP_B160L_machine_init_typeinfo);
755     type_register_static(&HP_C3700_machine_init_typeinfo);
756 }
757 
758 type_init(hppa_machine_init_register_types)
759