1 /* 2 * QEMU HPPA hardware system emulator. 3 * (C) Copyright 2018-2023 Helge Deller <deller@gmx.de> 4 * 5 * This work is licensed under the GNU GPL license version 2 or later. 6 */ 7 8 #include "qemu/osdep.h" 9 #include "qemu/datadir.h" 10 #include "cpu.h" 11 #include "elf.h" 12 #include "hw/loader.h" 13 #include "qemu/error-report.h" 14 #include "sysemu/reset.h" 15 #include "sysemu/sysemu.h" 16 #include "sysemu/runstate.h" 17 #include "hw/rtc/mc146818rtc.h" 18 #include "hw/timer/i8254.h" 19 #include "hw/char/serial.h" 20 #include "hw/char/parallel.h" 21 #include "hw/intc/i8259.h" 22 #include "hw/input/lasips2.h" 23 #include "hw/net/lasi_82596.h" 24 #include "hw/nmi.h" 25 #include "hw/usb.h" 26 #include "hw/pci/pci.h" 27 #include "hw/pci/pci_device.h" 28 #include "hw/pci-host/astro.h" 29 #include "hw/pci-host/dino.h" 30 #include "hw/misc/lasi.h" 31 #include "hppa_hardware.h" 32 #include "qemu/units.h" 33 #include "qapi/error.h" 34 #include "net/net.h" 35 #include "qemu/log.h" 36 37 #define MIN_SEABIOS_HPPA_VERSION 10 /* require at least this fw version */ 38 39 #define HPA_POWER_BUTTON (FIRMWARE_END - 0x10) 40 41 #define enable_lasi_lan() 0 42 43 static DeviceState *lasi_dev; 44 45 static void hppa_powerdown_req(Notifier *n, void *opaque) 46 { 47 hwaddr soft_power_reg = HPA_POWER_BUTTON; 48 uint32_t val; 49 50 val = ldl_be_phys(&address_space_memory, soft_power_reg); 51 if ((val >> 8) == 0) { 52 /* immediately shut down when under hardware control */ 53 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); 54 return; 55 } 56 57 /* clear bit 31 to indicate that the power switch was pressed. */ 58 val &= ~1; 59 stl_be_phys(&address_space_memory, soft_power_reg, val); 60 } 61 62 static Notifier hppa_system_powerdown_notifier = { 63 .notify = hppa_powerdown_req 64 }; 65 66 /* Fallback for unassigned PCI I/O operations. Avoids MCHK. */ 67 static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size) 68 { 69 return 0; 70 } 71 72 static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size) 73 { 74 } 75 76 static const MemoryRegionOps hppa_pci_ignore_ops = { 77 .read = ignore_read, 78 .write = ignore_write, 79 .endianness = DEVICE_BIG_ENDIAN, 80 .valid = { 81 .min_access_size = 1, 82 .max_access_size = 8, 83 }, 84 .impl = { 85 .min_access_size = 1, 86 .max_access_size = 8, 87 }, 88 }; 89 90 static ISABus *hppa_isa_bus(void) 91 { 92 ISABus *isa_bus; 93 qemu_irq *isa_irqs; 94 MemoryRegion *isa_region; 95 96 isa_region = g_new(MemoryRegion, 1); 97 memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops, 98 NULL, "isa-io", 0x800); 99 memory_region_add_subregion(get_system_memory(), IDE_HPA, 100 isa_region); 101 102 isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region, 103 &error_abort); 104 isa_irqs = i8259_init(isa_bus, NULL); 105 isa_bus_register_input_irqs(isa_bus, isa_irqs); 106 107 return isa_bus; 108 } 109 110 /* 111 * Helper functions to emulate RTC clock and DebugOutputPort 112 */ 113 static time_t rtc_ref; 114 115 static uint64_t io_cpu_read(void *opaque, hwaddr addr, unsigned size) 116 { 117 uint64_t val = 0; 118 119 switch (addr) { 120 case 0: /* RTC clock */ 121 val = time(NULL); 122 val += rtc_ref; 123 break; 124 case 8: /* DebugOutputPort */ 125 return 0xe9; /* readback */ 126 } 127 return val; 128 } 129 130 static void io_cpu_write(void *opaque, hwaddr addr, 131 uint64_t val, unsigned size) 132 { 133 unsigned char ch; 134 Chardev *debugout; 135 136 switch (addr) { 137 case 0: /* RTC clock */ 138 rtc_ref = val - time(NULL); 139 break; 140 case 8: /* DebugOutputPort */ 141 ch = val; 142 debugout = serial_hd(0); 143 if (debugout) { 144 qemu_chr_fe_write_all(debugout->be, &ch, 1); 145 } else { 146 fprintf(stderr, "%c", ch); 147 } 148 break; 149 } 150 } 151 152 static const MemoryRegionOps hppa_io_helper_ops = { 153 .read = io_cpu_read, 154 .write = io_cpu_write, 155 .endianness = DEVICE_BIG_ENDIAN, 156 .valid = { 157 .min_access_size = 1, 158 .max_access_size = 8, 159 }, 160 .impl = { 161 .min_access_size = 1, 162 .max_access_size = 8, 163 }, 164 }; 165 166 167 static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr) 168 { 169 addr &= (0x10000000 - 1); 170 return addr; 171 } 172 173 static HPPACPU *cpu[HPPA_MAX_CPUS]; 174 static uint64_t firmware_entry; 175 176 static void fw_cfg_boot_set(void *opaque, const char *boot_device, 177 Error **errp) 178 { 179 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); 180 } 181 182 static FWCfgState *create_fw_cfg(MachineState *ms, PCIBus *pci_bus) 183 { 184 FWCfgState *fw_cfg; 185 uint64_t val; 186 const char qemu_version[] = QEMU_VERSION; 187 MachineClass *mc = MACHINE_GET_CLASS(ms); 188 int len; 189 190 fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4); 191 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus); 192 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS); 193 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size); 194 195 val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION); 196 fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version", 197 g_memdup(&val, sizeof(val)), sizeof(val)); 198 199 val = cpu_to_le64(HPPA_TLB_ENTRIES - HPPA_BTLB_ENTRIES); 200 fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries", 201 g_memdup(&val, sizeof(val)), sizeof(val)); 202 203 val = cpu_to_le64(HPPA_BTLB_ENTRIES); 204 fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries", 205 g_memdup(&val, sizeof(val)), sizeof(val)); 206 207 len = strlen(mc->name) + 1; 208 fw_cfg_add_file(fw_cfg, "/etc/hppa/machine", 209 g_memdup(mc->name, len), len); 210 211 val = cpu_to_le64(HPA_POWER_BUTTON); 212 fw_cfg_add_file(fw_cfg, "/etc/hppa/power-button-addr", 213 g_memdup(&val, sizeof(val)), sizeof(val)); 214 215 val = cpu_to_le64(CPU_HPA + 16); 216 fw_cfg_add_file(fw_cfg, "/etc/hppa/rtc-addr", 217 g_memdup(&val, sizeof(val)), sizeof(val)); 218 219 val = cpu_to_le64(CPU_HPA + 24); 220 fw_cfg_add_file(fw_cfg, "/etc/hppa/DebugOutputPort", 221 g_memdup(&val, sizeof(val)), sizeof(val)); 222 223 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_config.order[0]); 224 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); 225 226 fw_cfg_add_file(fw_cfg, "/etc/qemu-version", 227 g_memdup(qemu_version, sizeof(qemu_version)), 228 sizeof(qemu_version)); 229 230 fw_cfg_add_extra_pci_roots(pci_bus, fw_cfg); 231 232 return fw_cfg; 233 } 234 235 static LasiState *lasi_init(void) 236 { 237 DeviceState *dev; 238 239 dev = qdev_new(TYPE_LASI_CHIP); 240 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 241 242 return LASI_CHIP(dev); 243 } 244 245 static DinoState *dino_init(MemoryRegion *addr_space) 246 { 247 DeviceState *dev; 248 249 dev = qdev_new(TYPE_DINO_PCI_HOST_BRIDGE); 250 object_property_set_link(OBJECT(dev), "memory-as", OBJECT(addr_space), 251 &error_fatal); 252 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 253 254 return DINO_PCI_HOST_BRIDGE(dev); 255 } 256 257 /* 258 * Step 1: Create CPUs and Memory 259 */ 260 static void machine_HP_common_init_cpus(MachineState *machine) 261 { 262 MemoryRegion *addr_space = get_system_memory(); 263 MemoryRegion *cpu_region; 264 long i; 265 unsigned int smp_cpus = machine->smp.cpus; 266 char *name; 267 268 /* Create CPUs. */ 269 for (i = 0; i < smp_cpus; i++) { 270 name = g_strdup_printf("cpu%ld-io-eir", i); 271 cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type)); 272 273 cpu_region = g_new(MemoryRegion, 1); 274 memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops, 275 cpu[i], name, 4); 276 memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000, 277 cpu_region); 278 g_free(name); 279 } 280 281 /* RTC and DebugOutputPort on CPU #0 */ 282 cpu_region = g_new(MemoryRegion, 1); 283 memory_region_init_io(cpu_region, OBJECT(cpu[0]), &hppa_io_helper_ops, 284 cpu[0], "cpu0-io-rtc", 2 * sizeof(uint64_t)); 285 memory_region_add_subregion(addr_space, CPU_HPA + 16, cpu_region); 286 287 /* Main memory region. */ 288 if (machine->ram_size > 3 * GiB) { 289 error_report("RAM size is currently restricted to 3GB"); 290 exit(EXIT_FAILURE); 291 } 292 memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1); 293 } 294 295 /* 296 * Last creation step: Add SCSI discs, NICs, graphics & load firmware 297 */ 298 static void machine_HP_common_init_tail(MachineState *machine, PCIBus *pci_bus) 299 { 300 const char *kernel_filename = machine->kernel_filename; 301 const char *kernel_cmdline = machine->kernel_cmdline; 302 const char *initrd_filename = machine->initrd_filename; 303 MachineClass *mc = MACHINE_GET_CLASS(machine); 304 DeviceState *dev; 305 PCIDevice *pci_dev; 306 char *firmware_filename; 307 uint64_t firmware_low, firmware_high; 308 long size; 309 uint64_t kernel_entry = 0, kernel_low, kernel_high; 310 MemoryRegion *addr_space = get_system_memory(); 311 MemoryRegion *rom_region; 312 long i; 313 unsigned int smp_cpus = machine->smp.cpus; 314 SysBusDevice *s; 315 316 /* SCSI disk setup. */ 317 dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a")); 318 lsi53c8xx_handle_legacy_cmdline(dev); 319 320 /* Graphics setup. */ 321 if (machine->enable_graphics && vga_interface_type != VGA_NONE) { 322 vga_interface_created = true; 323 dev = qdev_new("artist"); 324 s = SYS_BUS_DEVICE(dev); 325 sysbus_realize_and_unref(s, &error_fatal); 326 sysbus_mmio_map(s, 0, LASI_GFX_HPA); 327 sysbus_mmio_map(s, 1, ARTIST_FB_ADDR); 328 } 329 330 /* Network setup. */ 331 if (enable_lasi_lan()) { 332 lasi_82596_init(addr_space, LASI_LAN_HPA, 333 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA)); 334 } 335 336 for (i = 0; i < nb_nics; i++) { 337 if (!enable_lasi_lan()) { 338 pci_nic_init_nofail(&nd_table[i], pci_bus, mc->default_nic, NULL); 339 } 340 } 341 342 /* BMC board: HP Powerbar SP2 Diva (with console only) */ 343 pci_dev = pci_new(-1, "pci-serial"); 344 if (!lasi_dev) { 345 /* bind default keyboard/serial to Diva card */ 346 qdev_prop_set_chr(DEVICE(pci_dev), "chardev", serial_hd(0)); 347 } 348 qdev_prop_set_uint8(DEVICE(pci_dev), "prog_if", 0); 349 pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); 350 pci_config_set_vendor_id(pci_dev->config, PCI_VENDOR_ID_HP); 351 pci_config_set_device_id(pci_dev->config, 0x1048); 352 pci_set_word(&pci_dev->config[PCI_SUBSYSTEM_VENDOR_ID], PCI_VENDOR_ID_HP); 353 pci_set_word(&pci_dev->config[PCI_SUBSYSTEM_ID], 0x1227); /* Powerbar */ 354 355 /* create a second serial PCI card when running Astro */ 356 if (!lasi_dev) { 357 pci_dev = pci_new(-1, "pci-serial-4x"); 358 qdev_prop_set_chr(DEVICE(pci_dev), "chardev1", serial_hd(1)); 359 qdev_prop_set_chr(DEVICE(pci_dev), "chardev2", serial_hd(2)); 360 qdev_prop_set_chr(DEVICE(pci_dev), "chardev3", serial_hd(3)); 361 qdev_prop_set_chr(DEVICE(pci_dev), "chardev4", serial_hd(4)); 362 pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); 363 } 364 365 /* create USB OHCI controller for USB keyboard & mouse on Astro machines */ 366 if (!lasi_dev && machine->enable_graphics) { 367 pci_create_simple(pci_bus, -1, "pci-ohci"); 368 usb_create_simple(usb_bus_find(-1), "usb-kbd"); 369 usb_create_simple(usb_bus_find(-1), "usb-mouse"); 370 } 371 372 /* register power switch emulation */ 373 qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier); 374 375 /* fw_cfg configuration interface */ 376 create_fw_cfg(machine, pci_bus); 377 378 /* Load firmware. Given that this is not "real" firmware, 379 but one explicitly written for the emulation, we might as 380 well load it directly from an ELF image. */ 381 firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, 382 machine->firmware ?: "hppa-firmware.img"); 383 if (firmware_filename == NULL) { 384 error_report("no firmware provided"); 385 exit(1); 386 } 387 388 size = load_elf(firmware_filename, NULL, NULL, NULL, 389 &firmware_entry, &firmware_low, &firmware_high, NULL, 390 true, EM_PARISC, 0, 0); 391 392 /* Unfortunately, load_elf sign-extends reading elf32. */ 393 firmware_entry = (target_ureg)firmware_entry; 394 firmware_low = (target_ureg)firmware_low; 395 firmware_high = (target_ureg)firmware_high; 396 397 if (size < 0) { 398 error_report("could not load firmware '%s'", firmware_filename); 399 exit(1); 400 } 401 qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64 402 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n", 403 firmware_low, firmware_high, firmware_entry); 404 if (firmware_low < FIRMWARE_START || firmware_high >= FIRMWARE_END) { 405 error_report("Firmware overlaps with memory or IO space"); 406 exit(1); 407 } 408 g_free(firmware_filename); 409 410 rom_region = g_new(MemoryRegion, 1); 411 memory_region_init_ram(rom_region, NULL, "firmware", 412 (FIRMWARE_END - FIRMWARE_START), &error_fatal); 413 memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region); 414 415 /* Load kernel */ 416 if (kernel_filename) { 417 size = load_elf(kernel_filename, NULL, &cpu_hppa_to_phys, 418 NULL, &kernel_entry, &kernel_low, &kernel_high, NULL, 419 true, EM_PARISC, 0, 0); 420 421 /* Unfortunately, load_elf sign-extends reading elf32. */ 422 kernel_entry = (target_ureg) cpu_hppa_to_phys(NULL, kernel_entry); 423 kernel_low = (target_ureg)kernel_low; 424 kernel_high = (target_ureg)kernel_high; 425 426 if (size < 0) { 427 error_report("could not load kernel '%s'", kernel_filename); 428 exit(1); 429 } 430 qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64 431 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 432 ", size %" PRIu64 " kB\n", 433 kernel_low, kernel_high, kernel_entry, size / KiB); 434 435 if (kernel_cmdline) { 436 cpu[0]->env.gr[24] = 0x4000; 437 pstrcpy_targphys("cmdline", cpu[0]->env.gr[24], 438 TARGET_PAGE_SIZE, kernel_cmdline); 439 } 440 441 if (initrd_filename) { 442 ram_addr_t initrd_base; 443 int64_t initrd_size; 444 445 initrd_size = get_image_size(initrd_filename); 446 if (initrd_size < 0) { 447 error_report("could not load initial ram disk '%s'", 448 initrd_filename); 449 exit(1); 450 } 451 452 /* Load the initrd image high in memory. 453 Mirror the algorithm used by palo: 454 (1) Due to sign-extension problems and PDC, 455 put the initrd no higher than 1G. 456 (2) Reserve 64k for stack. */ 457 initrd_base = MIN(machine->ram_size, 1 * GiB); 458 initrd_base = initrd_base - 64 * KiB; 459 initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK; 460 461 if (initrd_base < kernel_high) { 462 error_report("kernel and initial ram disk too large!"); 463 exit(1); 464 } 465 466 load_image_targphys(initrd_filename, initrd_base, initrd_size); 467 cpu[0]->env.gr[23] = initrd_base; 468 cpu[0]->env.gr[22] = initrd_base + initrd_size; 469 } 470 } 471 472 if (!kernel_entry) { 473 /* When booting via firmware, tell firmware if we want interactive 474 * mode (kernel_entry=1), and to boot from CD (gr[24]='d') 475 * or hard disc * (gr[24]='c'). 476 */ 477 kernel_entry = machine->boot_config.has_menu ? machine->boot_config.menu : 0; 478 cpu[0]->env.gr[24] = machine->boot_config.order[0]; 479 } 480 481 /* We jump to the firmware entry routine and pass the 482 * various parameters in registers. After firmware initialization, 483 * firmware will start the Linux kernel with ramdisk and cmdline. 484 */ 485 cpu[0]->env.gr[26] = machine->ram_size; 486 cpu[0]->env.gr[25] = kernel_entry; 487 488 /* tell firmware how many SMP CPUs to present in inventory table */ 489 cpu[0]->env.gr[21] = smp_cpus; 490 491 /* tell firmware fw_cfg port */ 492 cpu[0]->env.gr[19] = FW_CFG_IO_BASE; 493 } 494 495 /* 496 * Create HP B160L workstation 497 */ 498 static void machine_HP_B160L_init(MachineState *machine) 499 { 500 DeviceState *dev, *dino_dev; 501 MemoryRegion *addr_space = get_system_memory(); 502 ISABus *isa_bus; 503 PCIBus *pci_bus; 504 505 /* Create CPUs and RAM. */ 506 machine_HP_common_init_cpus(machine); 507 508 /* Init Lasi chip */ 509 lasi_dev = DEVICE(lasi_init()); 510 memory_region_add_subregion(addr_space, LASI_HPA, 511 sysbus_mmio_get_region( 512 SYS_BUS_DEVICE(lasi_dev), 0)); 513 514 /* Init Dino (PCI host bus chip). */ 515 dino_dev = DEVICE(dino_init(addr_space)); 516 memory_region_add_subregion(addr_space, DINO_HPA, 517 sysbus_mmio_get_region( 518 SYS_BUS_DEVICE(dino_dev), 0)); 519 pci_bus = PCI_BUS(qdev_get_child_bus(dino_dev, "pci")); 520 assert(pci_bus); 521 522 /* Create ISA bus, needed for PS/2 kbd/mouse port emulation */ 523 isa_bus = hppa_isa_bus(); 524 assert(isa_bus); 525 526 /* Serial ports: Lasi and Dino use a 7.272727 MHz clock. */ 527 serial_mm_init(addr_space, LASI_UART_HPA + 0x800, 0, 528 qdev_get_gpio_in(lasi_dev, LASI_IRQ_UART_HPA), 7272727 / 16, 529 serial_hd(0), DEVICE_BIG_ENDIAN); 530 531 serial_mm_init(addr_space, DINO_UART_HPA + 0x800, 0, 532 qdev_get_gpio_in(dino_dev, DINO_IRQ_RS232INT), 7272727 / 16, 533 serial_hd(1), DEVICE_BIG_ENDIAN); 534 535 /* Parallel port */ 536 parallel_mm_init(addr_space, LASI_LPT_HPA + 0x800, 0, 537 qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA), 538 parallel_hds[0]); 539 540 /* PS/2 Keyboard/Mouse */ 541 dev = qdev_new(TYPE_LASIPS2); 542 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 543 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, 544 qdev_get_gpio_in(lasi_dev, LASI_IRQ_PS2KBD_HPA)); 545 memory_region_add_subregion(addr_space, LASI_PS2KBD_HPA, 546 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 547 0)); 548 memory_region_add_subregion(addr_space, LASI_PS2KBD_HPA + 0x100, 549 sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 550 1)); 551 552 /* Add SCSI discs, NICs, graphics & load firmware */ 553 machine_HP_common_init_tail(machine, pci_bus); 554 } 555 556 static AstroState *astro_init(void) 557 { 558 DeviceState *dev; 559 560 dev = qdev_new(TYPE_ASTRO_CHIP); 561 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 562 563 return ASTRO_CHIP(dev); 564 } 565 566 /* 567 * Create HP C3700 workstation 568 */ 569 static void machine_HP_C3700_init(MachineState *machine) 570 { 571 PCIBus *pci_bus; 572 AstroState *astro; 573 DeviceState *astro_dev; 574 MemoryRegion *addr_space = get_system_memory(); 575 576 /* Create CPUs and RAM. */ 577 machine_HP_common_init_cpus(machine); 578 579 /* Init Astro and the Elroys (PCI host bus chips). */ 580 astro = astro_init(); 581 astro_dev = DEVICE(astro); 582 memory_region_add_subregion(addr_space, ASTRO_HPA, 583 sysbus_mmio_get_region( 584 SYS_BUS_DEVICE(astro_dev), 0)); 585 pci_bus = PCI_BUS(qdev_get_child_bus(DEVICE(astro->elroy[0]), "pci")); 586 assert(pci_bus); 587 588 /* Add SCSI discs, NICs, graphics & load firmware */ 589 machine_HP_common_init_tail(machine, pci_bus); 590 } 591 592 static void hppa_machine_reset(MachineState *ms, ShutdownCause reason) 593 { 594 unsigned int smp_cpus = ms->smp.cpus; 595 int i; 596 597 qemu_devices_reset(reason); 598 599 /* Start all CPUs at the firmware entry point. 600 * Monarch CPU will initialize firmware, secondary CPUs 601 * will enter a small idle loop and wait for rendevouz. */ 602 for (i = 0; i < smp_cpus; i++) { 603 CPUState *cs = CPU(cpu[i]); 604 605 cpu_set_pc(cs, firmware_entry); 606 cpu[i]->env.psw = PSW_Q; 607 cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000; 608 609 cs->exception_index = -1; 610 cs->halted = 0; 611 612 /* clear any existing TLB and BTLB entries */ 613 memset(cpu[i]->env.tlb, 0, sizeof(cpu[i]->env.tlb)); 614 cpu[i]->env.tlb_last = HPPA_BTLB_ENTRIES; 615 } 616 617 /* already initialized by machine_hppa_init()? */ 618 if (cpu[0]->env.gr[26] == ms->ram_size) { 619 return; 620 } 621 622 cpu[0]->env.gr[26] = ms->ram_size; 623 cpu[0]->env.gr[25] = 0; /* no firmware boot menu */ 624 cpu[0]->env.gr[24] = 'c'; 625 /* gr22/gr23 unused, no initrd while reboot. */ 626 cpu[0]->env.gr[21] = smp_cpus; 627 /* tell firmware fw_cfg port */ 628 cpu[0]->env.gr[19] = FW_CFG_IO_BASE; 629 } 630 631 static void hppa_nmi(NMIState *n, int cpu_index, Error **errp) 632 { 633 CPUState *cs; 634 635 CPU_FOREACH(cs) { 636 cpu_interrupt(cs, CPU_INTERRUPT_NMI); 637 } 638 } 639 640 static void HP_B160L_machine_init_class_init(ObjectClass *oc, void *data) 641 { 642 MachineClass *mc = MACHINE_CLASS(oc); 643 NMIClass *nc = NMI_CLASS(oc); 644 645 mc->desc = "HP B160L workstation"; 646 mc->default_cpu_type = TYPE_HPPA_CPU; 647 mc->init = machine_HP_B160L_init; 648 mc->reset = hppa_machine_reset; 649 mc->block_default_type = IF_SCSI; 650 mc->max_cpus = HPPA_MAX_CPUS; 651 mc->default_cpus = 1; 652 mc->is_default = true; 653 mc->default_ram_size = 512 * MiB; 654 mc->default_boot_order = "cd"; 655 mc->default_ram_id = "ram"; 656 mc->default_nic = "tulip"; 657 658 nc->nmi_monitor_handler = hppa_nmi; 659 } 660 661 static const TypeInfo HP_B160L_machine_init_typeinfo = { 662 .name = MACHINE_TYPE_NAME("B160L"), 663 .parent = TYPE_MACHINE, 664 .class_init = HP_B160L_machine_init_class_init, 665 .interfaces = (InterfaceInfo[]) { 666 { TYPE_NMI }, 667 { } 668 }, 669 }; 670 671 static void HP_C3700_machine_init_class_init(ObjectClass *oc, void *data) 672 { 673 MachineClass *mc = MACHINE_CLASS(oc); 674 NMIClass *nc = NMI_CLASS(oc); 675 676 mc->desc = "HP C3700 workstation"; 677 mc->default_cpu_type = TYPE_HPPA_CPU; 678 mc->init = machine_HP_C3700_init; 679 mc->reset = hppa_machine_reset; 680 mc->block_default_type = IF_SCSI; 681 mc->max_cpus = HPPA_MAX_CPUS; 682 mc->default_cpus = 1; 683 mc->is_default = false; 684 mc->default_ram_size = 1024 * MiB; 685 mc->default_boot_order = "cd"; 686 mc->default_ram_id = "ram"; 687 mc->default_nic = "tulip"; 688 689 nc->nmi_monitor_handler = hppa_nmi; 690 } 691 692 static const TypeInfo HP_C3700_machine_init_typeinfo = { 693 .name = MACHINE_TYPE_NAME("C3700"), 694 .parent = TYPE_MACHINE, 695 .class_init = HP_C3700_machine_init_class_init, 696 .interfaces = (InterfaceInfo[]) { 697 { TYPE_NMI }, 698 { } 699 }, 700 }; 701 702 static void hppa_machine_init_register_types(void) 703 { 704 type_register_static(&HP_B160L_machine_init_typeinfo); 705 type_register_static(&HP_C3700_machine_init_typeinfo); 706 } 707 708 type_init(hppa_machine_init_register_types) 709