xref: /openbmc/qemu/hw/hppa/hppa_hardware.h (revision a72bd606)
1*a72bd606SHelge Deller /* HPPA cores and system support chips.  */
2*a72bd606SHelge Deller 
3*a72bd606SHelge Deller #define FIRMWARE_START  0xf0000000
4*a72bd606SHelge Deller #define FIRMWARE_END    0xf0800000
5*a72bd606SHelge Deller 
6*a72bd606SHelge Deller #define DEVICE_HPA_LEN  0x00100000
7*a72bd606SHelge Deller 
8*a72bd606SHelge Deller #define GSC_HPA         0xffc00000
9*a72bd606SHelge Deller #define DINO_HPA        0xfff80000
10*a72bd606SHelge Deller #define DINO_UART_HPA   0xfff83000
11*a72bd606SHelge Deller #define  DINO_UART_BASE 0xfff83800
12*a72bd606SHelge Deller #define DINO_SCSI_HPA   0xfff8c000
13*a72bd606SHelge Deller #define LASI_HPA        0xffd00000
14*a72bd606SHelge Deller #define LASI_UART_HPA   0xffd05000
15*a72bd606SHelge Deller #define LASI_SCSI_HPA   0xffd06000
16*a72bd606SHelge Deller #define LASI_LAN_HPA    0xffd07000
17*a72bd606SHelge Deller #define LASI_LPT_HPA    0xffd02000
18*a72bd606SHelge Deller #define LASI_AUDIO_HPA  0xffd04000
19*a72bd606SHelge Deller #define LASI_PS2KBD_HPA 0xffd08000
20*a72bd606SHelge Deller #define LASI_PS2MOU_HPA 0xffd08100
21*a72bd606SHelge Deller #define LASI_GFX_HPA    0xf8000000
22*a72bd606SHelge Deller #define CPU_HPA         0xfff10000
23*a72bd606SHelge Deller #define MEMORY_HPA      0xfffbf000
24*a72bd606SHelge Deller 
25*a72bd606SHelge Deller #define PCI_HPA         DINO_HPA        /* PCI bus */
26*a72bd606SHelge Deller #define IDE_HPA         0xf9000000      /* Boot disc controller */
27*a72bd606SHelge Deller 
28*a72bd606SHelge Deller /* offsets to DINO HPA: */
29*a72bd606SHelge Deller #define DINO_PCI_ADDR           0x064
30*a72bd606SHelge Deller #define DINO_CONFIG_DATA        0x068
31*a72bd606SHelge Deller #define DINO_IO_DATA            0x06c
32*a72bd606SHelge Deller 
33*a72bd606SHelge Deller #define PORT_PCI_CMD    (PCI_HPA + DINO_PCI_ADDR)
34*a72bd606SHelge Deller #define PORT_PCI_DATA   (PCI_HPA + DINO_CONFIG_DATA)
35*a72bd606SHelge Deller 
36*a72bd606SHelge Deller #define PORT_SERIAL1    (DINO_UART_HPA + 0x800)
37*a72bd606SHelge Deller #define PORT_SERIAL2    (LASI_UART_HPA + 0x800)
38*a72bd606SHelge Deller 
39*a72bd606SHelge Deller #define HPPA_MAX_CPUS   32      /* max. number of SMP CPUs */
40*a72bd606SHelge Deller #define CPU_CLOCK_MHZ   250     /* emulate a 250 MHz CPU */
41