xref: /openbmc/qemu/hw/hppa/hppa_hardware.h (revision 5079892d)
1a72bd606SHelge Deller /* HPPA cores and system support chips.  */
24de43540SHelge Deller /* Be aware: QEMU and seabios-hppa repositories share this file as-is. */
3a72bd606SHelge Deller 
4f91005e1SMarkus Armbruster #ifndef HW_HPPA_HPPA_HARDWARE_H
5f91005e1SMarkus Armbruster #define HW_HPPA_HPPA_HARDWARE_H
6f91005e1SMarkus Armbruster 
7a72bd606SHelge Deller #define FIRMWARE_START  0xf0000000
8a72bd606SHelge Deller #define FIRMWARE_END    0xf0800000
9a72bd606SHelge Deller 
10a72bd606SHelge Deller #define DEVICE_HPA_LEN  0x00100000
11a72bd606SHelge Deller 
12a72bd606SHelge Deller #define GSC_HPA         0xffc00000
13a72bd606SHelge Deller #define DINO_HPA        0xfff80000
14a72bd606SHelge Deller #define DINO_UART_HPA   0xfff83000
15a72bd606SHelge Deller #define  DINO_UART_BASE 0xfff83800
16a72bd606SHelge Deller #define DINO_SCSI_HPA   0xfff8c000
17a72bd606SHelge Deller #define LASI_HPA        0xffd00000
18a72bd606SHelge Deller #define LASI_UART_HPA   0xffd05000
19a72bd606SHelge Deller #define LASI_SCSI_HPA   0xffd06000
20a72bd606SHelge Deller #define LASI_LAN_HPA    0xffd07000
21e3a99a8aSHelge Deller #define LASI_RTC_HPA    0xffd09000
22a72bd606SHelge Deller #define LASI_LPT_HPA    0xffd02000
23a72bd606SHelge Deller #define LASI_AUDIO_HPA  0xffd04000
24a72bd606SHelge Deller #define LASI_PS2KBD_HPA 0xffd08000
25a72bd606SHelge Deller #define LASI_PS2MOU_HPA 0xffd08100
26a72bd606SHelge Deller #define LASI_GFX_HPA    0xf8000000
274765384cSSven Schnelle #define ARTIST_FB_ADDR  0xf9000000
282b42f31eSHelge Deller #define CPU_HPA         0xfffb0000
2987e126eaSHelge Deller #define MEMORY_HPA      0xfffff000
30a72bd606SHelge Deller 
31a72bd606SHelge Deller #define PCI_HPA         DINO_HPA        /* PCI bus */
32a72bd606SHelge Deller #define IDE_HPA         0xf9000000      /* Boot disc controller */
33a72bd606SHelge Deller 
344de43540SHelge Deller /* offsets to DINO HPA: */
354de43540SHelge Deller #define DINO_PCI_ADDR           0x064
364de43540SHelge Deller #define DINO_CONFIG_DATA        0x068
374de43540SHelge Deller #define DINO_IO_DATA            0x06c
384de43540SHelge Deller 
39a72bd606SHelge Deller #define PORT_PCI_CMD    (PCI_HPA + DINO_PCI_ADDR)
40a72bd606SHelge Deller #define PORT_PCI_DATA   (PCI_HPA + DINO_CONFIG_DATA)
41a72bd606SHelge Deller 
4224576007SHelge Deller #define FW_CFG_IO_BASE  0xfffa0000
43e3a99a8aSHelge Deller 
44*5079892dSHelge Deller #define PORT_SERIAL1    (LASI_UART_HPA + 0x800)
45*5079892dSHelge Deller #define PORT_SERIAL2    (DINO_UART_HPA + 0x800)
46a72bd606SHelge Deller 
4787e126eaSHelge Deller #define HPPA_MAX_CPUS   16      /* max. number of SMP CPUs */
48a72bd606SHelge Deller #define CPU_CLOCK_MHZ   250     /* emulate a 250 MHz CPU */
49f91005e1SMarkus Armbruster 
50e3a99a8aSHelge Deller #define CPU_HPA_CR_REG  7       /* store CPU HPA in cr7 (SeaBIOS internal) */
5187e126eaSHelge Deller #define PIM_STORAGE_SIZE 600	/* storage size of pdc_pim_toc_struct (64bit) */
52e3a99a8aSHelge Deller 
53f91005e1SMarkus Armbruster #endif
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