1 /* 2 * Arm PrimeCell PL061 General Purpose IO with additional 3 * Luminary Micro Stellaris bits. 4 * 5 * Copyright (c) 2007 CodeSourcery. 6 * Written by Paul Brook 7 * 8 * This code is licensed under the GPL. 9 */ 10 11 #include "hw/sysbus.h" 12 13 //#define DEBUG_PL061 1 14 15 #ifdef DEBUG_PL061 16 #define DPRINTF(fmt, ...) \ 17 do { printf("pl061: " fmt , ## __VA_ARGS__); } while (0) 18 #define BADF(fmt, ...) \ 19 do { fprintf(stderr, "pl061: error: " fmt , ## __VA_ARGS__); exit(1);} while (0) 20 #else 21 #define DPRINTF(fmt, ...) do {} while(0) 22 #define BADF(fmt, ...) \ 23 do { fprintf(stderr, "pl061: error: " fmt , ## __VA_ARGS__);} while (0) 24 #endif 25 26 static const uint8_t pl061_id[12] = 27 { 0x00, 0x00, 0x00, 0x00, 0x61, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 }; 28 static const uint8_t pl061_id_luminary[12] = 29 { 0x00, 0x00, 0x00, 0x00, 0x61, 0x00, 0x18, 0x01, 0x0d, 0xf0, 0x05, 0xb1 }; 30 31 #define TYPE_PL061 "pl061" 32 #define PL061(obj) OBJECT_CHECK(PL061State, (obj), TYPE_PL061) 33 34 typedef struct PL061State { 35 SysBusDevice parent_obj; 36 37 MemoryRegion iomem; 38 uint32_t locked; 39 uint32_t data; 40 uint32_t old_data; 41 uint32_t dir; 42 uint32_t isense; 43 uint32_t ibe; 44 uint32_t iev; 45 uint32_t im; 46 uint32_t istate; 47 uint32_t afsel; 48 uint32_t dr2r; 49 uint32_t dr4r; 50 uint32_t dr8r; 51 uint32_t odr; 52 uint32_t pur; 53 uint32_t pdr; 54 uint32_t slr; 55 uint32_t den; 56 uint32_t cr; 57 uint32_t float_high; 58 uint32_t amsel; 59 qemu_irq irq; 60 qemu_irq out[8]; 61 const unsigned char *id; 62 } PL061State; 63 64 static const VMStateDescription vmstate_pl061 = { 65 .name = "pl061", 66 .version_id = 2, 67 .minimum_version_id = 1, 68 .fields = (VMStateField[]) { 69 VMSTATE_UINT32(locked, PL061State), 70 VMSTATE_UINT32(data, PL061State), 71 VMSTATE_UINT32(old_data, PL061State), 72 VMSTATE_UINT32(dir, PL061State), 73 VMSTATE_UINT32(isense, PL061State), 74 VMSTATE_UINT32(ibe, PL061State), 75 VMSTATE_UINT32(iev, PL061State), 76 VMSTATE_UINT32(im, PL061State), 77 VMSTATE_UINT32(istate, PL061State), 78 VMSTATE_UINT32(afsel, PL061State), 79 VMSTATE_UINT32(dr2r, PL061State), 80 VMSTATE_UINT32(dr4r, PL061State), 81 VMSTATE_UINT32(dr8r, PL061State), 82 VMSTATE_UINT32(odr, PL061State), 83 VMSTATE_UINT32(pur, PL061State), 84 VMSTATE_UINT32(pdr, PL061State), 85 VMSTATE_UINT32(slr, PL061State), 86 VMSTATE_UINT32(den, PL061State), 87 VMSTATE_UINT32(cr, PL061State), 88 VMSTATE_UINT32(float_high, PL061State), 89 VMSTATE_UINT32_V(amsel, PL061State, 2), 90 VMSTATE_END_OF_LIST() 91 } 92 }; 93 94 static void pl061_update(PL061State *s) 95 { 96 uint8_t changed; 97 uint8_t mask; 98 uint8_t out; 99 int i; 100 101 /* Outputs float high. */ 102 /* FIXME: This is board dependent. */ 103 out = (s->data & s->dir) | ~s->dir; 104 changed = s->old_data ^ out; 105 if (!changed) 106 return; 107 108 s->old_data = out; 109 for (i = 0; i < 8; i++) { 110 mask = 1 << i; 111 if (changed & mask) { 112 DPRINTF("Set output %d = %d\n", i, (out & mask) != 0); 113 qemu_set_irq(s->out[i], (out & mask) != 0); 114 } 115 } 116 117 /* FIXME: Implement input interrupts. */ 118 } 119 120 static uint64_t pl061_read(void *opaque, hwaddr offset, 121 unsigned size) 122 { 123 PL061State *s = (PL061State *)opaque; 124 125 if (offset >= 0xfd0 && offset < 0x1000) { 126 return s->id[(offset - 0xfd0) >> 2]; 127 } 128 if (offset < 0x400) { 129 return s->data & (offset >> 2); 130 } 131 switch (offset) { 132 case 0x400: /* Direction */ 133 return s->dir; 134 case 0x404: /* Interrupt sense */ 135 return s->isense; 136 case 0x408: /* Interrupt both edges */ 137 return s->ibe; 138 case 0x40c: /* Interrupt event */ 139 return s->iev; 140 case 0x410: /* Interrupt mask */ 141 return s->im; 142 case 0x414: /* Raw interrupt status */ 143 return s->istate; 144 case 0x418: /* Masked interrupt status */ 145 return s->istate | s->im; 146 case 0x420: /* Alternate function select */ 147 return s->afsel; 148 case 0x500: /* 2mA drive */ 149 return s->dr2r; 150 case 0x504: /* 4mA drive */ 151 return s->dr4r; 152 case 0x508: /* 8mA drive */ 153 return s->dr8r; 154 case 0x50c: /* Open drain */ 155 return s->odr; 156 case 0x510: /* Pull-up */ 157 return s->pur; 158 case 0x514: /* Pull-down */ 159 return s->pdr; 160 case 0x518: /* Slew rate control */ 161 return s->slr; 162 case 0x51c: /* Digital enable */ 163 return s->den; 164 case 0x520: /* Lock */ 165 return s->locked; 166 case 0x524: /* Commit */ 167 return s->cr; 168 case 0x528: /* Analog mode select */ 169 return s->amsel; 170 default: 171 qemu_log_mask(LOG_GUEST_ERROR, 172 "pl061_read: Bad offset %x\n", (int)offset); 173 return 0; 174 } 175 } 176 177 static void pl061_write(void *opaque, hwaddr offset, 178 uint64_t value, unsigned size) 179 { 180 PL061State *s = (PL061State *)opaque; 181 uint8_t mask; 182 183 if (offset < 0x400) { 184 mask = (offset >> 2) & s->dir; 185 s->data = (s->data & ~mask) | (value & mask); 186 pl061_update(s); 187 return; 188 } 189 switch (offset) { 190 case 0x400: /* Direction */ 191 s->dir = value & 0xff; 192 break; 193 case 0x404: /* Interrupt sense */ 194 s->isense = value & 0xff; 195 break; 196 case 0x408: /* Interrupt both edges */ 197 s->ibe = value & 0xff; 198 break; 199 case 0x40c: /* Interrupt event */ 200 s->iev = value & 0xff; 201 break; 202 case 0x410: /* Interrupt mask */ 203 s->im = value & 0xff; 204 break; 205 case 0x41c: /* Interrupt clear */ 206 s->istate &= ~value; 207 break; 208 case 0x420: /* Alternate function select */ 209 mask = s->cr; 210 s->afsel = (s->afsel & ~mask) | (value & mask); 211 break; 212 case 0x500: /* 2mA drive */ 213 s->dr2r = value & 0xff; 214 break; 215 case 0x504: /* 4mA drive */ 216 s->dr4r = value & 0xff; 217 break; 218 case 0x508: /* 8mA drive */ 219 s->dr8r = value & 0xff; 220 break; 221 case 0x50c: /* Open drain */ 222 s->odr = value & 0xff; 223 break; 224 case 0x510: /* Pull-up */ 225 s->pur = value & 0xff; 226 break; 227 case 0x514: /* Pull-down */ 228 s->pdr = value & 0xff; 229 break; 230 case 0x518: /* Slew rate control */ 231 s->slr = value & 0xff; 232 break; 233 case 0x51c: /* Digital enable */ 234 s->den = value & 0xff; 235 break; 236 case 0x520: /* Lock */ 237 s->locked = (value != 0xacce551); 238 break; 239 case 0x524: /* Commit */ 240 if (!s->locked) 241 s->cr = value & 0xff; 242 break; 243 case 0x528: 244 s->amsel = value & 0xff; 245 break; 246 default: 247 qemu_log_mask(LOG_GUEST_ERROR, 248 "pl061_write: Bad offset %x\n", (int)offset); 249 } 250 pl061_update(s); 251 } 252 253 static void pl061_reset(PL061State *s) 254 { 255 s->locked = 1; 256 s->cr = 0xff; 257 } 258 259 static void pl061_set_irq(void * opaque, int irq, int level) 260 { 261 PL061State *s = (PL061State *)opaque; 262 uint8_t mask; 263 264 mask = 1 << irq; 265 if ((s->dir & mask) == 0) { 266 s->data &= ~mask; 267 if (level) 268 s->data |= mask; 269 pl061_update(s); 270 } 271 } 272 273 static const MemoryRegionOps pl061_ops = { 274 .read = pl061_read, 275 .write = pl061_write, 276 .endianness = DEVICE_NATIVE_ENDIAN, 277 }; 278 279 static int pl061_initfn(SysBusDevice *sbd) 280 { 281 DeviceState *dev = DEVICE(sbd); 282 PL061State *s = PL061(dev); 283 284 memory_region_init_io(&s->iomem, OBJECT(s), &pl061_ops, s, "pl061", 0x1000); 285 sysbus_init_mmio(sbd, &s->iomem); 286 sysbus_init_irq(sbd, &s->irq); 287 qdev_init_gpio_in(dev, pl061_set_irq, 8); 288 qdev_init_gpio_out(dev, s->out, 8); 289 pl061_reset(s); 290 return 0; 291 } 292 293 static void pl061_luminary_init(Object *obj) 294 { 295 PL061State *s = PL061(obj); 296 297 s->id = pl061_id_luminary; 298 } 299 300 static void pl061_init(Object *obj) 301 { 302 PL061State *s = PL061(obj); 303 304 s->id = pl061_id; 305 } 306 307 static void pl061_class_init(ObjectClass *klass, void *data) 308 { 309 DeviceClass *dc = DEVICE_CLASS(klass); 310 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); 311 312 k->init = pl061_initfn; 313 dc->vmsd = &vmstate_pl061; 314 } 315 316 static const TypeInfo pl061_info = { 317 .name = TYPE_PL061, 318 .parent = TYPE_SYS_BUS_DEVICE, 319 .instance_size = sizeof(PL061State), 320 .instance_init = pl061_init, 321 .class_init = pl061_class_init, 322 }; 323 324 static const TypeInfo pl061_luminary_info = { 325 .name = "pl061_luminary", 326 .parent = TYPE_PL061, 327 .instance_init = pl061_luminary_init, 328 }; 329 330 static void pl061_register_types(void) 331 { 332 type_register_static(&pl061_info); 333 type_register_static(&pl061_luminary_info); 334 } 335 336 type_init(pl061_register_types) 337