1# See docs/tracing.txt for syntax documentation. 2 3# hw/dma/rc4030.c 4jazzio_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x" 5jazzio_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x" 6rc4030_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x" 7rc4030_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x" 8 9# hw/dma/sparc32_dma.c 10ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64 11ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64 12sparc32_dma_set_irq_raise(void) "Raise IRQ" 13sparc32_dma_set_irq_lower(void) "Lower IRQ" 14espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x" 15espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x" 16sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x" 17sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x" 18sparc32_dma_enable_raise(void) "Raise DMA enable" 19sparc32_dma_enable_lower(void) "Lower DMA enable" 20 21# hw/dma/sun4m_iommu.c 22sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x" 23sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x" 24sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64 25sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x" 26sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x" 27sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x" 28sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x" 29sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64 30 31# hw/dma/i8257.c 32i8257_unregistered_dma(int nchan, int dma_pos, int dma_len) "unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d" 33