1*81013450SDaniel P. Berrange# See docs/trace-events.txt for syntax documentation. 2*81013450SDaniel P. Berrange 3*81013450SDaniel P. Berrange# hw/dma/rc4030.c 4*81013450SDaniel P. Berrangejazzio_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x" 5*81013450SDaniel P. Berrangejazzio_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x" 6*81013450SDaniel P. Berrangerc4030_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x" 7*81013450SDaniel P. Berrangerc4030_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x" 8*81013450SDaniel P. Berrange 9*81013450SDaniel P. Berrange# hw/dma/sparc32_dma.c 10*81013450SDaniel P. Berrangeledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64 11*81013450SDaniel P. Berrangeledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64 12*81013450SDaniel P. Berrangesparc32_dma_set_irq_raise(void) "Raise IRQ" 13*81013450SDaniel P. Berrangesparc32_dma_set_irq_lower(void) "Lower IRQ" 14*81013450SDaniel P. Berrangeespdma_memory_read(uint32_t addr) "DMA read addr 0x%08x" 15*81013450SDaniel P. Berrangeespdma_memory_write(uint32_t addr) "DMA write addr 0x%08x" 16*81013450SDaniel P. Berrangesparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x" 17*81013450SDaniel P. Berrangesparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x" 18*81013450SDaniel P. Berrangesparc32_dma_enable_raise(void) "Raise DMA enable" 19*81013450SDaniel P. Berrangesparc32_dma_enable_lower(void) "Lower DMA enable" 20*81013450SDaniel P. Berrange 21*81013450SDaniel P. Berrange# hw/dma/sun4m_iommu.c 22*81013450SDaniel P. Berrangesun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x" 23*81013450SDaniel P. Berrangesun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x" 24*81013450SDaniel P. Berrangesun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64 25*81013450SDaniel P. Berrangesun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x" 26*81013450SDaniel P. Berrangesun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x" 27*81013450SDaniel P. Berrangesun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x" 28*81013450SDaniel P. Berrangesun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x" 29*81013450SDaniel P. Berrangesun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64 30*81013450SDaniel P. Berrange 31*81013450SDaniel P. Berrange# hw/dma/i8257.c 32*81013450SDaniel P. Berrangei8257_unregistered_dma(int nchan, int dma_pos, int dma_len) "unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d" 33