187e0331cSPhilippe Mathieu-Daudé# See docs/devel/tracing.txt for syntax documentation. 281013450SDaniel P. Berrange 381013450SDaniel P. Berrange# hw/dma/rc4030.c 481013450SDaniel P. Berrangejazzio_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x" 581013450SDaniel P. Berrangejazzio_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x" 681013450SDaniel P. Berrangerc4030_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x" 781013450SDaniel P. Berrangerc4030_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x" 881013450SDaniel P. Berrange 981013450SDaniel P. Berrange# hw/dma/sparc32_dma.c 10*331b7fc1SMark Cave-Aylandledma_memory_read(uint64_t addr, int len) "DMA read addr 0x%"PRIx64 " len %d" 11*331b7fc1SMark Cave-Aylandledma_memory_write(uint64_t addr, int len) "DMA write addr 0x%"PRIx64 " len %d" 1281013450SDaniel P. Berrangesparc32_dma_set_irq_raise(void) "Raise IRQ" 1381013450SDaniel P. Berrangesparc32_dma_set_irq_lower(void) "Lower IRQ" 14*331b7fc1SMark Cave-Aylandespdma_memory_read(uint32_t addr, int len) "DMA read addr 0x%08x len %d" 15*331b7fc1SMark Cave-Aylandespdma_memory_write(uint32_t addr, int len) "DMA write addr 0x%08x len %d" 168908eb1aSVladimir Sementsov-Ogievskiysparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg 0x%"PRIx64": 0x%08x" 178908eb1aSVladimir Sementsov-Ogievskiysparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg 0x%"PRIx64": 0x%08x -> 0x%08x" 1881013450SDaniel P. Berrangesparc32_dma_enable_raise(void) "Raise DMA enable" 1981013450SDaniel P. Berrangesparc32_dma_enable_lower(void) "Lower DMA enable" 2081013450SDaniel P. Berrange 2181013450SDaniel P. Berrange# hw/dma/sun4m_iommu.c 228908eb1aSVladimir Sementsov-Ogievskiysun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x" 238908eb1aSVladimir Sementsov-Ogievskiysun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x" 248908eb1aSVladimir Sementsov-Ogievskiysun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = 0x%"PRIx64 258908eb1aSVladimir Sementsov-Ogievskiysun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush 0x%x" 268908eb1aSVladimir Sementsov-Ogievskiysun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush 0x%x" 278908eb1aSVladimir Sementsov-Ogievskiysun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr 0x%"PRIx64" => pte 0x%"PRIx64", *pte = 0x%x" 288908eb1aSVladimir Sementsov-Ogievskiysun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva 0x%"PRIx64" => pa 0x%"PRIx64" iopte = 0x%x" 298908eb1aSVladimir Sementsov-Ogievskiysun4m_iommu_bad_addr(uint64_t addr) "bad addr 0x%"PRIx64 3081013450SDaniel P. Berrange 3181013450SDaniel P. Berrange# hw/dma/i8257.c 3281013450SDaniel P. Berrangei8257_unregistered_dma(int nchan, int dma_pos, int dma_len) "unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d" 33