1 /* 2 * QEMU Intel 82374 emulation (Enhanced DMA controller) 3 * 4 * Copyright (c) 2010 Hervé Poussineau 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "hw/isa/isa.h" 26 27 //#define DEBUG_I82374 28 29 #ifdef DEBUG_I82374 30 #define DPRINTF(fmt, ...) \ 31 do { fprintf(stderr, "i82374: " fmt , ## __VA_ARGS__); } while (0) 32 #else 33 #define DPRINTF(fmt, ...) \ 34 do {} while (0) 35 #endif 36 #define BADF(fmt, ...) \ 37 do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0) 38 39 typedef struct I82374State { 40 uint8_t commands[8]; 41 qemu_irq out; 42 } I82374State; 43 44 static const VMStateDescription vmstate_i82374 = { 45 .name = "i82374", 46 .version_id = 0, 47 .minimum_version_id = 0, 48 .fields = (VMStateField[]) { 49 VMSTATE_UINT8_ARRAY(commands, I82374State, 8), 50 VMSTATE_END_OF_LIST() 51 }, 52 }; 53 54 static uint32_t i82374_read_isr(void *opaque, uint32_t nport) 55 { 56 uint32_t val = 0; 57 58 BADF("%s: %08x\n", __func__, nport); 59 60 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); 61 return val; 62 } 63 64 static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data) 65 { 66 DPRINTF("%s: %08x=%08x\n", __func__, nport, data); 67 68 if (data != 0x42) { 69 /* Not Stop S/G command */ 70 BADF("%s: %08x=%08x\n", __func__, nport, data); 71 } 72 } 73 74 static uint32_t i82374_read_status(void *opaque, uint32_t nport) 75 { 76 uint32_t val = 0; 77 78 BADF("%s: %08x\n", __func__, nport); 79 80 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); 81 return val; 82 } 83 84 static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t data) 85 { 86 DPRINTF("%s: %08x=%08x\n", __func__, nport, data); 87 88 BADF("%s: %08x=%08x\n", __func__, nport, data); 89 } 90 91 static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport) 92 { 93 uint32_t val = 0; 94 95 BADF("%s: %08x\n", __func__, nport); 96 97 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); 98 return val; 99 } 100 101 static void i82374_realize(I82374State *s, Error **errp) 102 { 103 DMA_init(1, &s->out); 104 memset(s->commands, 0, sizeof(s->commands)); 105 } 106 107 #define TYPE_I82374 "i82374" 108 #define I82374(obj) OBJECT_CHECK(ISAi82374State, (obj), TYPE_I82374) 109 110 typedef struct ISAi82374State { 111 ISADevice parent_obj; 112 113 uint32_t iobase; 114 I82374State state; 115 } ISAi82374State; 116 117 static const VMStateDescription vmstate_isa_i82374 = { 118 .name = "isa-i82374", 119 .version_id = 0, 120 .minimum_version_id = 0, 121 .fields = (VMStateField[]) { 122 VMSTATE_STRUCT(state, ISAi82374State, 0, vmstate_i82374, I82374State), 123 VMSTATE_END_OF_LIST() 124 }, 125 }; 126 127 static void i82374_isa_realize(DeviceState *dev, Error **errp) 128 { 129 ISAi82374State *isa = I82374(dev); 130 I82374State *s = &isa->state; 131 132 register_ioport_read(isa->iobase + 0x0A, 1, 1, i82374_read_isr, s); 133 register_ioport_write(isa->iobase + 0x10, 8, 1, i82374_write_command, s); 134 register_ioport_read(isa->iobase + 0x18, 8, 1, i82374_read_status, s); 135 register_ioport_write(isa->iobase + 0x20, 0x20, 1, i82374_write_descriptor, s); 136 register_ioport_read(isa->iobase + 0x20, 0x20, 1, i82374_read_descriptor, s); 137 138 i82374_realize(s, errp); 139 140 qdev_init_gpio_out(dev, &s->out, 1); 141 } 142 143 static Property i82374_properties[] = { 144 DEFINE_PROP_HEX32("iobase", ISAi82374State, iobase, 0x400), 145 DEFINE_PROP_END_OF_LIST() 146 }; 147 148 static void i82374_class_init(ObjectClass *klass, void *data) 149 { 150 DeviceClass *dc = DEVICE_CLASS(klass); 151 152 dc->realize = i82374_isa_realize; 153 dc->vmsd = &vmstate_isa_i82374; 154 dc->props = i82374_properties; 155 } 156 157 static const TypeInfo i82374_isa_info = { 158 .name = TYPE_I82374, 159 .parent = TYPE_ISA_DEVICE, 160 .instance_size = sizeof(ISAi82374State), 161 .class_init = i82374_class_init, 162 }; 163 164 static void i82374_register_types(void) 165 { 166 type_register_static(&i82374_isa_info); 167 } 168 169 type_init(i82374_register_types) 170