1 /* 2 * QEMU Intel 82374 emulation (Enhanced DMA controller) 3 * 4 * Copyright (c) 2010 Hervé Poussineau 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "qapi/error.h" 27 #include "qemu/module.h" 28 #include "hw/isa/isa.h" 29 #include "migration/vmstate.h" 30 #include "hw/dma/i8257.h" 31 32 #define TYPE_I82374 "i82374" 33 #define I82374(obj) OBJECT_CHECK(I82374State, (obj), TYPE_I82374) 34 35 //#define DEBUG_I82374 36 37 #ifdef DEBUG_I82374 38 #define DPRINTF(fmt, ...) \ 39 do { fprintf(stderr, "i82374: " fmt , ## __VA_ARGS__); } while (0) 40 #else 41 #define DPRINTF(fmt, ...) \ 42 do {} while (0) 43 #endif 44 #define BADF(fmt, ...) \ 45 do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0) 46 47 typedef struct I82374State { 48 ISADevice parent_obj; 49 50 uint32_t iobase; 51 uint8_t commands[8]; 52 PortioList port_list; 53 } I82374State; 54 55 static const VMStateDescription vmstate_i82374 = { 56 .name = "i82374", 57 .version_id = 0, 58 .minimum_version_id = 0, 59 .fields = (VMStateField[]) { 60 VMSTATE_UINT8_ARRAY(commands, I82374State, 8), 61 VMSTATE_END_OF_LIST() 62 }, 63 }; 64 65 static uint32_t i82374_read_isr(void *opaque, uint32_t nport) 66 { 67 uint32_t val = 0; 68 69 BADF("%s: %08x\n", __func__, nport); 70 71 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); 72 return val; 73 } 74 75 static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data) 76 { 77 DPRINTF("%s: %08x=%08x\n", __func__, nport, data); 78 79 if (data != 0x42) { 80 /* Not Stop S/G command */ 81 BADF("%s: %08x=%08x\n", __func__, nport, data); 82 } 83 } 84 85 static uint32_t i82374_read_status(void *opaque, uint32_t nport) 86 { 87 uint32_t val = 0; 88 89 BADF("%s: %08x\n", __func__, nport); 90 91 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); 92 return val; 93 } 94 95 static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t data) 96 { 97 DPRINTF("%s: %08x=%08x\n", __func__, nport, data); 98 99 BADF("%s: %08x=%08x\n", __func__, nport, data); 100 } 101 102 static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport) 103 { 104 uint32_t val = 0; 105 106 BADF("%s: %08x\n", __func__, nport); 107 108 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); 109 return val; 110 } 111 112 static const MemoryRegionPortio i82374_portio_list[] = { 113 { 0x0A, 1, 1, .read = i82374_read_isr, }, 114 { 0x10, 8, 1, .write = i82374_write_command, }, 115 { 0x18, 8, 1, .read = i82374_read_status, }, 116 { 0x20, 0x20, 1, 117 .write = i82374_write_descriptor, .read = i82374_read_descriptor, }, 118 PORTIO_END_OF_LIST(), 119 }; 120 121 static void i82374_realize(DeviceState *dev, Error **errp) 122 { 123 I82374State *s = I82374(dev); 124 ISABus *isa_bus = isa_bus_from_device(ISA_DEVICE(dev)); 125 126 if (isa_get_dma(isa_bus, 0)) { 127 error_setg(errp, "DMA already initialized on ISA bus"); 128 return; 129 } 130 i8257_dma_init(isa_bus, true); 131 132 portio_list_init(&s->port_list, OBJECT(s), i82374_portio_list, s, 133 "i82374"); 134 portio_list_add(&s->port_list, isa_address_space_io(&s->parent_obj), 135 s->iobase); 136 137 memset(s->commands, 0, sizeof(s->commands)); 138 } 139 140 static Property i82374_properties[] = { 141 DEFINE_PROP_UINT32("iobase", I82374State, iobase, 0x400), 142 DEFINE_PROP_END_OF_LIST() 143 }; 144 145 static void i82374_class_init(ObjectClass *klass, void *data) 146 { 147 DeviceClass *dc = DEVICE_CLASS(klass); 148 149 dc->realize = i82374_realize; 150 dc->vmsd = &vmstate_i82374; 151 dc->props = i82374_properties; 152 } 153 154 static const TypeInfo i82374_info = { 155 .name = TYPE_I82374, 156 .parent = TYPE_ISA_DEVICE, 157 .instance_size = sizeof(I82374State), 158 .class_init = i82374_class_init, 159 }; 160 161 static void i82374_register_types(void) 162 { 163 type_register_static(&i82374_info); 164 } 165 166 type_init(i82374_register_types) 167