1 /* 2 * QEMU Intel 82374 emulation (Enhanced DMA controller) 3 * 4 * Copyright (c) 2010 Hervé Poussineau 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "hw/isa/isa.h" 27 #include "hw/dma/i8257.h" 28 29 #define TYPE_I82374 "i82374" 30 #define I82374(obj) OBJECT_CHECK(I82374State, (obj), TYPE_I82374) 31 32 //#define DEBUG_I82374 33 34 #ifdef DEBUG_I82374 35 #define DPRINTF(fmt, ...) \ 36 do { fprintf(stderr, "i82374: " fmt , ## __VA_ARGS__); } while (0) 37 #else 38 #define DPRINTF(fmt, ...) \ 39 do {} while (0) 40 #endif 41 #define BADF(fmt, ...) \ 42 do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0) 43 44 typedef struct I82374State { 45 ISADevice parent_obj; 46 47 uint32_t iobase; 48 uint8_t commands[8]; 49 PortioList port_list; 50 } I82374State; 51 52 static const VMStateDescription vmstate_i82374 = { 53 .name = "i82374", 54 .version_id = 0, 55 .minimum_version_id = 0, 56 .fields = (VMStateField[]) { 57 VMSTATE_UINT8_ARRAY(commands, I82374State, 8), 58 VMSTATE_END_OF_LIST() 59 }, 60 }; 61 62 static uint32_t i82374_read_isr(void *opaque, uint32_t nport) 63 { 64 uint32_t val = 0; 65 66 BADF("%s: %08x\n", __func__, nport); 67 68 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); 69 return val; 70 } 71 72 static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data) 73 { 74 DPRINTF("%s: %08x=%08x\n", __func__, nport, data); 75 76 if (data != 0x42) { 77 /* Not Stop S/G command */ 78 BADF("%s: %08x=%08x\n", __func__, nport, data); 79 } 80 } 81 82 static uint32_t i82374_read_status(void *opaque, uint32_t nport) 83 { 84 uint32_t val = 0; 85 86 BADF("%s: %08x\n", __func__, nport); 87 88 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); 89 return val; 90 } 91 92 static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t data) 93 { 94 DPRINTF("%s: %08x=%08x\n", __func__, nport, data); 95 96 BADF("%s: %08x=%08x\n", __func__, nport, data); 97 } 98 99 static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport) 100 { 101 uint32_t val = 0; 102 103 BADF("%s: %08x\n", __func__, nport); 104 105 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); 106 return val; 107 } 108 109 static const MemoryRegionPortio i82374_portio_list[] = { 110 { 0x0A, 1, 1, .read = i82374_read_isr, }, 111 { 0x10, 8, 1, .write = i82374_write_command, }, 112 { 0x18, 8, 1, .read = i82374_read_status, }, 113 { 0x20, 0x20, 1, 114 .write = i82374_write_descriptor, .read = i82374_read_descriptor, }, 115 PORTIO_END_OF_LIST(), 116 }; 117 118 static void i82374_realize(DeviceState *dev, Error **errp) 119 { 120 I82374State *s = I82374(dev); 121 122 portio_list_init(&s->port_list, OBJECT(s), i82374_portio_list, s, 123 "i82374"); 124 portio_list_add(&s->port_list, isa_address_space_io(&s->parent_obj), 125 s->iobase); 126 127 i8257_dma_init(isa_bus_from_device(ISA_DEVICE(dev)), true); 128 memset(s->commands, 0, sizeof(s->commands)); 129 } 130 131 static Property i82374_properties[] = { 132 DEFINE_PROP_UINT32("iobase", I82374State, iobase, 0x400), 133 DEFINE_PROP_END_OF_LIST() 134 }; 135 136 static void i82374_class_init(ObjectClass *klass, void *data) 137 { 138 DeviceClass *dc = DEVICE_CLASS(klass); 139 140 dc->realize = i82374_realize; 141 dc->vmsd = &vmstate_i82374; 142 dc->props = i82374_properties; 143 } 144 145 static const TypeInfo i82374_info = { 146 .name = TYPE_I82374, 147 .parent = TYPE_ISA_DEVICE, 148 .instance_size = sizeof(I82374State), 149 .class_init = i82374_class_init, 150 }; 151 152 static void i82374_register_types(void) 153 { 154 type_register_static(&i82374_info); 155 } 156 157 type_init(i82374_register_types) 158