1 /* 2 * QEMU Intel 82374 emulation (Enhanced DMA controller) 3 * 4 * Copyright (c) 2010 Hervé Poussineau 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "qapi/error.h" 27 #include "qemu/module.h" 28 #include "hw/isa/isa.h" 29 #include "hw/qdev-properties.h" 30 #include "migration/vmstate.h" 31 #include "hw/dma/i8257.h" 32 #include "qom/object.h" 33 34 #define TYPE_I82374 "i82374" 35 typedef struct I82374State I82374State; 36 DECLARE_INSTANCE_CHECKER(I82374State, I82374, 37 TYPE_I82374) 38 39 //#define DEBUG_I82374 40 41 #ifdef DEBUG_I82374 42 #define DPRINTF(fmt, ...) \ 43 do { fprintf(stderr, "i82374: " fmt , ## __VA_ARGS__); } while (0) 44 #else 45 #define DPRINTF(fmt, ...) \ 46 do {} while (0) 47 #endif 48 #define BADF(fmt, ...) \ 49 do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0) 50 51 struct I82374State { 52 ISADevice parent_obj; 53 54 uint32_t iobase; 55 uint8_t commands[8]; 56 PortioList port_list; 57 }; 58 59 static const VMStateDescription vmstate_i82374 = { 60 .name = "i82374", 61 .version_id = 0, 62 .minimum_version_id = 0, 63 .fields = (VMStateField[]) { 64 VMSTATE_UINT8_ARRAY(commands, I82374State, 8), 65 VMSTATE_END_OF_LIST() 66 }, 67 }; 68 69 static uint32_t i82374_read_isr(void *opaque, uint32_t nport) 70 { 71 uint32_t val = 0; 72 73 BADF("%s: %08x\n", __func__, nport); 74 75 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); 76 return val; 77 } 78 79 static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data) 80 { 81 DPRINTF("%s: %08x=%08x\n", __func__, nport, data); 82 83 if (data != 0x42) { 84 /* Not Stop S/G command */ 85 BADF("%s: %08x=%08x\n", __func__, nport, data); 86 } 87 } 88 89 static uint32_t i82374_read_status(void *opaque, uint32_t nport) 90 { 91 uint32_t val = 0; 92 93 BADF("%s: %08x\n", __func__, nport); 94 95 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); 96 return val; 97 } 98 99 static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t data) 100 { 101 DPRINTF("%s: %08x=%08x\n", __func__, nport, data); 102 103 BADF("%s: %08x=%08x\n", __func__, nport, data); 104 } 105 106 static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport) 107 { 108 uint32_t val = 0; 109 110 BADF("%s: %08x\n", __func__, nport); 111 112 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); 113 return val; 114 } 115 116 static const MemoryRegionPortio i82374_portio_list[] = { 117 { 0x0A, 1, 1, .read = i82374_read_isr, }, 118 { 0x10, 8, 1, .write = i82374_write_command, }, 119 { 0x18, 8, 1, .read = i82374_read_status, }, 120 { 0x20, 0x20, 1, 121 .write = i82374_write_descriptor, .read = i82374_read_descriptor, }, 122 PORTIO_END_OF_LIST(), 123 }; 124 125 static void i82374_realize(DeviceState *dev, Error **errp) 126 { 127 I82374State *s = I82374(dev); 128 ISABus *isa_bus = isa_bus_from_device(ISA_DEVICE(dev)); 129 130 if (isa_get_dma(isa_bus, 0)) { 131 error_setg(errp, "DMA already initialized on ISA bus"); 132 return; 133 } 134 i8257_dma_init(isa_bus, true); 135 136 portio_list_init(&s->port_list, OBJECT(s), i82374_portio_list, s, 137 "i82374"); 138 portio_list_add(&s->port_list, isa_address_space_io(&s->parent_obj), 139 s->iobase); 140 141 memset(s->commands, 0, sizeof(s->commands)); 142 } 143 144 static Property i82374_properties[] = { 145 DEFINE_PROP_UINT32("iobase", I82374State, iobase, 0x400), 146 DEFINE_PROP_END_OF_LIST() 147 }; 148 149 static void i82374_class_init(ObjectClass *klass, void *data) 150 { 151 DeviceClass *dc = DEVICE_CLASS(klass); 152 153 dc->realize = i82374_realize; 154 dc->vmsd = &vmstate_i82374; 155 device_class_set_props(dc, i82374_properties); 156 } 157 158 static const TypeInfo i82374_info = { 159 .name = TYPE_I82374, 160 .parent = TYPE_ISA_DEVICE, 161 .instance_size = sizeof(I82374State), 162 .class_init = i82374_class_init, 163 }; 164 165 static void i82374_register_types(void) 166 { 167 type_register_static(&i82374_info); 168 } 169 170 type_init(i82374_register_types) 171