1 /* 2 * QEMU Intel 82374 emulation (Enhanced DMA controller) 3 * 4 * Copyright (c) 2010 Hervé Poussineau 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "hw/isa/isa.h" 26 27 //#define DEBUG_I82374 28 29 #ifdef DEBUG_I82374 30 #define DPRINTF(fmt, ...) \ 31 do { fprintf(stderr, "i82374: " fmt , ## __VA_ARGS__); } while (0) 32 #else 33 #define DPRINTF(fmt, ...) \ 34 do {} while (0) 35 #endif 36 #define BADF(fmt, ...) \ 37 do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0) 38 39 typedef struct I82374State { 40 uint8_t commands[8]; 41 qemu_irq out; 42 PortioList port_list; 43 } I82374State; 44 45 static const VMStateDescription vmstate_i82374 = { 46 .name = "i82374", 47 .version_id = 0, 48 .minimum_version_id = 0, 49 .fields = (VMStateField[]) { 50 VMSTATE_UINT8_ARRAY(commands, I82374State, 8), 51 VMSTATE_END_OF_LIST() 52 }, 53 }; 54 55 static uint32_t i82374_read_isr(void *opaque, uint32_t nport) 56 { 57 uint32_t val = 0; 58 59 BADF("%s: %08x\n", __func__, nport); 60 61 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); 62 return val; 63 } 64 65 static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data) 66 { 67 DPRINTF("%s: %08x=%08x\n", __func__, nport, data); 68 69 if (data != 0x42) { 70 /* Not Stop S/G command */ 71 BADF("%s: %08x=%08x\n", __func__, nport, data); 72 } 73 } 74 75 static uint32_t i82374_read_status(void *opaque, uint32_t nport) 76 { 77 uint32_t val = 0; 78 79 BADF("%s: %08x\n", __func__, nport); 80 81 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); 82 return val; 83 } 84 85 static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t data) 86 { 87 DPRINTF("%s: %08x=%08x\n", __func__, nport, data); 88 89 BADF("%s: %08x=%08x\n", __func__, nport, data); 90 } 91 92 static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport) 93 { 94 uint32_t val = 0; 95 96 BADF("%s: %08x\n", __func__, nport); 97 98 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); 99 return val; 100 } 101 102 static void i82374_realize(I82374State *s, Error **errp) 103 { 104 DMA_init(1, &s->out); 105 memset(s->commands, 0, sizeof(s->commands)); 106 } 107 108 #define TYPE_I82374 "i82374" 109 #define I82374(obj) OBJECT_CHECK(ISAi82374State, (obj), TYPE_I82374) 110 111 typedef struct ISAi82374State { 112 ISADevice parent_obj; 113 114 uint32_t iobase; 115 I82374State state; 116 } ISAi82374State; 117 118 static const VMStateDescription vmstate_isa_i82374 = { 119 .name = "isa-i82374", 120 .version_id = 0, 121 .minimum_version_id = 0, 122 .fields = (VMStateField[]) { 123 VMSTATE_STRUCT(state, ISAi82374State, 0, vmstate_i82374, I82374State), 124 VMSTATE_END_OF_LIST() 125 }, 126 }; 127 128 static const MemoryRegionPortio i82374_portio_list[] = { 129 { 0x0A, 1, 1, .read = i82374_read_isr, }, 130 { 0x10, 8, 1, .write = i82374_write_command, }, 131 { 0x18, 8, 1, .read = i82374_read_status, }, 132 { 0x20, 0x20, 1, 133 .write = i82374_write_descriptor, .read = i82374_read_descriptor, }, 134 PORTIO_END_OF_LIST(), 135 }; 136 137 static void i82374_isa_realize(DeviceState *dev, Error **errp) 138 { 139 ISAi82374State *isa = I82374(dev); 140 I82374State *s = &isa->state; 141 142 portio_list_init(&s->port_list, OBJECT(isa), i82374_portio_list, s, 143 "i82374"); 144 portio_list_add(&s->port_list, isa_address_space_io(&isa->parent_obj), 145 isa->iobase); 146 147 i82374_realize(s, errp); 148 149 qdev_init_gpio_out(dev, &s->out, 1); 150 } 151 152 static Property i82374_properties[] = { 153 DEFINE_PROP_UINT32("iobase", ISAi82374State, iobase, 0x400), 154 DEFINE_PROP_END_OF_LIST() 155 }; 156 157 static void i82374_class_init(ObjectClass *klass, void *data) 158 { 159 DeviceClass *dc = DEVICE_CLASS(klass); 160 161 dc->realize = i82374_isa_realize; 162 dc->vmsd = &vmstate_isa_i82374; 163 dc->props = i82374_properties; 164 } 165 166 static const TypeInfo i82374_isa_info = { 167 .name = TYPE_I82374, 168 .parent = TYPE_ISA_DEVICE, 169 .instance_size = sizeof(ISAi82374State), 170 .class_init = i82374_class_init, 171 }; 172 173 static void i82374_register_types(void) 174 { 175 type_register_static(&i82374_isa_info); 176 } 177 178 type_init(i82374_register_types) 179