xref: /openbmc/qemu/hw/dma/i82374.c (revision 9c4218e9)
1 /*
2  * QEMU Intel 82374 emulation (Enhanced DMA controller)
3  *
4  * Copyright (c) 2010 Hervé Poussineau
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 #include "qemu/osdep.h"
26 #include "hw/isa/isa.h"
27 
28 //#define DEBUG_I82374
29 
30 #ifdef DEBUG_I82374
31 #define DPRINTF(fmt, ...) \
32 do { fprintf(stderr, "i82374: " fmt , ## __VA_ARGS__); } while (0)
33 #else
34 #define DPRINTF(fmt, ...) \
35 do {} while (0)
36 #endif
37 #define BADF(fmt, ...) \
38 do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0)
39 
40 typedef struct I82374State {
41     uint8_t commands[8];
42     PortioList port_list;
43 } I82374State;
44 
45 static const VMStateDescription vmstate_i82374 = {
46     .name = "i82374",
47     .version_id = 0,
48     .minimum_version_id = 0,
49     .fields = (VMStateField[]) {
50         VMSTATE_UINT8_ARRAY(commands, I82374State, 8),
51         VMSTATE_END_OF_LIST()
52     },
53 };
54 
55 static uint32_t i82374_read_isr(void *opaque, uint32_t nport)
56 {
57     uint32_t val = 0;
58 
59     BADF("%s: %08x\n", __func__, nport);
60 
61     DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
62     return val;
63 }
64 
65 static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data)
66 {
67     DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
68 
69     if (data != 0x42) {
70         /* Not Stop S/G command */
71         BADF("%s: %08x=%08x\n", __func__, nport, data);
72     }
73 }
74 
75 static uint32_t i82374_read_status(void *opaque, uint32_t nport)
76 {
77     uint32_t val = 0;
78 
79     BADF("%s: %08x\n", __func__, nport);
80 
81     DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
82     return val;
83 }
84 
85 static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t data)
86 {
87     DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
88 
89     BADF("%s: %08x=%08x\n", __func__, nport, data);
90 }
91 
92 static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport)
93 {
94     uint32_t val = 0;
95 
96     BADF("%s: %08x\n", __func__, nport);
97 
98     DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
99     return val;
100 }
101 
102 static void i82374_realize(I82374State *s, Error **errp)
103 {
104     DMA_init(1);
105     memset(s->commands, 0, sizeof(s->commands));
106 }
107 
108 #define TYPE_I82374 "i82374"
109 #define I82374(obj) OBJECT_CHECK(ISAi82374State, (obj), TYPE_I82374)
110 
111 typedef struct ISAi82374State {
112     ISADevice parent_obj;
113 
114     uint32_t iobase;
115     I82374State state;
116 } ISAi82374State;
117 
118 static const VMStateDescription vmstate_isa_i82374 = {
119     .name = "isa-i82374",
120     .version_id = 0,
121     .minimum_version_id = 0,
122     .fields = (VMStateField[]) {
123         VMSTATE_STRUCT(state, ISAi82374State, 0, vmstate_i82374, I82374State),
124         VMSTATE_END_OF_LIST()
125     },
126 };
127 
128 static const MemoryRegionPortio i82374_portio_list[] = {
129     { 0x0A, 1, 1, .read = i82374_read_isr, },
130     { 0x10, 8, 1, .write = i82374_write_command, },
131     { 0x18, 8, 1, .read = i82374_read_status, },
132     { 0x20, 0x20, 1,
133       .write = i82374_write_descriptor, .read = i82374_read_descriptor, },
134     PORTIO_END_OF_LIST(),
135 };
136 
137 static void i82374_isa_realize(DeviceState *dev, Error **errp)
138 {
139     ISAi82374State *isa = I82374(dev);
140     I82374State *s = &isa->state;
141 
142     portio_list_init(&s->port_list, OBJECT(isa), i82374_portio_list, s,
143                      "i82374");
144     portio_list_add(&s->port_list, isa_address_space_io(&isa->parent_obj),
145                     isa->iobase);
146 
147     i82374_realize(s, errp);
148 }
149 
150 static Property i82374_properties[] = {
151     DEFINE_PROP_UINT32("iobase", ISAi82374State, iobase, 0x400),
152     DEFINE_PROP_END_OF_LIST()
153 };
154 
155 static void i82374_class_init(ObjectClass *klass, void *data)
156 {
157     DeviceClass *dc = DEVICE_CLASS(klass);
158 
159     dc->realize = i82374_isa_realize;
160     dc->vmsd = &vmstate_isa_i82374;
161     dc->props = i82374_properties;
162 }
163 
164 static const TypeInfo i82374_isa_info = {
165     .name  = TYPE_I82374,
166     .parent = TYPE_ISA_DEVICE,
167     .instance_size  = sizeof(ISAi82374State),
168     .class_init = i82374_class_init,
169 };
170 
171 static void i82374_register_types(void)
172 {
173     type_register_static(&i82374_isa_info);
174 }
175 
176 type_init(i82374_register_types)
177