1 /* 2 * QEMU Intel 82374 emulation (Enhanced DMA controller) 3 * 4 * Copyright (c) 2010 Hervé Poussineau 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #include "qemu/osdep.h" 26 #include "qapi/error.h" 27 #include "hw/isa/isa.h" 28 #include "hw/dma/i8257.h" 29 30 #define TYPE_I82374 "i82374" 31 #define I82374(obj) OBJECT_CHECK(I82374State, (obj), TYPE_I82374) 32 33 //#define DEBUG_I82374 34 35 #ifdef DEBUG_I82374 36 #define DPRINTF(fmt, ...) \ 37 do { fprintf(stderr, "i82374: " fmt , ## __VA_ARGS__); } while (0) 38 #else 39 #define DPRINTF(fmt, ...) \ 40 do {} while (0) 41 #endif 42 #define BADF(fmt, ...) \ 43 do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0) 44 45 typedef struct I82374State { 46 ISADevice parent_obj; 47 48 uint32_t iobase; 49 uint8_t commands[8]; 50 PortioList port_list; 51 } I82374State; 52 53 static const VMStateDescription vmstate_i82374 = { 54 .name = "i82374", 55 .version_id = 0, 56 .minimum_version_id = 0, 57 .fields = (VMStateField[]) { 58 VMSTATE_UINT8_ARRAY(commands, I82374State, 8), 59 VMSTATE_END_OF_LIST() 60 }, 61 }; 62 63 static uint32_t i82374_read_isr(void *opaque, uint32_t nport) 64 { 65 uint32_t val = 0; 66 67 BADF("%s: %08x\n", __func__, nport); 68 69 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); 70 return val; 71 } 72 73 static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data) 74 { 75 DPRINTF("%s: %08x=%08x\n", __func__, nport, data); 76 77 if (data != 0x42) { 78 /* Not Stop S/G command */ 79 BADF("%s: %08x=%08x\n", __func__, nport, data); 80 } 81 } 82 83 static uint32_t i82374_read_status(void *opaque, uint32_t nport) 84 { 85 uint32_t val = 0; 86 87 BADF("%s: %08x\n", __func__, nport); 88 89 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); 90 return val; 91 } 92 93 static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t data) 94 { 95 DPRINTF("%s: %08x=%08x\n", __func__, nport, data); 96 97 BADF("%s: %08x=%08x\n", __func__, nport, data); 98 } 99 100 static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport) 101 { 102 uint32_t val = 0; 103 104 BADF("%s: %08x\n", __func__, nport); 105 106 DPRINTF("%s: %08x=%08x\n", __func__, nport, val); 107 return val; 108 } 109 110 static const MemoryRegionPortio i82374_portio_list[] = { 111 { 0x0A, 1, 1, .read = i82374_read_isr, }, 112 { 0x10, 8, 1, .write = i82374_write_command, }, 113 { 0x18, 8, 1, .read = i82374_read_status, }, 114 { 0x20, 0x20, 1, 115 .write = i82374_write_descriptor, .read = i82374_read_descriptor, }, 116 PORTIO_END_OF_LIST(), 117 }; 118 119 static void i82374_realize(DeviceState *dev, Error **errp) 120 { 121 I82374State *s = I82374(dev); 122 ISABus *isa_bus = isa_bus_from_device(ISA_DEVICE(dev)); 123 124 if (isa_get_dma(isa_bus, 0)) { 125 error_setg(errp, "DMA already initialized on ISA bus"); 126 return; 127 } 128 i8257_dma_init(isa_bus, true); 129 130 portio_list_init(&s->port_list, OBJECT(s), i82374_portio_list, s, 131 "i82374"); 132 portio_list_add(&s->port_list, isa_address_space_io(&s->parent_obj), 133 s->iobase); 134 135 memset(s->commands, 0, sizeof(s->commands)); 136 } 137 138 static Property i82374_properties[] = { 139 DEFINE_PROP_UINT32("iobase", I82374State, iobase, 0x400), 140 DEFINE_PROP_END_OF_LIST() 141 }; 142 143 static void i82374_class_init(ObjectClass *klass, void *data) 144 { 145 DeviceClass *dc = DEVICE_CLASS(klass); 146 147 dc->realize = i82374_realize; 148 dc->vmsd = &vmstate_i82374; 149 dc->props = i82374_properties; 150 } 151 152 static const TypeInfo i82374_info = { 153 .name = TYPE_I82374, 154 .parent = TYPE_ISA_DEVICE, 155 .instance_size = sizeof(I82374State), 156 .class_init = i82374_class_init, 157 }; 158 159 static void i82374_register_types(void) 160 { 161 type_register_static(&i82374_info); 162 } 163 164 type_init(i82374_register_types) 165