1 #include "qemu/osdep.h" 2 #include "hw/hw.h" 3 #include "hw/pci/pci.h" 4 #include "vga_int.h" 5 #include "hw/virtio/virtio-pci.h" 6 #include "qapi/error.h" 7 8 /* 9 * virtio-vga: This extends VirtioPCIProxy. 10 */ 11 #define TYPE_VIRTIO_VGA "virtio-vga" 12 #define VIRTIO_VGA(obj) \ 13 OBJECT_CHECK(VirtIOVGA, (obj), TYPE_VIRTIO_VGA) 14 15 typedef struct VirtIOVGA { 16 VirtIOPCIProxy parent_obj; 17 VirtIOGPU vdev; 18 VGACommonState vga; 19 MemoryRegion vga_mrs[3]; 20 } VirtIOVGA; 21 22 static void virtio_vga_invalidate_display(void *opaque) 23 { 24 VirtIOVGA *vvga = opaque; 25 26 if (vvga->vdev.enable) { 27 virtio_gpu_ops.invalidate(&vvga->vdev); 28 } else { 29 vvga->vga.hw_ops->invalidate(&vvga->vga); 30 } 31 } 32 33 static void virtio_vga_update_display(void *opaque) 34 { 35 VirtIOVGA *vvga = opaque; 36 37 if (vvga->vdev.enable) { 38 virtio_gpu_ops.gfx_update(&vvga->vdev); 39 } else { 40 vvga->vga.hw_ops->gfx_update(&vvga->vga); 41 } 42 } 43 44 static void virtio_vga_text_update(void *opaque, console_ch_t *chardata) 45 { 46 VirtIOVGA *vvga = opaque; 47 48 if (vvga->vdev.enable) { 49 if (virtio_gpu_ops.text_update) { 50 virtio_gpu_ops.text_update(&vvga->vdev, chardata); 51 } 52 } else { 53 if (vvga->vga.hw_ops->text_update) { 54 vvga->vga.hw_ops->text_update(&vvga->vga, chardata); 55 } 56 } 57 } 58 59 static int virtio_vga_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info) 60 { 61 VirtIOVGA *vvga = opaque; 62 63 if (virtio_gpu_ops.ui_info) { 64 return virtio_gpu_ops.ui_info(&vvga->vdev, idx, info); 65 } 66 return -1; 67 } 68 69 static void virtio_vga_gl_block(void *opaque, bool block) 70 { 71 VirtIOVGA *vvga = opaque; 72 73 if (virtio_gpu_ops.gl_block) { 74 virtio_gpu_ops.gl_block(&vvga->vdev, block); 75 } 76 } 77 78 static const GraphicHwOps virtio_vga_ops = { 79 .invalidate = virtio_vga_invalidate_display, 80 .gfx_update = virtio_vga_update_display, 81 .text_update = virtio_vga_text_update, 82 .ui_info = virtio_vga_ui_info, 83 .gl_block = virtio_vga_gl_block, 84 }; 85 86 static const VMStateDescription vmstate_virtio_vga = { 87 .name = "virtio-vga", 88 .version_id = 2, 89 .minimum_version_id = 2, 90 .fields = (VMStateField[]) { 91 /* no pci stuff here, saving the virtio device will handle that */ 92 VMSTATE_STRUCT(vga, VirtIOVGA, 0, vmstate_vga_common, VGACommonState), 93 VMSTATE_END_OF_LIST() 94 } 95 }; 96 97 /* VGA device wrapper around PCI device around virtio GPU */ 98 static void virtio_vga_realize(VirtIOPCIProxy *vpci_dev, Error **errp) 99 { 100 VirtIOVGA *vvga = VIRTIO_VGA(vpci_dev); 101 VirtIOGPU *g = &vvga->vdev; 102 VGACommonState *vga = &vvga->vga; 103 Error *err = NULL; 104 uint32_t offset; 105 int i; 106 107 /* init vga compat bits */ 108 vga->vram_size_mb = 8; 109 vga_common_init(vga, OBJECT(vpci_dev), false); 110 vga_init(vga, OBJECT(vpci_dev), pci_address_space(&vpci_dev->pci_dev), 111 pci_address_space_io(&vpci_dev->pci_dev), true); 112 pci_register_bar(&vpci_dev->pci_dev, 0, 113 PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram); 114 115 /* 116 * Configure virtio bar and regions 117 * 118 * We use bar #2 for the mmio regions, to be compatible with stdvga. 119 * virtio regions are moved to the end of bar #2, to make room for 120 * the stdvga mmio registers at the start of bar #2. 121 */ 122 vpci_dev->modern_mem_bar_idx = 2; 123 vpci_dev->msix_bar_idx = 4; 124 125 if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) { 126 /* 127 * with page-per-vq=off there is no padding space we can use 128 * for the stdvga registers. Make the common and isr regions 129 * smaller then. 130 */ 131 vpci_dev->common.size /= 2; 132 vpci_dev->isr.size /= 2; 133 } 134 135 offset = memory_region_size(&vpci_dev->modern_bar); 136 offset -= vpci_dev->notify.size; 137 vpci_dev->notify.offset = offset; 138 offset -= vpci_dev->device.size; 139 vpci_dev->device.offset = offset; 140 offset -= vpci_dev->isr.size; 141 vpci_dev->isr.offset = offset; 142 offset -= vpci_dev->common.size; 143 vpci_dev->common.offset = offset; 144 145 /* init virtio bits */ 146 qdev_set_parent_bus(DEVICE(g), BUS(&vpci_dev->bus)); 147 virtio_pci_force_virtio_1(vpci_dev); 148 object_property_set_bool(OBJECT(g), true, "realized", &err); 149 if (err) { 150 error_propagate(errp, err); 151 return; 152 } 153 154 /* add stdvga mmio regions */ 155 pci_std_vga_mmio_region_init(vga, &vpci_dev->modern_bar, 156 vvga->vga_mrs, true); 157 158 vga->con = g->scanout[0].con; 159 graphic_console_set_hwops(vga->con, &virtio_vga_ops, vvga); 160 161 for (i = 0; i < g->conf.max_outputs; i++) { 162 object_property_set_link(OBJECT(g->scanout[i].con), 163 OBJECT(vpci_dev), 164 "device", errp); 165 } 166 } 167 168 static void virtio_vga_reset(DeviceState *dev) 169 { 170 VirtIOVGA *vvga = VIRTIO_VGA(dev); 171 vvga->vdev.enable = 0; 172 173 vga_dirty_log_start(&vvga->vga); 174 } 175 176 static Property virtio_vga_properties[] = { 177 DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy), 178 DEFINE_PROP_END_OF_LIST(), 179 }; 180 181 static void virtio_vga_class_init(ObjectClass *klass, void *data) 182 { 183 DeviceClass *dc = DEVICE_CLASS(klass); 184 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); 185 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); 186 187 set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories); 188 dc->props = virtio_vga_properties; 189 dc->reset = virtio_vga_reset; 190 dc->vmsd = &vmstate_virtio_vga; 191 dc->hotpluggable = false; 192 193 k->realize = virtio_vga_realize; 194 pcidev_k->romfile = "vgabios-virtio.bin"; 195 pcidev_k->class_id = PCI_CLASS_DISPLAY_VGA; 196 } 197 198 static void virtio_vga_inst_initfn(Object *obj) 199 { 200 VirtIOVGA *dev = VIRTIO_VGA(obj); 201 202 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), 203 TYPE_VIRTIO_GPU); 204 } 205 206 static TypeInfo virtio_vga_info = { 207 .name = TYPE_VIRTIO_VGA, 208 .parent = TYPE_VIRTIO_PCI, 209 .instance_size = sizeof(struct VirtIOVGA), 210 .instance_init = virtio_vga_inst_initfn, 211 .class_init = virtio_vga_class_init, 212 }; 213 214 static void virtio_vga_register_types(void) 215 { 216 type_register_static(&virtio_vga_info); 217 } 218 219 type_init(virtio_vga_register_types) 220