1 /* 2 * Virtio GPU Device 3 * 4 * Copyright Red Hat, Inc. 2013-2014 5 * 6 * Authors: 7 * Dave Airlie <airlied@redhat.com> 8 * Gerd Hoffmann <kraxel@redhat.com> 9 * 10 * This work is licensed under the terms of the GNU GPL, version 2 or later. 11 * See the COPYING file in the top-level directory. 12 */ 13 14 #include "qemu/osdep.h" 15 #include "qemu/units.h" 16 #include "qemu/iov.h" 17 #include "ui/console.h" 18 #include "trace.h" 19 #include "sysemu/dma.h" 20 #include "sysemu/sysemu.h" 21 #include "hw/virtio/virtio.h" 22 #include "migration/qemu-file-types.h" 23 #include "hw/virtio/virtio-gpu.h" 24 #include "hw/virtio/virtio-gpu-bswap.h" 25 #include "hw/virtio/virtio-gpu-pixman.h" 26 #include "hw/virtio/virtio-bus.h" 27 #include "hw/display/edid.h" 28 #include "hw/qdev-properties.h" 29 #include "qemu/log.h" 30 #include "qemu/module.h" 31 #include "qapi/error.h" 32 #include "qemu/error-report.h" 33 34 #define VIRTIO_GPU_VM_VERSION 1 35 36 static struct virtio_gpu_simple_resource* 37 virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id); 38 static struct virtio_gpu_simple_resource * 39 virtio_gpu_find_check_resource(VirtIOGPU *g, uint32_t resource_id, 40 bool require_backing, 41 const char *caller, uint32_t *error); 42 43 static void virtio_gpu_cleanup_mapping(VirtIOGPU *g, 44 struct virtio_gpu_simple_resource *res); 45 46 void virtio_gpu_update_cursor_data(VirtIOGPU *g, 47 struct virtio_gpu_scanout *s, 48 uint32_t resource_id) 49 { 50 struct virtio_gpu_simple_resource *res; 51 uint32_t pixels; 52 53 res = virtio_gpu_find_check_resource(g, resource_id, false, 54 __func__, NULL); 55 if (!res) { 56 return; 57 } 58 59 if (pixman_image_get_width(res->image) != s->current_cursor->width || 60 pixman_image_get_height(res->image) != s->current_cursor->height) { 61 return; 62 } 63 64 pixels = s->current_cursor->width * s->current_cursor->height; 65 memcpy(s->current_cursor->data, 66 pixman_image_get_data(res->image), 67 pixels * sizeof(uint32_t)); 68 } 69 70 static void update_cursor(VirtIOGPU *g, struct virtio_gpu_update_cursor *cursor) 71 { 72 struct virtio_gpu_scanout *s; 73 VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g); 74 bool move = cursor->hdr.type == VIRTIO_GPU_CMD_MOVE_CURSOR; 75 76 if (cursor->pos.scanout_id >= g->parent_obj.conf.max_outputs) { 77 return; 78 } 79 s = &g->parent_obj.scanout[cursor->pos.scanout_id]; 80 81 trace_virtio_gpu_update_cursor(cursor->pos.scanout_id, 82 cursor->pos.x, 83 cursor->pos.y, 84 move ? "move" : "update", 85 cursor->resource_id); 86 87 if (!move) { 88 if (!s->current_cursor) { 89 s->current_cursor = cursor_alloc(64, 64); 90 } 91 92 s->current_cursor->hot_x = cursor->hot_x; 93 s->current_cursor->hot_y = cursor->hot_y; 94 95 if (cursor->resource_id > 0) { 96 vgc->update_cursor_data(g, s, cursor->resource_id); 97 } 98 dpy_cursor_define(s->con, s->current_cursor); 99 100 s->cursor = *cursor; 101 } else { 102 s->cursor.pos.x = cursor->pos.x; 103 s->cursor.pos.y = cursor->pos.y; 104 } 105 dpy_mouse_set(s->con, cursor->pos.x, cursor->pos.y, 106 cursor->resource_id ? 1 : 0); 107 } 108 109 static struct virtio_gpu_simple_resource * 110 virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id) 111 { 112 struct virtio_gpu_simple_resource *res; 113 114 QTAILQ_FOREACH(res, &g->reslist, next) { 115 if (res->resource_id == resource_id) { 116 return res; 117 } 118 } 119 return NULL; 120 } 121 122 static struct virtio_gpu_simple_resource * 123 virtio_gpu_find_check_resource(VirtIOGPU *g, uint32_t resource_id, 124 bool require_backing, 125 const char *caller, uint32_t *error) 126 { 127 struct virtio_gpu_simple_resource *res; 128 129 res = virtio_gpu_find_resource(g, resource_id); 130 if (!res) { 131 qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid resource specified %d\n", 132 caller, resource_id); 133 if (error) { 134 *error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 135 } 136 return NULL; 137 } 138 139 if (require_backing) { 140 if (!res->iov || (!res->image && !res->blob)) { 141 qemu_log_mask(LOG_GUEST_ERROR, "%s: no backing storage %d\n", 142 caller, resource_id); 143 if (error) { 144 *error = VIRTIO_GPU_RESP_ERR_UNSPEC; 145 } 146 return NULL; 147 } 148 } 149 150 return res; 151 } 152 153 void virtio_gpu_ctrl_response(VirtIOGPU *g, 154 struct virtio_gpu_ctrl_command *cmd, 155 struct virtio_gpu_ctrl_hdr *resp, 156 size_t resp_len) 157 { 158 size_t s; 159 160 if (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_FENCE) { 161 resp->flags |= VIRTIO_GPU_FLAG_FENCE; 162 resp->fence_id = cmd->cmd_hdr.fence_id; 163 resp->ctx_id = cmd->cmd_hdr.ctx_id; 164 } 165 virtio_gpu_ctrl_hdr_bswap(resp); 166 s = iov_from_buf(cmd->elem.in_sg, cmd->elem.in_num, 0, resp, resp_len); 167 if (s != resp_len) { 168 qemu_log_mask(LOG_GUEST_ERROR, 169 "%s: response size incorrect %zu vs %zu\n", 170 __func__, s, resp_len); 171 } 172 virtqueue_push(cmd->vq, &cmd->elem, s); 173 virtio_notify(VIRTIO_DEVICE(g), cmd->vq); 174 cmd->finished = true; 175 } 176 177 void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g, 178 struct virtio_gpu_ctrl_command *cmd, 179 enum virtio_gpu_ctrl_type type) 180 { 181 struct virtio_gpu_ctrl_hdr resp; 182 183 memset(&resp, 0, sizeof(resp)); 184 resp.type = type; 185 virtio_gpu_ctrl_response(g, cmd, &resp, sizeof(resp)); 186 } 187 188 void virtio_gpu_get_display_info(VirtIOGPU *g, 189 struct virtio_gpu_ctrl_command *cmd) 190 { 191 struct virtio_gpu_resp_display_info display_info; 192 193 trace_virtio_gpu_cmd_get_display_info(); 194 memset(&display_info, 0, sizeof(display_info)); 195 display_info.hdr.type = VIRTIO_GPU_RESP_OK_DISPLAY_INFO; 196 virtio_gpu_base_fill_display_info(VIRTIO_GPU_BASE(g), &display_info); 197 virtio_gpu_ctrl_response(g, cmd, &display_info.hdr, 198 sizeof(display_info)); 199 } 200 201 static void 202 virtio_gpu_generate_edid(VirtIOGPU *g, int scanout, 203 struct virtio_gpu_resp_edid *edid) 204 { 205 VirtIOGPUBase *b = VIRTIO_GPU_BASE(g); 206 qemu_edid_info info = { 207 .width_mm = b->req_state[scanout].width_mm, 208 .height_mm = b->req_state[scanout].height_mm, 209 .prefx = b->req_state[scanout].width, 210 .prefy = b->req_state[scanout].height, 211 }; 212 213 edid->size = cpu_to_le32(sizeof(edid->edid)); 214 qemu_edid_generate(edid->edid, sizeof(edid->edid), &info); 215 } 216 217 void virtio_gpu_get_edid(VirtIOGPU *g, 218 struct virtio_gpu_ctrl_command *cmd) 219 { 220 struct virtio_gpu_resp_edid edid; 221 struct virtio_gpu_cmd_get_edid get_edid; 222 VirtIOGPUBase *b = VIRTIO_GPU_BASE(g); 223 224 VIRTIO_GPU_FILL_CMD(get_edid); 225 virtio_gpu_bswap_32(&get_edid, sizeof(get_edid)); 226 227 if (get_edid.scanout >= b->conf.max_outputs) { 228 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; 229 return; 230 } 231 232 trace_virtio_gpu_cmd_get_edid(get_edid.scanout); 233 memset(&edid, 0, sizeof(edid)); 234 edid.hdr.type = VIRTIO_GPU_RESP_OK_EDID; 235 virtio_gpu_generate_edid(g, get_edid.scanout, &edid); 236 virtio_gpu_ctrl_response(g, cmd, &edid.hdr, sizeof(edid)); 237 } 238 239 static uint32_t calc_image_hostmem(pixman_format_code_t pformat, 240 uint32_t width, uint32_t height) 241 { 242 /* Copied from pixman/pixman-bits-image.c, skip integer overflow check. 243 * pixman_image_create_bits will fail in case it overflow. 244 */ 245 246 int bpp = PIXMAN_FORMAT_BPP(pformat); 247 int stride = ((width * bpp + 0x1f) >> 5) * sizeof(uint32_t); 248 return height * stride; 249 } 250 251 static void virtio_gpu_resource_create_2d(VirtIOGPU *g, 252 struct virtio_gpu_ctrl_command *cmd) 253 { 254 pixman_format_code_t pformat; 255 struct virtio_gpu_simple_resource *res; 256 struct virtio_gpu_resource_create_2d c2d; 257 258 VIRTIO_GPU_FILL_CMD(c2d); 259 virtio_gpu_bswap_32(&c2d, sizeof(c2d)); 260 trace_virtio_gpu_cmd_res_create_2d(c2d.resource_id, c2d.format, 261 c2d.width, c2d.height); 262 263 if (c2d.resource_id == 0) { 264 qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n", 265 __func__); 266 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 267 return; 268 } 269 270 res = virtio_gpu_find_resource(g, c2d.resource_id); 271 if (res) { 272 qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already exists %d\n", 273 __func__, c2d.resource_id); 274 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 275 return; 276 } 277 278 res = g_new0(struct virtio_gpu_simple_resource, 1); 279 280 res->width = c2d.width; 281 res->height = c2d.height; 282 res->format = c2d.format; 283 res->resource_id = c2d.resource_id; 284 285 pformat = virtio_gpu_get_pixman_format(c2d.format); 286 if (!pformat) { 287 qemu_log_mask(LOG_GUEST_ERROR, 288 "%s: host couldn't handle guest format %d\n", 289 __func__, c2d.format); 290 g_free(res); 291 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; 292 return; 293 } 294 295 res->hostmem = calc_image_hostmem(pformat, c2d.width, c2d.height); 296 if (res->hostmem + g->hostmem < g->conf_max_hostmem) { 297 res->image = pixman_image_create_bits(pformat, 298 c2d.width, 299 c2d.height, 300 NULL, 0); 301 } 302 303 if (!res->image) { 304 qemu_log_mask(LOG_GUEST_ERROR, 305 "%s: resource creation failed %d %d %d\n", 306 __func__, c2d.resource_id, c2d.width, c2d.height); 307 g_free(res); 308 cmd->error = VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY; 309 return; 310 } 311 312 QTAILQ_INSERT_HEAD(&g->reslist, res, next); 313 g->hostmem += res->hostmem; 314 } 315 316 static void virtio_gpu_resource_create_blob(VirtIOGPU *g, 317 struct virtio_gpu_ctrl_command *cmd) 318 { 319 struct virtio_gpu_simple_resource *res; 320 struct virtio_gpu_resource_create_blob cblob; 321 int ret; 322 323 VIRTIO_GPU_FILL_CMD(cblob); 324 virtio_gpu_create_blob_bswap(&cblob); 325 trace_virtio_gpu_cmd_res_create_blob(cblob.resource_id, cblob.size); 326 327 if (cblob.resource_id == 0) { 328 qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n", 329 __func__); 330 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 331 return; 332 } 333 334 res = virtio_gpu_find_resource(g, cblob.resource_id); 335 if (res) { 336 qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already exists %d\n", 337 __func__, cblob.resource_id); 338 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 339 return; 340 } 341 342 res = g_new0(struct virtio_gpu_simple_resource, 1); 343 res->resource_id = cblob.resource_id; 344 res->blob_size = cblob.size; 345 346 if (cblob.blob_mem != VIRTIO_GPU_BLOB_MEM_GUEST && 347 cblob.blob_flags != VIRTIO_GPU_BLOB_FLAG_USE_SHAREABLE) { 348 qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid memory type\n", 349 __func__); 350 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; 351 g_free(res); 352 return; 353 } 354 355 if (res->iov) { 356 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; 357 return; 358 } 359 360 ret = virtio_gpu_create_mapping_iov(g, cblob.nr_entries, sizeof(cblob), 361 cmd, &res->addrs, &res->iov, 362 &res->iov_cnt); 363 if (ret != 0) { 364 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; 365 return; 366 } 367 368 virtio_gpu_init_udmabuf(res); 369 QTAILQ_INSERT_HEAD(&g->reslist, res, next); 370 } 371 372 static void virtio_gpu_disable_scanout(VirtIOGPU *g, int scanout_id) 373 { 374 struct virtio_gpu_scanout *scanout = &g->parent_obj.scanout[scanout_id]; 375 struct virtio_gpu_simple_resource *res; 376 377 if (scanout->resource_id == 0) { 378 return; 379 } 380 381 res = virtio_gpu_find_resource(g, scanout->resource_id); 382 if (res) { 383 res->scanout_bitmask &= ~(1 << scanout_id); 384 } 385 386 dpy_gfx_replace_surface(scanout->con, NULL); 387 scanout->resource_id = 0; 388 scanout->ds = NULL; 389 scanout->width = 0; 390 scanout->height = 0; 391 } 392 393 static void virtio_gpu_resource_destroy(VirtIOGPU *g, 394 struct virtio_gpu_simple_resource *res) 395 { 396 int i; 397 398 if (res->scanout_bitmask) { 399 for (i = 0; i < g->parent_obj.conf.max_outputs; i++) { 400 if (res->scanout_bitmask & (1 << i)) { 401 virtio_gpu_disable_scanout(g, i); 402 } 403 } 404 } 405 406 pixman_image_unref(res->image); 407 virtio_gpu_cleanup_mapping(g, res); 408 QTAILQ_REMOVE(&g->reslist, res, next); 409 g->hostmem -= res->hostmem; 410 g_free(res); 411 } 412 413 static void virtio_gpu_resource_unref(VirtIOGPU *g, 414 struct virtio_gpu_ctrl_command *cmd) 415 { 416 struct virtio_gpu_simple_resource *res; 417 struct virtio_gpu_resource_unref unref; 418 419 VIRTIO_GPU_FILL_CMD(unref); 420 virtio_gpu_bswap_32(&unref, sizeof(unref)); 421 trace_virtio_gpu_cmd_res_unref(unref.resource_id); 422 423 res = virtio_gpu_find_resource(g, unref.resource_id); 424 if (!res) { 425 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n", 426 __func__, unref.resource_id); 427 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 428 return; 429 } 430 virtio_gpu_resource_destroy(g, res); 431 } 432 433 static void virtio_gpu_transfer_to_host_2d(VirtIOGPU *g, 434 struct virtio_gpu_ctrl_command *cmd) 435 { 436 struct virtio_gpu_simple_resource *res; 437 int h; 438 uint32_t src_offset, dst_offset, stride; 439 int bpp; 440 pixman_format_code_t format; 441 struct virtio_gpu_transfer_to_host_2d t2d; 442 443 VIRTIO_GPU_FILL_CMD(t2d); 444 virtio_gpu_t2d_bswap(&t2d); 445 trace_virtio_gpu_cmd_res_xfer_toh_2d(t2d.resource_id); 446 447 res = virtio_gpu_find_check_resource(g, t2d.resource_id, true, 448 __func__, &cmd->error); 449 if (!res || res->blob) { 450 return; 451 } 452 453 if (t2d.r.x > res->width || 454 t2d.r.y > res->height || 455 t2d.r.width > res->width || 456 t2d.r.height > res->height || 457 t2d.r.x + t2d.r.width > res->width || 458 t2d.r.y + t2d.r.height > res->height) { 459 qemu_log_mask(LOG_GUEST_ERROR, "%s: transfer bounds outside resource" 460 " bounds for resource %d: %d %d %d %d vs %d %d\n", 461 __func__, t2d.resource_id, t2d.r.x, t2d.r.y, 462 t2d.r.width, t2d.r.height, res->width, res->height); 463 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; 464 return; 465 } 466 467 format = pixman_image_get_format(res->image); 468 bpp = DIV_ROUND_UP(PIXMAN_FORMAT_BPP(format), 8); 469 stride = pixman_image_get_stride(res->image); 470 471 if (t2d.offset || t2d.r.x || t2d.r.y || 472 t2d.r.width != pixman_image_get_width(res->image)) { 473 void *img_data = pixman_image_get_data(res->image); 474 for (h = 0; h < t2d.r.height; h++) { 475 src_offset = t2d.offset + stride * h; 476 dst_offset = (t2d.r.y + h) * stride + (t2d.r.x * bpp); 477 478 iov_to_buf(res->iov, res->iov_cnt, src_offset, 479 (uint8_t *)img_data 480 + dst_offset, t2d.r.width * bpp); 481 } 482 } else { 483 iov_to_buf(res->iov, res->iov_cnt, 0, 484 pixman_image_get_data(res->image), 485 pixman_image_get_stride(res->image) 486 * pixman_image_get_height(res->image)); 487 } 488 } 489 490 static void virtio_gpu_resource_flush(VirtIOGPU *g, 491 struct virtio_gpu_ctrl_command *cmd) 492 { 493 struct virtio_gpu_simple_resource *res; 494 struct virtio_gpu_resource_flush rf; 495 pixman_region16_t flush_region; 496 int i; 497 498 VIRTIO_GPU_FILL_CMD(rf); 499 virtio_gpu_bswap_32(&rf, sizeof(rf)); 500 trace_virtio_gpu_cmd_res_flush(rf.resource_id, 501 rf.r.width, rf.r.height, rf.r.x, rf.r.y); 502 503 res = virtio_gpu_find_check_resource(g, rf.resource_id, false, 504 __func__, &cmd->error); 505 if (!res || res->blob) { 506 return; 507 } 508 509 if (rf.r.x > res->width || 510 rf.r.y > res->height || 511 rf.r.width > res->width || 512 rf.r.height > res->height || 513 rf.r.x + rf.r.width > res->width || 514 rf.r.y + rf.r.height > res->height) { 515 qemu_log_mask(LOG_GUEST_ERROR, "%s: flush bounds outside resource" 516 " bounds for resource %d: %d %d %d %d vs %d %d\n", 517 __func__, rf.resource_id, rf.r.x, rf.r.y, 518 rf.r.width, rf.r.height, res->width, res->height); 519 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; 520 return; 521 } 522 523 pixman_region_init_rect(&flush_region, 524 rf.r.x, rf.r.y, rf.r.width, rf.r.height); 525 for (i = 0; i < g->parent_obj.conf.max_outputs; i++) { 526 struct virtio_gpu_scanout *scanout; 527 pixman_region16_t region, finalregion; 528 pixman_box16_t *extents; 529 530 if (!(res->scanout_bitmask & (1 << i))) { 531 continue; 532 } 533 scanout = &g->parent_obj.scanout[i]; 534 535 pixman_region_init(&finalregion); 536 pixman_region_init_rect(®ion, scanout->x, scanout->y, 537 scanout->width, scanout->height); 538 539 pixman_region_intersect(&finalregion, &flush_region, ®ion); 540 pixman_region_translate(&finalregion, -scanout->x, -scanout->y); 541 extents = pixman_region_extents(&finalregion); 542 /* work out the area we need to update for each console */ 543 dpy_gfx_update(g->parent_obj.scanout[i].con, 544 extents->x1, extents->y1, 545 extents->x2 - extents->x1, 546 extents->y2 - extents->y1); 547 548 pixman_region_fini(®ion); 549 pixman_region_fini(&finalregion); 550 } 551 pixman_region_fini(&flush_region); 552 } 553 554 static void virtio_unref_resource(pixman_image_t *image, void *data) 555 { 556 pixman_image_unref(data); 557 } 558 559 static void virtio_gpu_update_scanout(VirtIOGPU *g, 560 uint32_t scanout_id, 561 struct virtio_gpu_simple_resource *res, 562 struct virtio_gpu_rect *r) 563 { 564 struct virtio_gpu_simple_resource *ores; 565 struct virtio_gpu_scanout *scanout; 566 567 scanout = &g->parent_obj.scanout[scanout_id]; 568 ores = virtio_gpu_find_resource(g, scanout->resource_id); 569 if (ores) { 570 ores->scanout_bitmask &= ~(1 << scanout_id); 571 } 572 573 res->scanout_bitmask |= (1 << scanout_id); 574 scanout->resource_id = res->resource_id; 575 scanout->x = r->x; 576 scanout->y = r->y; 577 scanout->width = r->width; 578 scanout->height = r->height; 579 } 580 581 static void virtio_gpu_do_set_scanout(VirtIOGPU *g, 582 uint32_t scanout_id, 583 struct virtio_gpu_framebuffer *fb, 584 struct virtio_gpu_simple_resource *res, 585 struct virtio_gpu_rect *r, 586 uint32_t *error) 587 { 588 struct virtio_gpu_scanout *scanout; 589 uint8_t *data; 590 591 if (scanout_id >= g->parent_obj.conf.max_outputs) { 592 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout id specified %d", 593 __func__, scanout_id); 594 *error = VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID; 595 return; 596 } 597 scanout = &g->parent_obj.scanout[scanout_id]; 598 599 if (r->x > fb->width || 600 r->y > fb->height || 601 r->width < 16 || 602 r->height < 16 || 603 r->width > fb->width || 604 r->height > fb->height || 605 r->x + r->width > fb->width || 606 r->y + r->height > fb->height) { 607 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout %d bounds for" 608 " resource %d, rect (%d,%d)+%d,%d, fb %d %d\n", 609 __func__, scanout_id, res->resource_id, 610 r->x, r->y, r->width, r->height, 611 fb->width, fb->height); 612 *error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; 613 return; 614 } 615 616 g->parent_obj.enable = 1; 617 data = (uint8_t *)pixman_image_get_data(res->image); 618 619 /* create a surface for this scanout */ 620 if (!scanout->ds || 621 surface_data(scanout->ds) != data + fb->offset || 622 scanout->width != r->width || 623 scanout->height != r->height) { 624 pixman_image_t *rect; 625 void *ptr = data + fb->offset; 626 rect = pixman_image_create_bits(fb->format, r->width, r->height, 627 ptr, fb->stride); 628 629 if (res->image) { 630 pixman_image_ref(res->image); 631 pixman_image_set_destroy_function(rect, virtio_unref_resource, 632 res->image); 633 } 634 635 /* realloc the surface ptr */ 636 scanout->ds = qemu_create_displaysurface_pixman(rect); 637 if (!scanout->ds) { 638 *error = VIRTIO_GPU_RESP_ERR_UNSPEC; 639 return; 640 } 641 642 pixman_image_unref(rect); 643 dpy_gfx_replace_surface(g->parent_obj.scanout[scanout_id].con, 644 scanout->ds); 645 } 646 647 virtio_gpu_update_scanout(g, scanout_id, res, r); 648 } 649 650 static void virtio_gpu_set_scanout(VirtIOGPU *g, 651 struct virtio_gpu_ctrl_command *cmd) 652 { 653 struct virtio_gpu_simple_resource *res; 654 struct virtio_gpu_framebuffer fb = { 0 }; 655 struct virtio_gpu_set_scanout ss; 656 657 VIRTIO_GPU_FILL_CMD(ss); 658 virtio_gpu_bswap_32(&ss, sizeof(ss)); 659 trace_virtio_gpu_cmd_set_scanout(ss.scanout_id, ss.resource_id, 660 ss.r.width, ss.r.height, ss.r.x, ss.r.y); 661 662 if (ss.resource_id == 0) { 663 virtio_gpu_disable_scanout(g, ss.scanout_id); 664 return; 665 } 666 667 res = virtio_gpu_find_check_resource(g, ss.resource_id, true, 668 __func__, &cmd->error); 669 if (!res) { 670 return; 671 } 672 673 fb.format = pixman_image_get_format(res->image); 674 fb.bytes_pp = DIV_ROUND_UP(PIXMAN_FORMAT_BPP(fb.format), 8); 675 fb.width = pixman_image_get_width(res->image); 676 fb.height = pixman_image_get_height(res->image); 677 fb.stride = pixman_image_get_stride(res->image); 678 fb.offset = ss.r.x * fb.bytes_pp + ss.r.y * fb.stride; 679 680 virtio_gpu_do_set_scanout(g, ss.scanout_id, 681 &fb, res, &ss.r, &cmd->error); 682 } 683 684 int virtio_gpu_create_mapping_iov(VirtIOGPU *g, 685 uint32_t nr_entries, uint32_t offset, 686 struct virtio_gpu_ctrl_command *cmd, 687 uint64_t **addr, struct iovec **iov, 688 uint32_t *niov) 689 { 690 struct virtio_gpu_mem_entry *ents; 691 size_t esize, s; 692 int e, v; 693 694 if (nr_entries > 16384) { 695 qemu_log_mask(LOG_GUEST_ERROR, 696 "%s: nr_entries is too big (%d > 16384)\n", 697 __func__, nr_entries); 698 return -1; 699 } 700 701 esize = sizeof(*ents) * nr_entries; 702 ents = g_malloc(esize); 703 s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 704 offset, ents, esize); 705 if (s != esize) { 706 qemu_log_mask(LOG_GUEST_ERROR, 707 "%s: command data size incorrect %zu vs %zu\n", 708 __func__, s, esize); 709 g_free(ents); 710 return -1; 711 } 712 713 *iov = NULL; 714 if (addr) { 715 *addr = NULL; 716 } 717 for (e = 0, v = 0; e < nr_entries; e++) { 718 uint64_t a = le64_to_cpu(ents[e].addr); 719 uint32_t l = le32_to_cpu(ents[e].length); 720 hwaddr len; 721 void *map; 722 723 do { 724 len = l; 725 map = dma_memory_map(VIRTIO_DEVICE(g)->dma_as, 726 a, &len, DMA_DIRECTION_TO_DEVICE); 727 if (!map) { 728 qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to map MMIO memory for" 729 " element %d\n", __func__, e); 730 virtio_gpu_cleanup_mapping_iov(g, *iov, v); 731 g_free(ents); 732 *iov = NULL; 733 if (addr) { 734 g_free(*addr); 735 *addr = NULL; 736 } 737 return -1; 738 } 739 740 if (!(v % 16)) { 741 *iov = g_realloc(*iov, sizeof(struct iovec) * (v + 16)); 742 if (addr) { 743 *addr = g_realloc(*addr, sizeof(uint64_t) * (v + 16)); 744 } 745 } 746 (*iov)[v].iov_base = map; 747 (*iov)[v].iov_len = len; 748 if (addr) { 749 (*addr)[v] = a; 750 } 751 752 a += len; 753 l -= len; 754 v += 1; 755 } while (l > 0); 756 } 757 *niov = v; 758 759 g_free(ents); 760 return 0; 761 } 762 763 void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g, 764 struct iovec *iov, uint32_t count) 765 { 766 int i; 767 768 for (i = 0; i < count; i++) { 769 dma_memory_unmap(VIRTIO_DEVICE(g)->dma_as, 770 iov[i].iov_base, iov[i].iov_len, 771 DMA_DIRECTION_TO_DEVICE, 772 iov[i].iov_len); 773 } 774 g_free(iov); 775 } 776 777 static void virtio_gpu_cleanup_mapping(VirtIOGPU *g, 778 struct virtio_gpu_simple_resource *res) 779 { 780 virtio_gpu_cleanup_mapping_iov(g, res->iov, res->iov_cnt); 781 res->iov = NULL; 782 res->iov_cnt = 0; 783 g_free(res->addrs); 784 res->addrs = NULL; 785 786 if (res->blob) { 787 virtio_gpu_fini_udmabuf(res); 788 } 789 } 790 791 static void 792 virtio_gpu_resource_attach_backing(VirtIOGPU *g, 793 struct virtio_gpu_ctrl_command *cmd) 794 { 795 struct virtio_gpu_simple_resource *res; 796 struct virtio_gpu_resource_attach_backing ab; 797 int ret; 798 799 VIRTIO_GPU_FILL_CMD(ab); 800 virtio_gpu_bswap_32(&ab, sizeof(ab)); 801 trace_virtio_gpu_cmd_res_back_attach(ab.resource_id); 802 803 res = virtio_gpu_find_resource(g, ab.resource_id); 804 if (!res) { 805 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n", 806 __func__, ab.resource_id); 807 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 808 return; 809 } 810 811 if (res->iov) { 812 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; 813 return; 814 } 815 816 ret = virtio_gpu_create_mapping_iov(g, ab.nr_entries, sizeof(ab), cmd, 817 &res->addrs, &res->iov, &res->iov_cnt); 818 if (ret != 0) { 819 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; 820 return; 821 } 822 } 823 824 static void 825 virtio_gpu_resource_detach_backing(VirtIOGPU *g, 826 struct virtio_gpu_ctrl_command *cmd) 827 { 828 struct virtio_gpu_simple_resource *res; 829 struct virtio_gpu_resource_detach_backing detach; 830 831 VIRTIO_GPU_FILL_CMD(detach); 832 virtio_gpu_bswap_32(&detach, sizeof(detach)); 833 trace_virtio_gpu_cmd_res_back_detach(detach.resource_id); 834 835 res = virtio_gpu_find_check_resource(g, detach.resource_id, true, 836 __func__, &cmd->error); 837 if (!res) { 838 return; 839 } 840 virtio_gpu_cleanup_mapping(g, res); 841 } 842 843 void virtio_gpu_simple_process_cmd(VirtIOGPU *g, 844 struct virtio_gpu_ctrl_command *cmd) 845 { 846 VIRTIO_GPU_FILL_CMD(cmd->cmd_hdr); 847 virtio_gpu_ctrl_hdr_bswap(&cmd->cmd_hdr); 848 849 switch (cmd->cmd_hdr.type) { 850 case VIRTIO_GPU_CMD_GET_DISPLAY_INFO: 851 virtio_gpu_get_display_info(g, cmd); 852 break; 853 case VIRTIO_GPU_CMD_GET_EDID: 854 virtio_gpu_get_edid(g, cmd); 855 break; 856 case VIRTIO_GPU_CMD_RESOURCE_CREATE_2D: 857 virtio_gpu_resource_create_2d(g, cmd); 858 break; 859 case VIRTIO_GPU_CMD_RESOURCE_CREATE_BLOB: 860 if (!virtio_gpu_blob_enabled(g->parent_obj.conf)) { 861 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; 862 break; 863 } 864 virtio_gpu_resource_create_blob(g, cmd); 865 break; 866 case VIRTIO_GPU_CMD_RESOURCE_UNREF: 867 virtio_gpu_resource_unref(g, cmd); 868 break; 869 case VIRTIO_GPU_CMD_RESOURCE_FLUSH: 870 virtio_gpu_resource_flush(g, cmd); 871 break; 872 case VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D: 873 virtio_gpu_transfer_to_host_2d(g, cmd); 874 break; 875 case VIRTIO_GPU_CMD_SET_SCANOUT: 876 virtio_gpu_set_scanout(g, cmd); 877 break; 878 case VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING: 879 virtio_gpu_resource_attach_backing(g, cmd); 880 break; 881 case VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING: 882 virtio_gpu_resource_detach_backing(g, cmd); 883 break; 884 default: 885 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; 886 break; 887 } 888 if (!cmd->finished) { 889 virtio_gpu_ctrl_response_nodata(g, cmd, cmd->error ? cmd->error : 890 VIRTIO_GPU_RESP_OK_NODATA); 891 } 892 } 893 894 static void virtio_gpu_handle_ctrl_cb(VirtIODevice *vdev, VirtQueue *vq) 895 { 896 VirtIOGPU *g = VIRTIO_GPU(vdev); 897 qemu_bh_schedule(g->ctrl_bh); 898 } 899 900 static void virtio_gpu_handle_cursor_cb(VirtIODevice *vdev, VirtQueue *vq) 901 { 902 VirtIOGPU *g = VIRTIO_GPU(vdev); 903 qemu_bh_schedule(g->cursor_bh); 904 } 905 906 void virtio_gpu_process_cmdq(VirtIOGPU *g) 907 { 908 struct virtio_gpu_ctrl_command *cmd; 909 VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g); 910 911 if (g->processing_cmdq) { 912 return; 913 } 914 g->processing_cmdq = true; 915 while (!QTAILQ_EMPTY(&g->cmdq)) { 916 cmd = QTAILQ_FIRST(&g->cmdq); 917 918 if (g->parent_obj.renderer_blocked) { 919 break; 920 } 921 922 /* process command */ 923 vgc->process_cmd(g, cmd); 924 925 QTAILQ_REMOVE(&g->cmdq, cmd, next); 926 if (virtio_gpu_stats_enabled(g->parent_obj.conf)) { 927 g->stats.requests++; 928 } 929 930 if (!cmd->finished) { 931 QTAILQ_INSERT_TAIL(&g->fenceq, cmd, next); 932 g->inflight++; 933 if (virtio_gpu_stats_enabled(g->parent_obj.conf)) { 934 if (g->stats.max_inflight < g->inflight) { 935 g->stats.max_inflight = g->inflight; 936 } 937 fprintf(stderr, "inflight: %3d (+)\r", g->inflight); 938 } 939 } else { 940 g_free(cmd); 941 } 942 } 943 g->processing_cmdq = false; 944 } 945 946 static void virtio_gpu_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq) 947 { 948 VirtIOGPU *g = VIRTIO_GPU(vdev); 949 struct virtio_gpu_ctrl_command *cmd; 950 951 if (!virtio_queue_ready(vq)) { 952 return; 953 } 954 955 cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command)); 956 while (cmd) { 957 cmd->vq = vq; 958 cmd->error = 0; 959 cmd->finished = false; 960 QTAILQ_INSERT_TAIL(&g->cmdq, cmd, next); 961 cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command)); 962 } 963 964 virtio_gpu_process_cmdq(g); 965 } 966 967 static void virtio_gpu_ctrl_bh(void *opaque) 968 { 969 VirtIOGPU *g = opaque; 970 VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g); 971 972 vgc->handle_ctrl(&g->parent_obj.parent_obj, g->ctrl_vq); 973 } 974 975 static void virtio_gpu_handle_cursor(VirtIODevice *vdev, VirtQueue *vq) 976 { 977 VirtIOGPU *g = VIRTIO_GPU(vdev); 978 VirtQueueElement *elem; 979 size_t s; 980 struct virtio_gpu_update_cursor cursor_info; 981 982 if (!virtio_queue_ready(vq)) { 983 return; 984 } 985 for (;;) { 986 elem = virtqueue_pop(vq, sizeof(VirtQueueElement)); 987 if (!elem) { 988 break; 989 } 990 991 s = iov_to_buf(elem->out_sg, elem->out_num, 0, 992 &cursor_info, sizeof(cursor_info)); 993 if (s != sizeof(cursor_info)) { 994 qemu_log_mask(LOG_GUEST_ERROR, 995 "%s: cursor size incorrect %zu vs %zu\n", 996 __func__, s, sizeof(cursor_info)); 997 } else { 998 virtio_gpu_bswap_32(&cursor_info, sizeof(cursor_info)); 999 update_cursor(g, &cursor_info); 1000 } 1001 virtqueue_push(vq, elem, 0); 1002 virtio_notify(vdev, vq); 1003 g_free(elem); 1004 } 1005 } 1006 1007 static void virtio_gpu_cursor_bh(void *opaque) 1008 { 1009 VirtIOGPU *g = opaque; 1010 virtio_gpu_handle_cursor(&g->parent_obj.parent_obj, g->cursor_vq); 1011 } 1012 1013 static const VMStateDescription vmstate_virtio_gpu_scanout = { 1014 .name = "virtio-gpu-one-scanout", 1015 .version_id = 1, 1016 .fields = (VMStateField[]) { 1017 VMSTATE_UINT32(resource_id, struct virtio_gpu_scanout), 1018 VMSTATE_UINT32(width, struct virtio_gpu_scanout), 1019 VMSTATE_UINT32(height, struct virtio_gpu_scanout), 1020 VMSTATE_INT32(x, struct virtio_gpu_scanout), 1021 VMSTATE_INT32(y, struct virtio_gpu_scanout), 1022 VMSTATE_UINT32(cursor.resource_id, struct virtio_gpu_scanout), 1023 VMSTATE_UINT32(cursor.hot_x, struct virtio_gpu_scanout), 1024 VMSTATE_UINT32(cursor.hot_y, struct virtio_gpu_scanout), 1025 VMSTATE_UINT32(cursor.pos.x, struct virtio_gpu_scanout), 1026 VMSTATE_UINT32(cursor.pos.y, struct virtio_gpu_scanout), 1027 VMSTATE_END_OF_LIST() 1028 }, 1029 }; 1030 1031 static const VMStateDescription vmstate_virtio_gpu_scanouts = { 1032 .name = "virtio-gpu-scanouts", 1033 .version_id = 1, 1034 .fields = (VMStateField[]) { 1035 VMSTATE_INT32(parent_obj.enable, struct VirtIOGPU), 1036 VMSTATE_UINT32_EQUAL(parent_obj.conf.max_outputs, 1037 struct VirtIOGPU, NULL), 1038 VMSTATE_STRUCT_VARRAY_UINT32(parent_obj.scanout, struct VirtIOGPU, 1039 parent_obj.conf.max_outputs, 1, 1040 vmstate_virtio_gpu_scanout, 1041 struct virtio_gpu_scanout), 1042 VMSTATE_END_OF_LIST() 1043 }, 1044 }; 1045 1046 static int virtio_gpu_save(QEMUFile *f, void *opaque, size_t size, 1047 const VMStateField *field, JSONWriter *vmdesc) 1048 { 1049 VirtIOGPU *g = opaque; 1050 struct virtio_gpu_simple_resource *res; 1051 int i; 1052 1053 /* in 2d mode we should never find unprocessed commands here */ 1054 assert(QTAILQ_EMPTY(&g->cmdq)); 1055 1056 QTAILQ_FOREACH(res, &g->reslist, next) { 1057 qemu_put_be32(f, res->resource_id); 1058 qemu_put_be32(f, res->width); 1059 qemu_put_be32(f, res->height); 1060 qemu_put_be32(f, res->format); 1061 qemu_put_be32(f, res->iov_cnt); 1062 for (i = 0; i < res->iov_cnt; i++) { 1063 qemu_put_be64(f, res->addrs[i]); 1064 qemu_put_be32(f, res->iov[i].iov_len); 1065 } 1066 qemu_put_buffer(f, (void *)pixman_image_get_data(res->image), 1067 pixman_image_get_stride(res->image) * res->height); 1068 } 1069 qemu_put_be32(f, 0); /* end of list */ 1070 1071 return vmstate_save_state(f, &vmstate_virtio_gpu_scanouts, g, NULL); 1072 } 1073 1074 static int virtio_gpu_load(QEMUFile *f, void *opaque, size_t size, 1075 const VMStateField *field) 1076 { 1077 VirtIOGPU *g = opaque; 1078 struct virtio_gpu_simple_resource *res; 1079 struct virtio_gpu_scanout *scanout; 1080 uint32_t resource_id, pformat; 1081 int i; 1082 1083 g->hostmem = 0; 1084 1085 resource_id = qemu_get_be32(f); 1086 while (resource_id != 0) { 1087 res = virtio_gpu_find_resource(g, resource_id); 1088 if (res) { 1089 return -EINVAL; 1090 } 1091 1092 res = g_new0(struct virtio_gpu_simple_resource, 1); 1093 res->resource_id = resource_id; 1094 res->width = qemu_get_be32(f); 1095 res->height = qemu_get_be32(f); 1096 res->format = qemu_get_be32(f); 1097 res->iov_cnt = qemu_get_be32(f); 1098 1099 /* allocate */ 1100 pformat = virtio_gpu_get_pixman_format(res->format); 1101 if (!pformat) { 1102 g_free(res); 1103 return -EINVAL; 1104 } 1105 res->image = pixman_image_create_bits(pformat, 1106 res->width, res->height, 1107 NULL, 0); 1108 if (!res->image) { 1109 g_free(res); 1110 return -EINVAL; 1111 } 1112 1113 res->hostmem = calc_image_hostmem(pformat, res->width, res->height); 1114 1115 res->addrs = g_new(uint64_t, res->iov_cnt); 1116 res->iov = g_new(struct iovec, res->iov_cnt); 1117 1118 /* read data */ 1119 for (i = 0; i < res->iov_cnt; i++) { 1120 res->addrs[i] = qemu_get_be64(f); 1121 res->iov[i].iov_len = qemu_get_be32(f); 1122 } 1123 qemu_get_buffer(f, (void *)pixman_image_get_data(res->image), 1124 pixman_image_get_stride(res->image) * res->height); 1125 1126 /* restore mapping */ 1127 for (i = 0; i < res->iov_cnt; i++) { 1128 hwaddr len = res->iov[i].iov_len; 1129 res->iov[i].iov_base = 1130 dma_memory_map(VIRTIO_DEVICE(g)->dma_as, 1131 res->addrs[i], &len, DMA_DIRECTION_TO_DEVICE); 1132 1133 if (!res->iov[i].iov_base || len != res->iov[i].iov_len) { 1134 /* Clean up the half-a-mapping we just created... */ 1135 if (res->iov[i].iov_base) { 1136 dma_memory_unmap(VIRTIO_DEVICE(g)->dma_as, 1137 res->iov[i].iov_base, 1138 len, 1139 DMA_DIRECTION_TO_DEVICE, 1140 0); 1141 } 1142 /* ...and the mappings for previous loop iterations */ 1143 res->iov_cnt = i; 1144 virtio_gpu_cleanup_mapping(g, res); 1145 pixman_image_unref(res->image); 1146 g_free(res); 1147 return -EINVAL; 1148 } 1149 } 1150 1151 QTAILQ_INSERT_HEAD(&g->reslist, res, next); 1152 g->hostmem += res->hostmem; 1153 1154 resource_id = qemu_get_be32(f); 1155 } 1156 1157 /* load & apply scanout state */ 1158 vmstate_load_state(f, &vmstate_virtio_gpu_scanouts, g, 1); 1159 for (i = 0; i < g->parent_obj.conf.max_outputs; i++) { 1160 scanout = &g->parent_obj.scanout[i]; 1161 if (!scanout->resource_id) { 1162 continue; 1163 } 1164 res = virtio_gpu_find_resource(g, scanout->resource_id); 1165 if (!res) { 1166 return -EINVAL; 1167 } 1168 scanout->ds = qemu_create_displaysurface_pixman(res->image); 1169 if (!scanout->ds) { 1170 return -EINVAL; 1171 } 1172 1173 dpy_gfx_replace_surface(scanout->con, scanout->ds); 1174 dpy_gfx_update_full(scanout->con); 1175 if (scanout->cursor.resource_id) { 1176 update_cursor(g, &scanout->cursor); 1177 } 1178 res->scanout_bitmask |= (1 << i); 1179 } 1180 1181 return 0; 1182 } 1183 1184 void virtio_gpu_device_realize(DeviceState *qdev, Error **errp) 1185 { 1186 VirtIODevice *vdev = VIRTIO_DEVICE(qdev); 1187 VirtIOGPU *g = VIRTIO_GPU(qdev); 1188 1189 if (virtio_gpu_blob_enabled(g->parent_obj.conf)) { 1190 if (!virtio_gpu_have_udmabuf()) { 1191 error_setg(errp, "cannot enable blob resources without udmabuf"); 1192 return; 1193 } 1194 1195 if (virtio_gpu_virgl_enabled(g->parent_obj.conf)) { 1196 error_setg(errp, "blobs and virgl are not compatible (yet)"); 1197 return; 1198 } 1199 } 1200 1201 if (!virtio_gpu_base_device_realize(qdev, 1202 virtio_gpu_handle_ctrl_cb, 1203 virtio_gpu_handle_cursor_cb, 1204 errp)) { 1205 return; 1206 } 1207 1208 g->ctrl_vq = virtio_get_queue(vdev, 0); 1209 g->cursor_vq = virtio_get_queue(vdev, 1); 1210 g->ctrl_bh = qemu_bh_new(virtio_gpu_ctrl_bh, g); 1211 g->cursor_bh = qemu_bh_new(virtio_gpu_cursor_bh, g); 1212 QTAILQ_INIT(&g->reslist); 1213 QTAILQ_INIT(&g->cmdq); 1214 QTAILQ_INIT(&g->fenceq); 1215 } 1216 1217 void virtio_gpu_reset(VirtIODevice *vdev) 1218 { 1219 VirtIOGPU *g = VIRTIO_GPU(vdev); 1220 struct virtio_gpu_simple_resource *res, *tmp; 1221 struct virtio_gpu_ctrl_command *cmd; 1222 1223 QTAILQ_FOREACH_SAFE(res, &g->reslist, next, tmp) { 1224 virtio_gpu_resource_destroy(g, res); 1225 } 1226 1227 while (!QTAILQ_EMPTY(&g->cmdq)) { 1228 cmd = QTAILQ_FIRST(&g->cmdq); 1229 QTAILQ_REMOVE(&g->cmdq, cmd, next); 1230 g_free(cmd); 1231 } 1232 1233 while (!QTAILQ_EMPTY(&g->fenceq)) { 1234 cmd = QTAILQ_FIRST(&g->fenceq); 1235 QTAILQ_REMOVE(&g->fenceq, cmd, next); 1236 g->inflight--; 1237 g_free(cmd); 1238 } 1239 1240 virtio_gpu_base_reset(VIRTIO_GPU_BASE(vdev)); 1241 } 1242 1243 static void 1244 virtio_gpu_get_config(VirtIODevice *vdev, uint8_t *config) 1245 { 1246 VirtIOGPUBase *g = VIRTIO_GPU_BASE(vdev); 1247 1248 memcpy(config, &g->virtio_config, sizeof(g->virtio_config)); 1249 } 1250 1251 static void 1252 virtio_gpu_set_config(VirtIODevice *vdev, const uint8_t *config) 1253 { 1254 VirtIOGPUBase *g = VIRTIO_GPU_BASE(vdev); 1255 const struct virtio_gpu_config *vgconfig = 1256 (const struct virtio_gpu_config *)config; 1257 1258 if (vgconfig->events_clear) { 1259 g->virtio_config.events_read &= ~vgconfig->events_clear; 1260 } 1261 } 1262 1263 /* 1264 * For historical reasons virtio_gpu does not adhere to virtio migration 1265 * scheme as described in doc/virtio-migration.txt, in a sense that no 1266 * save/load callback are provided to the core. Instead the device data 1267 * is saved/loaded after the core data. 1268 * 1269 * Because of this we need a special vmsd. 1270 */ 1271 static const VMStateDescription vmstate_virtio_gpu = { 1272 .name = "virtio-gpu", 1273 .minimum_version_id = VIRTIO_GPU_VM_VERSION, 1274 .version_id = VIRTIO_GPU_VM_VERSION, 1275 .fields = (VMStateField[]) { 1276 VMSTATE_VIRTIO_DEVICE /* core */, 1277 { 1278 .name = "virtio-gpu", 1279 .info = &(const VMStateInfo) { 1280 .name = "virtio-gpu", 1281 .get = virtio_gpu_load, 1282 .put = virtio_gpu_save, 1283 }, 1284 .flags = VMS_SINGLE, 1285 } /* device */, 1286 VMSTATE_END_OF_LIST() 1287 }, 1288 }; 1289 1290 static Property virtio_gpu_properties[] = { 1291 VIRTIO_GPU_BASE_PROPERTIES(VirtIOGPU, parent_obj.conf), 1292 DEFINE_PROP_SIZE("max_hostmem", VirtIOGPU, conf_max_hostmem, 1293 256 * MiB), 1294 DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags, 1295 VIRTIO_GPU_FLAG_BLOB_ENABLED, false), 1296 DEFINE_PROP_END_OF_LIST(), 1297 }; 1298 1299 static void virtio_gpu_class_init(ObjectClass *klass, void *data) 1300 { 1301 DeviceClass *dc = DEVICE_CLASS(klass); 1302 VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass); 1303 VirtIOGPUClass *vgc = VIRTIO_GPU_CLASS(klass); 1304 1305 vgc->handle_ctrl = virtio_gpu_handle_ctrl; 1306 vgc->process_cmd = virtio_gpu_simple_process_cmd; 1307 vgc->update_cursor_data = virtio_gpu_update_cursor_data; 1308 1309 vdc->realize = virtio_gpu_device_realize; 1310 vdc->reset = virtio_gpu_reset; 1311 vdc->get_config = virtio_gpu_get_config; 1312 vdc->set_config = virtio_gpu_set_config; 1313 1314 dc->vmsd = &vmstate_virtio_gpu; 1315 device_class_set_props(dc, virtio_gpu_properties); 1316 } 1317 1318 static const TypeInfo virtio_gpu_info = { 1319 .name = TYPE_VIRTIO_GPU, 1320 .parent = TYPE_VIRTIO_GPU_BASE, 1321 .instance_size = sizeof(VirtIOGPU), 1322 .class_size = sizeof(VirtIOGPUClass), 1323 .class_init = virtio_gpu_class_init, 1324 }; 1325 1326 static void virtio_register_types(void) 1327 { 1328 type_register_static(&virtio_gpu_info); 1329 } 1330 1331 type_init(virtio_register_types) 1332