1 /* 2 * Virtio GPU Device 3 * 4 * Copyright Red Hat, Inc. 2013-2014 5 * 6 * Authors: 7 * Dave Airlie <airlied@redhat.com> 8 * Gerd Hoffmann <kraxel@redhat.com> 9 * 10 * This work is licensed under the terms of the GNU GPL, version 2 or later. 11 * See the COPYING file in the top-level directory. 12 */ 13 14 #include "qemu/osdep.h" 15 #include "qemu/units.h" 16 #include "qemu/iov.h" 17 #include "ui/console.h" 18 #include "trace.h" 19 #include "sysemu/dma.h" 20 #include "sysemu/sysemu.h" 21 #include "hw/virtio/virtio.h" 22 #include "migration/qemu-file-types.h" 23 #include "hw/virtio/virtio-gpu.h" 24 #include "hw/virtio/virtio-gpu-bswap.h" 25 #include "hw/virtio/virtio-gpu-pixman.h" 26 #include "hw/virtio/virtio-bus.h" 27 #include "hw/display/edid.h" 28 #include "hw/qdev-properties.h" 29 #include "qemu/log.h" 30 #include "qemu/module.h" 31 #include "qapi/error.h" 32 #include "qemu/error-report.h" 33 34 #define VIRTIO_GPU_VM_VERSION 1 35 36 static struct virtio_gpu_simple_resource* 37 virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id); 38 static struct virtio_gpu_simple_resource * 39 virtio_gpu_find_check_resource(VirtIOGPU *g, uint32_t resource_id, 40 bool require_backing, 41 const char *caller, uint32_t *error); 42 43 static void virtio_gpu_cleanup_mapping(VirtIOGPU *g, 44 struct virtio_gpu_simple_resource *res); 45 46 void virtio_gpu_update_cursor_data(VirtIOGPU *g, 47 struct virtio_gpu_scanout *s, 48 uint32_t resource_id) 49 { 50 struct virtio_gpu_simple_resource *res; 51 uint32_t pixels; 52 53 res = virtio_gpu_find_check_resource(g, resource_id, false, 54 __func__, NULL); 55 if (!res) { 56 return; 57 } 58 59 if (pixman_image_get_width(res->image) != s->current_cursor->width || 60 pixman_image_get_height(res->image) != s->current_cursor->height) { 61 return; 62 } 63 64 pixels = s->current_cursor->width * s->current_cursor->height; 65 memcpy(s->current_cursor->data, 66 pixman_image_get_data(res->image), 67 pixels * sizeof(uint32_t)); 68 } 69 70 static void update_cursor(VirtIOGPU *g, struct virtio_gpu_update_cursor *cursor) 71 { 72 struct virtio_gpu_scanout *s; 73 VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g); 74 bool move = cursor->hdr.type == VIRTIO_GPU_CMD_MOVE_CURSOR; 75 76 if (cursor->pos.scanout_id >= g->parent_obj.conf.max_outputs) { 77 return; 78 } 79 s = &g->parent_obj.scanout[cursor->pos.scanout_id]; 80 81 trace_virtio_gpu_update_cursor(cursor->pos.scanout_id, 82 cursor->pos.x, 83 cursor->pos.y, 84 move ? "move" : "update", 85 cursor->resource_id); 86 87 if (!move) { 88 if (!s->current_cursor) { 89 s->current_cursor = cursor_alloc(64, 64); 90 } 91 92 s->current_cursor->hot_x = cursor->hot_x; 93 s->current_cursor->hot_y = cursor->hot_y; 94 95 if (cursor->resource_id > 0) { 96 vgc->update_cursor_data(g, s, cursor->resource_id); 97 } 98 dpy_cursor_define(s->con, s->current_cursor); 99 100 s->cursor = *cursor; 101 } else { 102 s->cursor.pos.x = cursor->pos.x; 103 s->cursor.pos.y = cursor->pos.y; 104 } 105 dpy_mouse_set(s->con, cursor->pos.x, cursor->pos.y, 106 cursor->resource_id ? 1 : 0); 107 } 108 109 static struct virtio_gpu_simple_resource * 110 virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id) 111 { 112 struct virtio_gpu_simple_resource *res; 113 114 QTAILQ_FOREACH(res, &g->reslist, next) { 115 if (res->resource_id == resource_id) { 116 return res; 117 } 118 } 119 return NULL; 120 } 121 122 static struct virtio_gpu_simple_resource * 123 virtio_gpu_find_check_resource(VirtIOGPU *g, uint32_t resource_id, 124 bool require_backing, 125 const char *caller, uint32_t *error) 126 { 127 struct virtio_gpu_simple_resource *res; 128 129 res = virtio_gpu_find_resource(g, resource_id); 130 if (!res) { 131 qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid resource specified %d\n", 132 caller, resource_id); 133 if (error) { 134 *error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 135 } 136 return NULL; 137 } 138 139 if (require_backing) { 140 if (!res->iov || !res->image) { 141 qemu_log_mask(LOG_GUEST_ERROR, "%s: no backing storage %d\n", 142 caller, resource_id); 143 if (error) { 144 *error = VIRTIO_GPU_RESP_ERR_UNSPEC; 145 } 146 return NULL; 147 } 148 } 149 150 return res; 151 } 152 153 void virtio_gpu_ctrl_response(VirtIOGPU *g, 154 struct virtio_gpu_ctrl_command *cmd, 155 struct virtio_gpu_ctrl_hdr *resp, 156 size_t resp_len) 157 { 158 size_t s; 159 160 if (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_FENCE) { 161 resp->flags |= VIRTIO_GPU_FLAG_FENCE; 162 resp->fence_id = cmd->cmd_hdr.fence_id; 163 resp->ctx_id = cmd->cmd_hdr.ctx_id; 164 } 165 virtio_gpu_ctrl_hdr_bswap(resp); 166 s = iov_from_buf(cmd->elem.in_sg, cmd->elem.in_num, 0, resp, resp_len); 167 if (s != resp_len) { 168 qemu_log_mask(LOG_GUEST_ERROR, 169 "%s: response size incorrect %zu vs %zu\n", 170 __func__, s, resp_len); 171 } 172 virtqueue_push(cmd->vq, &cmd->elem, s); 173 virtio_notify(VIRTIO_DEVICE(g), cmd->vq); 174 cmd->finished = true; 175 } 176 177 void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g, 178 struct virtio_gpu_ctrl_command *cmd, 179 enum virtio_gpu_ctrl_type type) 180 { 181 struct virtio_gpu_ctrl_hdr resp; 182 183 memset(&resp, 0, sizeof(resp)); 184 resp.type = type; 185 virtio_gpu_ctrl_response(g, cmd, &resp, sizeof(resp)); 186 } 187 188 void virtio_gpu_get_display_info(VirtIOGPU *g, 189 struct virtio_gpu_ctrl_command *cmd) 190 { 191 struct virtio_gpu_resp_display_info display_info; 192 193 trace_virtio_gpu_cmd_get_display_info(); 194 memset(&display_info, 0, sizeof(display_info)); 195 display_info.hdr.type = VIRTIO_GPU_RESP_OK_DISPLAY_INFO; 196 virtio_gpu_base_fill_display_info(VIRTIO_GPU_BASE(g), &display_info); 197 virtio_gpu_ctrl_response(g, cmd, &display_info.hdr, 198 sizeof(display_info)); 199 } 200 201 static void 202 virtio_gpu_generate_edid(VirtIOGPU *g, int scanout, 203 struct virtio_gpu_resp_edid *edid) 204 { 205 VirtIOGPUBase *b = VIRTIO_GPU_BASE(g); 206 qemu_edid_info info = { 207 .width_mm = b->req_state[scanout].width_mm, 208 .height_mm = b->req_state[scanout].height_mm, 209 .prefx = b->req_state[scanout].width, 210 .prefy = b->req_state[scanout].height, 211 }; 212 213 edid->size = cpu_to_le32(sizeof(edid->edid)); 214 qemu_edid_generate(edid->edid, sizeof(edid->edid), &info); 215 } 216 217 void virtio_gpu_get_edid(VirtIOGPU *g, 218 struct virtio_gpu_ctrl_command *cmd) 219 { 220 struct virtio_gpu_resp_edid edid; 221 struct virtio_gpu_cmd_get_edid get_edid; 222 VirtIOGPUBase *b = VIRTIO_GPU_BASE(g); 223 224 VIRTIO_GPU_FILL_CMD(get_edid); 225 virtio_gpu_bswap_32(&get_edid, sizeof(get_edid)); 226 227 if (get_edid.scanout >= b->conf.max_outputs) { 228 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; 229 return; 230 } 231 232 trace_virtio_gpu_cmd_get_edid(get_edid.scanout); 233 memset(&edid, 0, sizeof(edid)); 234 edid.hdr.type = VIRTIO_GPU_RESP_OK_EDID; 235 virtio_gpu_generate_edid(g, get_edid.scanout, &edid); 236 virtio_gpu_ctrl_response(g, cmd, &edid.hdr, sizeof(edid)); 237 } 238 239 static uint32_t calc_image_hostmem(pixman_format_code_t pformat, 240 uint32_t width, uint32_t height) 241 { 242 /* Copied from pixman/pixman-bits-image.c, skip integer overflow check. 243 * pixman_image_create_bits will fail in case it overflow. 244 */ 245 246 int bpp = PIXMAN_FORMAT_BPP(pformat); 247 int stride = ((width * bpp + 0x1f) >> 5) * sizeof(uint32_t); 248 return height * stride; 249 } 250 251 static void virtio_gpu_resource_create_2d(VirtIOGPU *g, 252 struct virtio_gpu_ctrl_command *cmd) 253 { 254 pixman_format_code_t pformat; 255 struct virtio_gpu_simple_resource *res; 256 struct virtio_gpu_resource_create_2d c2d; 257 258 VIRTIO_GPU_FILL_CMD(c2d); 259 virtio_gpu_bswap_32(&c2d, sizeof(c2d)); 260 trace_virtio_gpu_cmd_res_create_2d(c2d.resource_id, c2d.format, 261 c2d.width, c2d.height); 262 263 if (c2d.resource_id == 0) { 264 qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n", 265 __func__); 266 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 267 return; 268 } 269 270 res = virtio_gpu_find_resource(g, c2d.resource_id); 271 if (res) { 272 qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already exists %d\n", 273 __func__, c2d.resource_id); 274 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 275 return; 276 } 277 278 res = g_new0(struct virtio_gpu_simple_resource, 1); 279 280 res->width = c2d.width; 281 res->height = c2d.height; 282 res->format = c2d.format; 283 res->resource_id = c2d.resource_id; 284 285 pformat = virtio_gpu_get_pixman_format(c2d.format); 286 if (!pformat) { 287 qemu_log_mask(LOG_GUEST_ERROR, 288 "%s: host couldn't handle guest format %d\n", 289 __func__, c2d.format); 290 g_free(res); 291 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; 292 return; 293 } 294 295 res->hostmem = calc_image_hostmem(pformat, c2d.width, c2d.height); 296 if (res->hostmem + g->hostmem < g->conf_max_hostmem) { 297 res->image = pixman_image_create_bits(pformat, 298 c2d.width, 299 c2d.height, 300 NULL, 0); 301 } 302 303 if (!res->image) { 304 qemu_log_mask(LOG_GUEST_ERROR, 305 "%s: resource creation failed %d %d %d\n", 306 __func__, c2d.resource_id, c2d.width, c2d.height); 307 g_free(res); 308 cmd->error = VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY; 309 return; 310 } 311 312 QTAILQ_INSERT_HEAD(&g->reslist, res, next); 313 g->hostmem += res->hostmem; 314 } 315 316 static void virtio_gpu_disable_scanout(VirtIOGPU *g, int scanout_id) 317 { 318 struct virtio_gpu_scanout *scanout = &g->parent_obj.scanout[scanout_id]; 319 struct virtio_gpu_simple_resource *res; 320 321 if (scanout->resource_id == 0) { 322 return; 323 } 324 325 res = virtio_gpu_find_resource(g, scanout->resource_id); 326 if (res) { 327 res->scanout_bitmask &= ~(1 << scanout_id); 328 } 329 330 dpy_gfx_replace_surface(scanout->con, NULL); 331 scanout->resource_id = 0; 332 scanout->ds = NULL; 333 scanout->width = 0; 334 scanout->height = 0; 335 } 336 337 static void virtio_gpu_resource_destroy(VirtIOGPU *g, 338 struct virtio_gpu_simple_resource *res) 339 { 340 int i; 341 342 if (res->scanout_bitmask) { 343 for (i = 0; i < g->parent_obj.conf.max_outputs; i++) { 344 if (res->scanout_bitmask & (1 << i)) { 345 virtio_gpu_disable_scanout(g, i); 346 } 347 } 348 } 349 350 pixman_image_unref(res->image); 351 virtio_gpu_cleanup_mapping(g, res); 352 QTAILQ_REMOVE(&g->reslist, res, next); 353 g->hostmem -= res->hostmem; 354 g_free(res); 355 } 356 357 static void virtio_gpu_resource_unref(VirtIOGPU *g, 358 struct virtio_gpu_ctrl_command *cmd) 359 { 360 struct virtio_gpu_simple_resource *res; 361 struct virtio_gpu_resource_unref unref; 362 363 VIRTIO_GPU_FILL_CMD(unref); 364 virtio_gpu_bswap_32(&unref, sizeof(unref)); 365 trace_virtio_gpu_cmd_res_unref(unref.resource_id); 366 367 res = virtio_gpu_find_resource(g, unref.resource_id); 368 if (!res) { 369 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n", 370 __func__, unref.resource_id); 371 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 372 return; 373 } 374 virtio_gpu_resource_destroy(g, res); 375 } 376 377 static void virtio_gpu_transfer_to_host_2d(VirtIOGPU *g, 378 struct virtio_gpu_ctrl_command *cmd) 379 { 380 struct virtio_gpu_simple_resource *res; 381 int h; 382 uint32_t src_offset, dst_offset, stride; 383 int bpp; 384 pixman_format_code_t format; 385 struct virtio_gpu_transfer_to_host_2d t2d; 386 387 VIRTIO_GPU_FILL_CMD(t2d); 388 virtio_gpu_t2d_bswap(&t2d); 389 trace_virtio_gpu_cmd_res_xfer_toh_2d(t2d.resource_id); 390 391 res = virtio_gpu_find_check_resource(g, t2d.resource_id, true, 392 __func__, &cmd->error); 393 if (!res) { 394 return; 395 } 396 397 if (t2d.r.x > res->width || 398 t2d.r.y > res->height || 399 t2d.r.width > res->width || 400 t2d.r.height > res->height || 401 t2d.r.x + t2d.r.width > res->width || 402 t2d.r.y + t2d.r.height > res->height) { 403 qemu_log_mask(LOG_GUEST_ERROR, "%s: transfer bounds outside resource" 404 " bounds for resource %d: %d %d %d %d vs %d %d\n", 405 __func__, t2d.resource_id, t2d.r.x, t2d.r.y, 406 t2d.r.width, t2d.r.height, res->width, res->height); 407 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; 408 return; 409 } 410 411 format = pixman_image_get_format(res->image); 412 bpp = DIV_ROUND_UP(PIXMAN_FORMAT_BPP(format), 8); 413 stride = pixman_image_get_stride(res->image); 414 415 if (t2d.offset || t2d.r.x || t2d.r.y || 416 t2d.r.width != pixman_image_get_width(res->image)) { 417 void *img_data = pixman_image_get_data(res->image); 418 for (h = 0; h < t2d.r.height; h++) { 419 src_offset = t2d.offset + stride * h; 420 dst_offset = (t2d.r.y + h) * stride + (t2d.r.x * bpp); 421 422 iov_to_buf(res->iov, res->iov_cnt, src_offset, 423 (uint8_t *)img_data 424 + dst_offset, t2d.r.width * bpp); 425 } 426 } else { 427 iov_to_buf(res->iov, res->iov_cnt, 0, 428 pixman_image_get_data(res->image), 429 pixman_image_get_stride(res->image) 430 * pixman_image_get_height(res->image)); 431 } 432 } 433 434 static void virtio_gpu_resource_flush(VirtIOGPU *g, 435 struct virtio_gpu_ctrl_command *cmd) 436 { 437 struct virtio_gpu_simple_resource *res; 438 struct virtio_gpu_resource_flush rf; 439 pixman_region16_t flush_region; 440 int i; 441 442 VIRTIO_GPU_FILL_CMD(rf); 443 virtio_gpu_bswap_32(&rf, sizeof(rf)); 444 trace_virtio_gpu_cmd_res_flush(rf.resource_id, 445 rf.r.width, rf.r.height, rf.r.x, rf.r.y); 446 447 res = virtio_gpu_find_check_resource(g, rf.resource_id, false, 448 __func__, &cmd->error); 449 if (!res) { 450 return; 451 } 452 453 if (rf.r.x > res->width || 454 rf.r.y > res->height || 455 rf.r.width > res->width || 456 rf.r.height > res->height || 457 rf.r.x + rf.r.width > res->width || 458 rf.r.y + rf.r.height > res->height) { 459 qemu_log_mask(LOG_GUEST_ERROR, "%s: flush bounds outside resource" 460 " bounds for resource %d: %d %d %d %d vs %d %d\n", 461 __func__, rf.resource_id, rf.r.x, rf.r.y, 462 rf.r.width, rf.r.height, res->width, res->height); 463 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; 464 return; 465 } 466 467 pixman_region_init_rect(&flush_region, 468 rf.r.x, rf.r.y, rf.r.width, rf.r.height); 469 for (i = 0; i < g->parent_obj.conf.max_outputs; i++) { 470 struct virtio_gpu_scanout *scanout; 471 pixman_region16_t region, finalregion; 472 pixman_box16_t *extents; 473 474 if (!(res->scanout_bitmask & (1 << i))) { 475 continue; 476 } 477 scanout = &g->parent_obj.scanout[i]; 478 479 pixman_region_init(&finalregion); 480 pixman_region_init_rect(®ion, scanout->x, scanout->y, 481 scanout->width, scanout->height); 482 483 pixman_region_intersect(&finalregion, &flush_region, ®ion); 484 pixman_region_translate(&finalregion, -scanout->x, -scanout->y); 485 extents = pixman_region_extents(&finalregion); 486 /* work out the area we need to update for each console */ 487 dpy_gfx_update(g->parent_obj.scanout[i].con, 488 extents->x1, extents->y1, 489 extents->x2 - extents->x1, 490 extents->y2 - extents->y1); 491 492 pixman_region_fini(®ion); 493 pixman_region_fini(&finalregion); 494 } 495 pixman_region_fini(&flush_region); 496 } 497 498 static void virtio_unref_resource(pixman_image_t *image, void *data) 499 { 500 pixman_image_unref(data); 501 } 502 503 static void virtio_gpu_do_set_scanout(VirtIOGPU *g, 504 uint32_t scanout_id, 505 struct virtio_gpu_framebuffer *fb, 506 struct virtio_gpu_simple_resource *res, 507 struct virtio_gpu_rect *r, 508 uint32_t *error) 509 { 510 struct virtio_gpu_simple_resource *ores; 511 struct virtio_gpu_scanout *scanout; 512 uint8_t *data; 513 514 if (scanout_id >= g->parent_obj.conf.max_outputs) { 515 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout id specified %d", 516 __func__, scanout_id); 517 *error = VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID; 518 return; 519 } 520 scanout = &g->parent_obj.scanout[scanout_id]; 521 522 if (r->x > fb->width || 523 r->y > fb->height || 524 r->width < 16 || 525 r->height < 16 || 526 r->width > fb->width || 527 r->height > fb->height || 528 r->x + r->width > fb->width || 529 r->y + r->height > fb->height) { 530 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout %d bounds for" 531 " resource %d, rect (%d,%d)+%d,%d, fb %d %d\n", 532 __func__, scanout_id, res->resource_id, 533 r->x, r->y, r->width, r->height, 534 fb->width, fb->height); 535 *error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; 536 return; 537 } 538 539 g->parent_obj.enable = 1; 540 data = (uint8_t *)pixman_image_get_data(res->image); 541 542 /* create a surface for this scanout */ 543 if (!scanout->ds || 544 surface_data(scanout->ds) != data + fb->offset || 545 scanout->width != r->width || 546 scanout->height != r->height) { 547 pixman_image_t *rect; 548 void *ptr = data + fb->offset; 549 rect = pixman_image_create_bits(fb->format, r->width, r->height, 550 ptr, fb->stride); 551 552 if (res->image) { 553 pixman_image_ref(res->image); 554 pixman_image_set_destroy_function(rect, virtio_unref_resource, 555 res->image); 556 } 557 558 /* realloc the surface ptr */ 559 scanout->ds = qemu_create_displaysurface_pixman(rect); 560 if (!scanout->ds) { 561 *error = VIRTIO_GPU_RESP_ERR_UNSPEC; 562 return; 563 } 564 565 pixman_image_unref(rect); 566 dpy_gfx_replace_surface(g->parent_obj.scanout[scanout_id].con, 567 scanout->ds); 568 } 569 570 ores = virtio_gpu_find_resource(g, scanout->resource_id); 571 if (ores) { 572 ores->scanout_bitmask &= ~(1 << scanout_id); 573 } 574 575 res->scanout_bitmask |= (1 << scanout_id); 576 scanout->resource_id = res->resource_id; 577 scanout->x = r->x; 578 scanout->y = r->y; 579 scanout->width = r->width; 580 scanout->height = r->height; 581 } 582 583 static void virtio_gpu_set_scanout(VirtIOGPU *g, 584 struct virtio_gpu_ctrl_command *cmd) 585 { 586 struct virtio_gpu_simple_resource *res; 587 struct virtio_gpu_framebuffer fb = { 0 }; 588 struct virtio_gpu_set_scanout ss; 589 590 VIRTIO_GPU_FILL_CMD(ss); 591 virtio_gpu_bswap_32(&ss, sizeof(ss)); 592 trace_virtio_gpu_cmd_set_scanout(ss.scanout_id, ss.resource_id, 593 ss.r.width, ss.r.height, ss.r.x, ss.r.y); 594 595 if (ss.resource_id == 0) { 596 virtio_gpu_disable_scanout(g, ss.scanout_id); 597 return; 598 } 599 600 res = virtio_gpu_find_check_resource(g, ss.resource_id, true, 601 __func__, &cmd->error); 602 if (!res) { 603 return; 604 } 605 606 fb.format = pixman_image_get_format(res->image); 607 fb.bytes_pp = DIV_ROUND_UP(PIXMAN_FORMAT_BPP(fb.format), 8); 608 fb.width = pixman_image_get_width(res->image); 609 fb.height = pixman_image_get_height(res->image); 610 fb.stride = pixman_image_get_stride(res->image); 611 fb.offset = ss.r.x * fb.bytes_pp + ss.r.y * fb.stride; 612 613 virtio_gpu_do_set_scanout(g, ss.scanout_id, 614 &fb, res, &ss.r, &cmd->error); 615 } 616 617 int virtio_gpu_create_mapping_iov(VirtIOGPU *g, 618 uint32_t nr_entries, uint32_t offset, 619 struct virtio_gpu_ctrl_command *cmd, 620 uint64_t **addr, struct iovec **iov, 621 uint32_t *niov) 622 { 623 struct virtio_gpu_mem_entry *ents; 624 size_t esize, s; 625 int e, v; 626 627 if (nr_entries > 16384) { 628 qemu_log_mask(LOG_GUEST_ERROR, 629 "%s: nr_entries is too big (%d > 16384)\n", 630 __func__, nr_entries); 631 return -1; 632 } 633 634 esize = sizeof(*ents) * nr_entries; 635 ents = g_malloc(esize); 636 s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 637 offset, ents, esize); 638 if (s != esize) { 639 qemu_log_mask(LOG_GUEST_ERROR, 640 "%s: command data size incorrect %zu vs %zu\n", 641 __func__, s, esize); 642 g_free(ents); 643 return -1; 644 } 645 646 *iov = NULL; 647 if (addr) { 648 *addr = NULL; 649 } 650 for (e = 0, v = 0; e < nr_entries; e++) { 651 uint64_t a = le64_to_cpu(ents[e].addr); 652 uint32_t l = le32_to_cpu(ents[e].length); 653 hwaddr len; 654 void *map; 655 656 do { 657 len = l; 658 map = dma_memory_map(VIRTIO_DEVICE(g)->dma_as, 659 a, &len, DMA_DIRECTION_TO_DEVICE); 660 if (!map) { 661 qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to map MMIO memory for" 662 " element %d\n", __func__, e); 663 virtio_gpu_cleanup_mapping_iov(g, *iov, v); 664 g_free(ents); 665 *iov = NULL; 666 if (addr) { 667 g_free(*addr); 668 *addr = NULL; 669 } 670 return -1; 671 } 672 673 if (!(v % 16)) { 674 *iov = g_realloc(*iov, sizeof(struct iovec) * (v + 16)); 675 if (addr) { 676 *addr = g_realloc(*addr, sizeof(uint64_t) * (v + 16)); 677 } 678 } 679 (*iov)[v].iov_base = map; 680 (*iov)[v].iov_len = len; 681 if (addr) { 682 (*addr)[v] = a; 683 } 684 685 a += len; 686 l -= len; 687 v += 1; 688 } while (l > 0); 689 } 690 *niov = v; 691 692 g_free(ents); 693 return 0; 694 } 695 696 void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g, 697 struct iovec *iov, uint32_t count) 698 { 699 int i; 700 701 for (i = 0; i < count; i++) { 702 dma_memory_unmap(VIRTIO_DEVICE(g)->dma_as, 703 iov[i].iov_base, iov[i].iov_len, 704 DMA_DIRECTION_TO_DEVICE, 705 iov[i].iov_len); 706 } 707 g_free(iov); 708 } 709 710 static void virtio_gpu_cleanup_mapping(VirtIOGPU *g, 711 struct virtio_gpu_simple_resource *res) 712 { 713 virtio_gpu_cleanup_mapping_iov(g, res->iov, res->iov_cnt); 714 res->iov = NULL; 715 res->iov_cnt = 0; 716 g_free(res->addrs); 717 res->addrs = NULL; 718 } 719 720 static void 721 virtio_gpu_resource_attach_backing(VirtIOGPU *g, 722 struct virtio_gpu_ctrl_command *cmd) 723 { 724 struct virtio_gpu_simple_resource *res; 725 struct virtio_gpu_resource_attach_backing ab; 726 int ret; 727 728 VIRTIO_GPU_FILL_CMD(ab); 729 virtio_gpu_bswap_32(&ab, sizeof(ab)); 730 trace_virtio_gpu_cmd_res_back_attach(ab.resource_id); 731 732 res = virtio_gpu_find_resource(g, ab.resource_id); 733 if (!res) { 734 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n", 735 __func__, ab.resource_id); 736 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 737 return; 738 } 739 740 if (res->iov) { 741 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; 742 return; 743 } 744 745 ret = virtio_gpu_create_mapping_iov(g, ab.nr_entries, sizeof(ab), cmd, 746 &res->addrs, &res->iov, &res->iov_cnt); 747 if (ret != 0) { 748 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; 749 return; 750 } 751 } 752 753 static void 754 virtio_gpu_resource_detach_backing(VirtIOGPU *g, 755 struct virtio_gpu_ctrl_command *cmd) 756 { 757 struct virtio_gpu_simple_resource *res; 758 struct virtio_gpu_resource_detach_backing detach; 759 760 VIRTIO_GPU_FILL_CMD(detach); 761 virtio_gpu_bswap_32(&detach, sizeof(detach)); 762 trace_virtio_gpu_cmd_res_back_detach(detach.resource_id); 763 764 res = virtio_gpu_find_check_resource(g, detach.resource_id, true, 765 __func__, &cmd->error); 766 if (!res) { 767 return; 768 } 769 virtio_gpu_cleanup_mapping(g, res); 770 } 771 772 void virtio_gpu_simple_process_cmd(VirtIOGPU *g, 773 struct virtio_gpu_ctrl_command *cmd) 774 { 775 VIRTIO_GPU_FILL_CMD(cmd->cmd_hdr); 776 virtio_gpu_ctrl_hdr_bswap(&cmd->cmd_hdr); 777 778 switch (cmd->cmd_hdr.type) { 779 case VIRTIO_GPU_CMD_GET_DISPLAY_INFO: 780 virtio_gpu_get_display_info(g, cmd); 781 break; 782 case VIRTIO_GPU_CMD_GET_EDID: 783 virtio_gpu_get_edid(g, cmd); 784 break; 785 case VIRTIO_GPU_CMD_RESOURCE_CREATE_2D: 786 virtio_gpu_resource_create_2d(g, cmd); 787 break; 788 case VIRTIO_GPU_CMD_RESOURCE_UNREF: 789 virtio_gpu_resource_unref(g, cmd); 790 break; 791 case VIRTIO_GPU_CMD_RESOURCE_FLUSH: 792 virtio_gpu_resource_flush(g, cmd); 793 break; 794 case VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D: 795 virtio_gpu_transfer_to_host_2d(g, cmd); 796 break; 797 case VIRTIO_GPU_CMD_SET_SCANOUT: 798 virtio_gpu_set_scanout(g, cmd); 799 break; 800 case VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING: 801 virtio_gpu_resource_attach_backing(g, cmd); 802 break; 803 case VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING: 804 virtio_gpu_resource_detach_backing(g, cmd); 805 break; 806 default: 807 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; 808 break; 809 } 810 if (!cmd->finished) { 811 virtio_gpu_ctrl_response_nodata(g, cmd, cmd->error ? cmd->error : 812 VIRTIO_GPU_RESP_OK_NODATA); 813 } 814 } 815 816 static void virtio_gpu_handle_ctrl_cb(VirtIODevice *vdev, VirtQueue *vq) 817 { 818 VirtIOGPU *g = VIRTIO_GPU(vdev); 819 qemu_bh_schedule(g->ctrl_bh); 820 } 821 822 static void virtio_gpu_handle_cursor_cb(VirtIODevice *vdev, VirtQueue *vq) 823 { 824 VirtIOGPU *g = VIRTIO_GPU(vdev); 825 qemu_bh_schedule(g->cursor_bh); 826 } 827 828 void virtio_gpu_process_cmdq(VirtIOGPU *g) 829 { 830 struct virtio_gpu_ctrl_command *cmd; 831 VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g); 832 833 if (g->processing_cmdq) { 834 return; 835 } 836 g->processing_cmdq = true; 837 while (!QTAILQ_EMPTY(&g->cmdq)) { 838 cmd = QTAILQ_FIRST(&g->cmdq); 839 840 if (g->parent_obj.renderer_blocked) { 841 break; 842 } 843 844 /* process command */ 845 vgc->process_cmd(g, cmd); 846 847 QTAILQ_REMOVE(&g->cmdq, cmd, next); 848 if (virtio_gpu_stats_enabled(g->parent_obj.conf)) { 849 g->stats.requests++; 850 } 851 852 if (!cmd->finished) { 853 QTAILQ_INSERT_TAIL(&g->fenceq, cmd, next); 854 g->inflight++; 855 if (virtio_gpu_stats_enabled(g->parent_obj.conf)) { 856 if (g->stats.max_inflight < g->inflight) { 857 g->stats.max_inflight = g->inflight; 858 } 859 fprintf(stderr, "inflight: %3d (+)\r", g->inflight); 860 } 861 } else { 862 g_free(cmd); 863 } 864 } 865 g->processing_cmdq = false; 866 } 867 868 static void virtio_gpu_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq) 869 { 870 VirtIOGPU *g = VIRTIO_GPU(vdev); 871 struct virtio_gpu_ctrl_command *cmd; 872 873 if (!virtio_queue_ready(vq)) { 874 return; 875 } 876 877 cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command)); 878 while (cmd) { 879 cmd->vq = vq; 880 cmd->error = 0; 881 cmd->finished = false; 882 QTAILQ_INSERT_TAIL(&g->cmdq, cmd, next); 883 cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command)); 884 } 885 886 virtio_gpu_process_cmdq(g); 887 } 888 889 static void virtio_gpu_ctrl_bh(void *opaque) 890 { 891 VirtIOGPU *g = opaque; 892 VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g); 893 894 vgc->handle_ctrl(&g->parent_obj.parent_obj, g->ctrl_vq); 895 } 896 897 static void virtio_gpu_handle_cursor(VirtIODevice *vdev, VirtQueue *vq) 898 { 899 VirtIOGPU *g = VIRTIO_GPU(vdev); 900 VirtQueueElement *elem; 901 size_t s; 902 struct virtio_gpu_update_cursor cursor_info; 903 904 if (!virtio_queue_ready(vq)) { 905 return; 906 } 907 for (;;) { 908 elem = virtqueue_pop(vq, sizeof(VirtQueueElement)); 909 if (!elem) { 910 break; 911 } 912 913 s = iov_to_buf(elem->out_sg, elem->out_num, 0, 914 &cursor_info, sizeof(cursor_info)); 915 if (s != sizeof(cursor_info)) { 916 qemu_log_mask(LOG_GUEST_ERROR, 917 "%s: cursor size incorrect %zu vs %zu\n", 918 __func__, s, sizeof(cursor_info)); 919 } else { 920 virtio_gpu_bswap_32(&cursor_info, sizeof(cursor_info)); 921 update_cursor(g, &cursor_info); 922 } 923 virtqueue_push(vq, elem, 0); 924 virtio_notify(vdev, vq); 925 g_free(elem); 926 } 927 } 928 929 static void virtio_gpu_cursor_bh(void *opaque) 930 { 931 VirtIOGPU *g = opaque; 932 virtio_gpu_handle_cursor(&g->parent_obj.parent_obj, g->cursor_vq); 933 } 934 935 static const VMStateDescription vmstate_virtio_gpu_scanout = { 936 .name = "virtio-gpu-one-scanout", 937 .version_id = 1, 938 .fields = (VMStateField[]) { 939 VMSTATE_UINT32(resource_id, struct virtio_gpu_scanout), 940 VMSTATE_UINT32(width, struct virtio_gpu_scanout), 941 VMSTATE_UINT32(height, struct virtio_gpu_scanout), 942 VMSTATE_INT32(x, struct virtio_gpu_scanout), 943 VMSTATE_INT32(y, struct virtio_gpu_scanout), 944 VMSTATE_UINT32(cursor.resource_id, struct virtio_gpu_scanout), 945 VMSTATE_UINT32(cursor.hot_x, struct virtio_gpu_scanout), 946 VMSTATE_UINT32(cursor.hot_y, struct virtio_gpu_scanout), 947 VMSTATE_UINT32(cursor.pos.x, struct virtio_gpu_scanout), 948 VMSTATE_UINT32(cursor.pos.y, struct virtio_gpu_scanout), 949 VMSTATE_END_OF_LIST() 950 }, 951 }; 952 953 static const VMStateDescription vmstate_virtio_gpu_scanouts = { 954 .name = "virtio-gpu-scanouts", 955 .version_id = 1, 956 .fields = (VMStateField[]) { 957 VMSTATE_INT32(parent_obj.enable, struct VirtIOGPU), 958 VMSTATE_UINT32_EQUAL(parent_obj.conf.max_outputs, 959 struct VirtIOGPU, NULL), 960 VMSTATE_STRUCT_VARRAY_UINT32(parent_obj.scanout, struct VirtIOGPU, 961 parent_obj.conf.max_outputs, 1, 962 vmstate_virtio_gpu_scanout, 963 struct virtio_gpu_scanout), 964 VMSTATE_END_OF_LIST() 965 }, 966 }; 967 968 static int virtio_gpu_save(QEMUFile *f, void *opaque, size_t size, 969 const VMStateField *field, JSONWriter *vmdesc) 970 { 971 VirtIOGPU *g = opaque; 972 struct virtio_gpu_simple_resource *res; 973 int i; 974 975 /* in 2d mode we should never find unprocessed commands here */ 976 assert(QTAILQ_EMPTY(&g->cmdq)); 977 978 QTAILQ_FOREACH(res, &g->reslist, next) { 979 qemu_put_be32(f, res->resource_id); 980 qemu_put_be32(f, res->width); 981 qemu_put_be32(f, res->height); 982 qemu_put_be32(f, res->format); 983 qemu_put_be32(f, res->iov_cnt); 984 for (i = 0; i < res->iov_cnt; i++) { 985 qemu_put_be64(f, res->addrs[i]); 986 qemu_put_be32(f, res->iov[i].iov_len); 987 } 988 qemu_put_buffer(f, (void *)pixman_image_get_data(res->image), 989 pixman_image_get_stride(res->image) * res->height); 990 } 991 qemu_put_be32(f, 0); /* end of list */ 992 993 return vmstate_save_state(f, &vmstate_virtio_gpu_scanouts, g, NULL); 994 } 995 996 static int virtio_gpu_load(QEMUFile *f, void *opaque, size_t size, 997 const VMStateField *field) 998 { 999 VirtIOGPU *g = opaque; 1000 struct virtio_gpu_simple_resource *res; 1001 struct virtio_gpu_scanout *scanout; 1002 uint32_t resource_id, pformat; 1003 int i; 1004 1005 g->hostmem = 0; 1006 1007 resource_id = qemu_get_be32(f); 1008 while (resource_id != 0) { 1009 res = virtio_gpu_find_resource(g, resource_id); 1010 if (res) { 1011 return -EINVAL; 1012 } 1013 1014 res = g_new0(struct virtio_gpu_simple_resource, 1); 1015 res->resource_id = resource_id; 1016 res->width = qemu_get_be32(f); 1017 res->height = qemu_get_be32(f); 1018 res->format = qemu_get_be32(f); 1019 res->iov_cnt = qemu_get_be32(f); 1020 1021 /* allocate */ 1022 pformat = virtio_gpu_get_pixman_format(res->format); 1023 if (!pformat) { 1024 g_free(res); 1025 return -EINVAL; 1026 } 1027 res->image = pixman_image_create_bits(pformat, 1028 res->width, res->height, 1029 NULL, 0); 1030 if (!res->image) { 1031 g_free(res); 1032 return -EINVAL; 1033 } 1034 1035 res->hostmem = calc_image_hostmem(pformat, res->width, res->height); 1036 1037 res->addrs = g_new(uint64_t, res->iov_cnt); 1038 res->iov = g_new(struct iovec, res->iov_cnt); 1039 1040 /* read data */ 1041 for (i = 0; i < res->iov_cnt; i++) { 1042 res->addrs[i] = qemu_get_be64(f); 1043 res->iov[i].iov_len = qemu_get_be32(f); 1044 } 1045 qemu_get_buffer(f, (void *)pixman_image_get_data(res->image), 1046 pixman_image_get_stride(res->image) * res->height); 1047 1048 /* restore mapping */ 1049 for (i = 0; i < res->iov_cnt; i++) { 1050 hwaddr len = res->iov[i].iov_len; 1051 res->iov[i].iov_base = 1052 dma_memory_map(VIRTIO_DEVICE(g)->dma_as, 1053 res->addrs[i], &len, DMA_DIRECTION_TO_DEVICE); 1054 1055 if (!res->iov[i].iov_base || len != res->iov[i].iov_len) { 1056 /* Clean up the half-a-mapping we just created... */ 1057 if (res->iov[i].iov_base) { 1058 dma_memory_unmap(VIRTIO_DEVICE(g)->dma_as, 1059 res->iov[i].iov_base, 1060 len, 1061 DMA_DIRECTION_TO_DEVICE, 1062 0); 1063 } 1064 /* ...and the mappings for previous loop iterations */ 1065 res->iov_cnt = i; 1066 virtio_gpu_cleanup_mapping(g, res); 1067 pixman_image_unref(res->image); 1068 g_free(res); 1069 return -EINVAL; 1070 } 1071 } 1072 1073 QTAILQ_INSERT_HEAD(&g->reslist, res, next); 1074 g->hostmem += res->hostmem; 1075 1076 resource_id = qemu_get_be32(f); 1077 } 1078 1079 /* load & apply scanout state */ 1080 vmstate_load_state(f, &vmstate_virtio_gpu_scanouts, g, 1); 1081 for (i = 0; i < g->parent_obj.conf.max_outputs; i++) { 1082 scanout = &g->parent_obj.scanout[i]; 1083 if (!scanout->resource_id) { 1084 continue; 1085 } 1086 res = virtio_gpu_find_resource(g, scanout->resource_id); 1087 if (!res) { 1088 return -EINVAL; 1089 } 1090 scanout->ds = qemu_create_displaysurface_pixman(res->image); 1091 if (!scanout->ds) { 1092 return -EINVAL; 1093 } 1094 1095 dpy_gfx_replace_surface(scanout->con, scanout->ds); 1096 dpy_gfx_update_full(scanout->con); 1097 if (scanout->cursor.resource_id) { 1098 update_cursor(g, &scanout->cursor); 1099 } 1100 res->scanout_bitmask |= (1 << i); 1101 } 1102 1103 return 0; 1104 } 1105 1106 void virtio_gpu_device_realize(DeviceState *qdev, Error **errp) 1107 { 1108 VirtIODevice *vdev = VIRTIO_DEVICE(qdev); 1109 VirtIOGPU *g = VIRTIO_GPU(qdev); 1110 1111 if (!virtio_gpu_base_device_realize(qdev, 1112 virtio_gpu_handle_ctrl_cb, 1113 virtio_gpu_handle_cursor_cb, 1114 errp)) { 1115 return; 1116 } 1117 1118 g->ctrl_vq = virtio_get_queue(vdev, 0); 1119 g->cursor_vq = virtio_get_queue(vdev, 1); 1120 g->ctrl_bh = qemu_bh_new(virtio_gpu_ctrl_bh, g); 1121 g->cursor_bh = qemu_bh_new(virtio_gpu_cursor_bh, g); 1122 QTAILQ_INIT(&g->reslist); 1123 QTAILQ_INIT(&g->cmdq); 1124 QTAILQ_INIT(&g->fenceq); 1125 } 1126 1127 void virtio_gpu_reset(VirtIODevice *vdev) 1128 { 1129 VirtIOGPU *g = VIRTIO_GPU(vdev); 1130 struct virtio_gpu_simple_resource *res, *tmp; 1131 struct virtio_gpu_ctrl_command *cmd; 1132 1133 QTAILQ_FOREACH_SAFE(res, &g->reslist, next, tmp) { 1134 virtio_gpu_resource_destroy(g, res); 1135 } 1136 1137 while (!QTAILQ_EMPTY(&g->cmdq)) { 1138 cmd = QTAILQ_FIRST(&g->cmdq); 1139 QTAILQ_REMOVE(&g->cmdq, cmd, next); 1140 g_free(cmd); 1141 } 1142 1143 while (!QTAILQ_EMPTY(&g->fenceq)) { 1144 cmd = QTAILQ_FIRST(&g->fenceq); 1145 QTAILQ_REMOVE(&g->fenceq, cmd, next); 1146 g->inflight--; 1147 g_free(cmd); 1148 } 1149 1150 virtio_gpu_base_reset(VIRTIO_GPU_BASE(vdev)); 1151 } 1152 1153 static void 1154 virtio_gpu_get_config(VirtIODevice *vdev, uint8_t *config) 1155 { 1156 VirtIOGPUBase *g = VIRTIO_GPU_BASE(vdev); 1157 1158 memcpy(config, &g->virtio_config, sizeof(g->virtio_config)); 1159 } 1160 1161 static void 1162 virtio_gpu_set_config(VirtIODevice *vdev, const uint8_t *config) 1163 { 1164 VirtIOGPUBase *g = VIRTIO_GPU_BASE(vdev); 1165 const struct virtio_gpu_config *vgconfig = 1166 (const struct virtio_gpu_config *)config; 1167 1168 if (vgconfig->events_clear) { 1169 g->virtio_config.events_read &= ~vgconfig->events_clear; 1170 } 1171 } 1172 1173 /* 1174 * For historical reasons virtio_gpu does not adhere to virtio migration 1175 * scheme as described in doc/virtio-migration.txt, in a sense that no 1176 * save/load callback are provided to the core. Instead the device data 1177 * is saved/loaded after the core data. 1178 * 1179 * Because of this we need a special vmsd. 1180 */ 1181 static const VMStateDescription vmstate_virtio_gpu = { 1182 .name = "virtio-gpu", 1183 .minimum_version_id = VIRTIO_GPU_VM_VERSION, 1184 .version_id = VIRTIO_GPU_VM_VERSION, 1185 .fields = (VMStateField[]) { 1186 VMSTATE_VIRTIO_DEVICE /* core */, 1187 { 1188 .name = "virtio-gpu", 1189 .info = &(const VMStateInfo) { 1190 .name = "virtio-gpu", 1191 .get = virtio_gpu_load, 1192 .put = virtio_gpu_save, 1193 }, 1194 .flags = VMS_SINGLE, 1195 } /* device */, 1196 VMSTATE_END_OF_LIST() 1197 }, 1198 }; 1199 1200 static Property virtio_gpu_properties[] = { 1201 VIRTIO_GPU_BASE_PROPERTIES(VirtIOGPU, parent_obj.conf), 1202 DEFINE_PROP_SIZE("max_hostmem", VirtIOGPU, conf_max_hostmem, 1203 256 * MiB), 1204 DEFINE_PROP_END_OF_LIST(), 1205 }; 1206 1207 static void virtio_gpu_class_init(ObjectClass *klass, void *data) 1208 { 1209 DeviceClass *dc = DEVICE_CLASS(klass); 1210 VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass); 1211 VirtIOGPUClass *vgc = VIRTIO_GPU_CLASS(klass); 1212 1213 vgc->handle_ctrl = virtio_gpu_handle_ctrl; 1214 vgc->process_cmd = virtio_gpu_simple_process_cmd; 1215 vgc->update_cursor_data = virtio_gpu_update_cursor_data; 1216 1217 vdc->realize = virtio_gpu_device_realize; 1218 vdc->reset = virtio_gpu_reset; 1219 vdc->get_config = virtio_gpu_get_config; 1220 vdc->set_config = virtio_gpu_set_config; 1221 1222 dc->vmsd = &vmstate_virtio_gpu; 1223 device_class_set_props(dc, virtio_gpu_properties); 1224 } 1225 1226 static const TypeInfo virtio_gpu_info = { 1227 .name = TYPE_VIRTIO_GPU, 1228 .parent = TYPE_VIRTIO_GPU_BASE, 1229 .instance_size = sizeof(VirtIOGPU), 1230 .class_size = sizeof(VirtIOGPUClass), 1231 .class_init = virtio_gpu_class_init, 1232 }; 1233 1234 static void virtio_register_types(void) 1235 { 1236 type_register_static(&virtio_gpu_info); 1237 } 1238 1239 type_init(virtio_register_types) 1240