1 /* 2 * Virtio GPU Device 3 * 4 * Copyright Red Hat, Inc. 2013-2014 5 * 6 * Authors: 7 * Dave Airlie <airlied@redhat.com> 8 * Gerd Hoffmann <kraxel@redhat.com> 9 * 10 * This work is licensed under the terms of the GNU GPL, version 2 or later. 11 * See the COPYING file in the top-level directory. 12 */ 13 14 #include "qemu/osdep.h" 15 #include "qemu/units.h" 16 #include "qemu/iov.h" 17 #include "ui/console.h" 18 #include "trace.h" 19 #include "sysemu/dma.h" 20 #include "hw/virtio/virtio.h" 21 #include "migration/qemu-file-types.h" 22 #include "hw/virtio/virtio-gpu.h" 23 #include "hw/virtio/virtio-gpu-bswap.h" 24 #include "hw/virtio/virtio-gpu-pixman.h" 25 #include "hw/virtio/virtio-bus.h" 26 #include "hw/display/edid.h" 27 #include "qemu/log.h" 28 #include "qemu/module.h" 29 #include "qapi/error.h" 30 #include "qemu/error-report.h" 31 32 #define VIRTIO_GPU_VM_VERSION 1 33 34 static struct virtio_gpu_simple_resource* 35 virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id); 36 37 static void virtio_gpu_cleanup_mapping(VirtIOGPU *g, 38 struct virtio_gpu_simple_resource *res); 39 40 #ifdef CONFIG_VIRGL 41 #include <virglrenderer.h> 42 #define VIRGL(_g, _virgl, _simple, ...) \ 43 do { \ 44 if (_g->parent_obj.use_virgl_renderer) { \ 45 _virgl(__VA_ARGS__); \ 46 } else { \ 47 _simple(__VA_ARGS__); \ 48 } \ 49 } while (0) 50 #else 51 #define VIRGL(_g, _virgl, _simple, ...) \ 52 do { \ 53 _simple(__VA_ARGS__); \ 54 } while (0) 55 #endif 56 57 static void update_cursor_data_simple(VirtIOGPU *g, 58 struct virtio_gpu_scanout *s, 59 uint32_t resource_id) 60 { 61 struct virtio_gpu_simple_resource *res; 62 uint32_t pixels; 63 64 res = virtio_gpu_find_resource(g, resource_id); 65 if (!res) { 66 return; 67 } 68 69 if (pixman_image_get_width(res->image) != s->current_cursor->width || 70 pixman_image_get_height(res->image) != s->current_cursor->height) { 71 return; 72 } 73 74 pixels = s->current_cursor->width * s->current_cursor->height; 75 memcpy(s->current_cursor->data, 76 pixman_image_get_data(res->image), 77 pixels * sizeof(uint32_t)); 78 } 79 80 #ifdef CONFIG_VIRGL 81 82 static void update_cursor_data_virgl(VirtIOGPU *g, 83 struct virtio_gpu_scanout *s, 84 uint32_t resource_id) 85 { 86 uint32_t width, height; 87 uint32_t pixels, *data; 88 89 data = virgl_renderer_get_cursor_data(resource_id, &width, &height); 90 if (!data) { 91 return; 92 } 93 94 if (width != s->current_cursor->width || 95 height != s->current_cursor->height) { 96 free(data); 97 return; 98 } 99 100 pixels = s->current_cursor->width * s->current_cursor->height; 101 memcpy(s->current_cursor->data, data, pixels * sizeof(uint32_t)); 102 free(data); 103 } 104 105 #endif 106 107 static void update_cursor(VirtIOGPU *g, struct virtio_gpu_update_cursor *cursor) 108 { 109 struct virtio_gpu_scanout *s; 110 bool move = cursor->hdr.type == VIRTIO_GPU_CMD_MOVE_CURSOR; 111 112 if (cursor->pos.scanout_id >= g->parent_obj.conf.max_outputs) { 113 return; 114 } 115 s = &g->parent_obj.scanout[cursor->pos.scanout_id]; 116 117 trace_virtio_gpu_update_cursor(cursor->pos.scanout_id, 118 cursor->pos.x, 119 cursor->pos.y, 120 move ? "move" : "update", 121 cursor->resource_id); 122 123 if (!move) { 124 if (!s->current_cursor) { 125 s->current_cursor = cursor_alloc(64, 64); 126 } 127 128 s->current_cursor->hot_x = cursor->hot_x; 129 s->current_cursor->hot_y = cursor->hot_y; 130 131 if (cursor->resource_id > 0) { 132 VIRGL(g, update_cursor_data_virgl, update_cursor_data_simple, 133 g, s, cursor->resource_id); 134 } 135 dpy_cursor_define(s->con, s->current_cursor); 136 137 s->cursor = *cursor; 138 } else { 139 s->cursor.pos.x = cursor->pos.x; 140 s->cursor.pos.y = cursor->pos.y; 141 } 142 dpy_mouse_set(s->con, cursor->pos.x, cursor->pos.y, 143 cursor->resource_id ? 1 : 0); 144 } 145 146 static struct virtio_gpu_simple_resource * 147 virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id) 148 { 149 struct virtio_gpu_simple_resource *res; 150 151 QTAILQ_FOREACH(res, &g->reslist, next) { 152 if (res->resource_id == resource_id) { 153 return res; 154 } 155 } 156 return NULL; 157 } 158 159 void virtio_gpu_ctrl_response(VirtIOGPU *g, 160 struct virtio_gpu_ctrl_command *cmd, 161 struct virtio_gpu_ctrl_hdr *resp, 162 size_t resp_len) 163 { 164 size_t s; 165 166 if (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_FENCE) { 167 resp->flags |= VIRTIO_GPU_FLAG_FENCE; 168 resp->fence_id = cmd->cmd_hdr.fence_id; 169 resp->ctx_id = cmd->cmd_hdr.ctx_id; 170 } 171 virtio_gpu_ctrl_hdr_bswap(resp); 172 s = iov_from_buf(cmd->elem.in_sg, cmd->elem.in_num, 0, resp, resp_len); 173 if (s != resp_len) { 174 qemu_log_mask(LOG_GUEST_ERROR, 175 "%s: response size incorrect %zu vs %zu\n", 176 __func__, s, resp_len); 177 } 178 virtqueue_push(cmd->vq, &cmd->elem, s); 179 virtio_notify(VIRTIO_DEVICE(g), cmd->vq); 180 cmd->finished = true; 181 } 182 183 void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g, 184 struct virtio_gpu_ctrl_command *cmd, 185 enum virtio_gpu_ctrl_type type) 186 { 187 struct virtio_gpu_ctrl_hdr resp; 188 189 memset(&resp, 0, sizeof(resp)); 190 resp.type = type; 191 virtio_gpu_ctrl_response(g, cmd, &resp, sizeof(resp)); 192 } 193 194 void virtio_gpu_get_display_info(VirtIOGPU *g, 195 struct virtio_gpu_ctrl_command *cmd) 196 { 197 struct virtio_gpu_resp_display_info display_info; 198 199 trace_virtio_gpu_cmd_get_display_info(); 200 memset(&display_info, 0, sizeof(display_info)); 201 display_info.hdr.type = VIRTIO_GPU_RESP_OK_DISPLAY_INFO; 202 virtio_gpu_base_fill_display_info(VIRTIO_GPU_BASE(g), &display_info); 203 virtio_gpu_ctrl_response(g, cmd, &display_info.hdr, 204 sizeof(display_info)); 205 } 206 207 static void 208 virtio_gpu_generate_edid(VirtIOGPU *g, int scanout, 209 struct virtio_gpu_resp_edid *edid) 210 { 211 VirtIOGPUBase *b = VIRTIO_GPU_BASE(g); 212 qemu_edid_info info = { 213 .prefx = b->req_state[scanout].width, 214 .prefy = b->req_state[scanout].height, 215 }; 216 217 edid->size = cpu_to_le32(sizeof(edid->edid)); 218 qemu_edid_generate(edid->edid, sizeof(edid->edid), &info); 219 } 220 221 void virtio_gpu_get_edid(VirtIOGPU *g, 222 struct virtio_gpu_ctrl_command *cmd) 223 { 224 struct virtio_gpu_resp_edid edid; 225 struct virtio_gpu_cmd_get_edid get_edid; 226 VirtIOGPUBase *b = VIRTIO_GPU_BASE(g); 227 228 VIRTIO_GPU_FILL_CMD(get_edid); 229 virtio_gpu_bswap_32(&get_edid, sizeof(get_edid)); 230 231 if (get_edid.scanout >= b->conf.max_outputs) { 232 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; 233 return; 234 } 235 236 trace_virtio_gpu_cmd_get_edid(get_edid.scanout); 237 memset(&edid, 0, sizeof(edid)); 238 edid.hdr.type = VIRTIO_GPU_RESP_OK_EDID; 239 virtio_gpu_generate_edid(g, get_edid.scanout, &edid); 240 virtio_gpu_ctrl_response(g, cmd, &edid.hdr, sizeof(edid)); 241 } 242 243 static uint32_t calc_image_hostmem(pixman_format_code_t pformat, 244 uint32_t width, uint32_t height) 245 { 246 /* Copied from pixman/pixman-bits-image.c, skip integer overflow check. 247 * pixman_image_create_bits will fail in case it overflow. 248 */ 249 250 int bpp = PIXMAN_FORMAT_BPP(pformat); 251 int stride = ((width * bpp + 0x1f) >> 5) * sizeof(uint32_t); 252 return height * stride; 253 } 254 255 static void virtio_gpu_resource_create_2d(VirtIOGPU *g, 256 struct virtio_gpu_ctrl_command *cmd) 257 { 258 pixman_format_code_t pformat; 259 struct virtio_gpu_simple_resource *res; 260 struct virtio_gpu_resource_create_2d c2d; 261 262 VIRTIO_GPU_FILL_CMD(c2d); 263 virtio_gpu_bswap_32(&c2d, sizeof(c2d)); 264 trace_virtio_gpu_cmd_res_create_2d(c2d.resource_id, c2d.format, 265 c2d.width, c2d.height); 266 267 if (c2d.resource_id == 0) { 268 qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n", 269 __func__); 270 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 271 return; 272 } 273 274 res = virtio_gpu_find_resource(g, c2d.resource_id); 275 if (res) { 276 qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already exists %d\n", 277 __func__, c2d.resource_id); 278 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 279 return; 280 } 281 282 res = g_new0(struct virtio_gpu_simple_resource, 1); 283 284 res->width = c2d.width; 285 res->height = c2d.height; 286 res->format = c2d.format; 287 res->resource_id = c2d.resource_id; 288 289 pformat = virtio_gpu_get_pixman_format(c2d.format); 290 if (!pformat) { 291 qemu_log_mask(LOG_GUEST_ERROR, 292 "%s: host couldn't handle guest format %d\n", 293 __func__, c2d.format); 294 g_free(res); 295 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; 296 return; 297 } 298 299 res->hostmem = calc_image_hostmem(pformat, c2d.width, c2d.height); 300 if (res->hostmem + g->hostmem < g->conf_max_hostmem) { 301 res->image = pixman_image_create_bits(pformat, 302 c2d.width, 303 c2d.height, 304 NULL, 0); 305 } 306 307 if (!res->image) { 308 qemu_log_mask(LOG_GUEST_ERROR, 309 "%s: resource creation failed %d %d %d\n", 310 __func__, c2d.resource_id, c2d.width, c2d.height); 311 g_free(res); 312 cmd->error = VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY; 313 return; 314 } 315 316 QTAILQ_INSERT_HEAD(&g->reslist, res, next); 317 g->hostmem += res->hostmem; 318 } 319 320 static void virtio_gpu_disable_scanout(VirtIOGPU *g, int scanout_id) 321 { 322 struct virtio_gpu_scanout *scanout = &g->parent_obj.scanout[scanout_id]; 323 struct virtio_gpu_simple_resource *res; 324 DisplaySurface *ds = NULL; 325 326 if (scanout->resource_id == 0) { 327 return; 328 } 329 330 res = virtio_gpu_find_resource(g, scanout->resource_id); 331 if (res) { 332 res->scanout_bitmask &= ~(1 << scanout_id); 333 } 334 335 if (scanout_id == 0) { 336 /* primary head */ 337 ds = qemu_create_message_surface(scanout->width ?: 640, 338 scanout->height ?: 480, 339 "Guest disabled display."); 340 } 341 dpy_gfx_replace_surface(scanout->con, ds); 342 scanout->resource_id = 0; 343 scanout->ds = NULL; 344 scanout->width = 0; 345 scanout->height = 0; 346 } 347 348 static void virtio_gpu_resource_destroy(VirtIOGPU *g, 349 struct virtio_gpu_simple_resource *res) 350 { 351 int i; 352 353 if (res->scanout_bitmask) { 354 for (i = 0; i < g->parent_obj.conf.max_outputs; i++) { 355 if (res->scanout_bitmask & (1 << i)) { 356 virtio_gpu_disable_scanout(g, i); 357 } 358 } 359 } 360 361 pixman_image_unref(res->image); 362 virtio_gpu_cleanup_mapping(g, res); 363 QTAILQ_REMOVE(&g->reslist, res, next); 364 g->hostmem -= res->hostmem; 365 g_free(res); 366 } 367 368 static void virtio_gpu_resource_unref(VirtIOGPU *g, 369 struct virtio_gpu_ctrl_command *cmd) 370 { 371 struct virtio_gpu_simple_resource *res; 372 struct virtio_gpu_resource_unref unref; 373 374 VIRTIO_GPU_FILL_CMD(unref); 375 virtio_gpu_bswap_32(&unref, sizeof(unref)); 376 trace_virtio_gpu_cmd_res_unref(unref.resource_id); 377 378 res = virtio_gpu_find_resource(g, unref.resource_id); 379 if (!res) { 380 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n", 381 __func__, unref.resource_id); 382 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 383 return; 384 } 385 virtio_gpu_resource_destroy(g, res); 386 } 387 388 static void virtio_gpu_transfer_to_host_2d(VirtIOGPU *g, 389 struct virtio_gpu_ctrl_command *cmd) 390 { 391 struct virtio_gpu_simple_resource *res; 392 int h; 393 uint32_t src_offset, dst_offset, stride; 394 int bpp; 395 pixman_format_code_t format; 396 struct virtio_gpu_transfer_to_host_2d t2d; 397 398 VIRTIO_GPU_FILL_CMD(t2d); 399 virtio_gpu_t2d_bswap(&t2d); 400 trace_virtio_gpu_cmd_res_xfer_toh_2d(t2d.resource_id); 401 402 res = virtio_gpu_find_resource(g, t2d.resource_id); 403 if (!res || !res->iov) { 404 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n", 405 __func__, t2d.resource_id); 406 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 407 return; 408 } 409 410 if (t2d.r.x > res->width || 411 t2d.r.y > res->height || 412 t2d.r.width > res->width || 413 t2d.r.height > res->height || 414 t2d.r.x + t2d.r.width > res->width || 415 t2d.r.y + t2d.r.height > res->height) { 416 qemu_log_mask(LOG_GUEST_ERROR, "%s: transfer bounds outside resource" 417 " bounds for resource %d: %d %d %d %d vs %d %d\n", 418 __func__, t2d.resource_id, t2d.r.x, t2d.r.y, 419 t2d.r.width, t2d.r.height, res->width, res->height); 420 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; 421 return; 422 } 423 424 format = pixman_image_get_format(res->image); 425 bpp = DIV_ROUND_UP(PIXMAN_FORMAT_BPP(format), 8); 426 stride = pixman_image_get_stride(res->image); 427 428 if (t2d.offset || t2d.r.x || t2d.r.y || 429 t2d.r.width != pixman_image_get_width(res->image)) { 430 void *img_data = pixman_image_get_data(res->image); 431 for (h = 0; h < t2d.r.height; h++) { 432 src_offset = t2d.offset + stride * h; 433 dst_offset = (t2d.r.y + h) * stride + (t2d.r.x * bpp); 434 435 iov_to_buf(res->iov, res->iov_cnt, src_offset, 436 (uint8_t *)img_data 437 + dst_offset, t2d.r.width * bpp); 438 } 439 } else { 440 iov_to_buf(res->iov, res->iov_cnt, 0, 441 pixman_image_get_data(res->image), 442 pixman_image_get_stride(res->image) 443 * pixman_image_get_height(res->image)); 444 } 445 } 446 447 static void virtio_gpu_resource_flush(VirtIOGPU *g, 448 struct virtio_gpu_ctrl_command *cmd) 449 { 450 struct virtio_gpu_simple_resource *res; 451 struct virtio_gpu_resource_flush rf; 452 pixman_region16_t flush_region; 453 int i; 454 455 VIRTIO_GPU_FILL_CMD(rf); 456 virtio_gpu_bswap_32(&rf, sizeof(rf)); 457 trace_virtio_gpu_cmd_res_flush(rf.resource_id, 458 rf.r.width, rf.r.height, rf.r.x, rf.r.y); 459 460 res = virtio_gpu_find_resource(g, rf.resource_id); 461 if (!res) { 462 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n", 463 __func__, rf.resource_id); 464 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 465 return; 466 } 467 468 if (rf.r.x > res->width || 469 rf.r.y > res->height || 470 rf.r.width > res->width || 471 rf.r.height > res->height || 472 rf.r.x + rf.r.width > res->width || 473 rf.r.y + rf.r.height > res->height) { 474 qemu_log_mask(LOG_GUEST_ERROR, "%s: flush bounds outside resource" 475 " bounds for resource %d: %d %d %d %d vs %d %d\n", 476 __func__, rf.resource_id, rf.r.x, rf.r.y, 477 rf.r.width, rf.r.height, res->width, res->height); 478 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; 479 return; 480 } 481 482 pixman_region_init_rect(&flush_region, 483 rf.r.x, rf.r.y, rf.r.width, rf.r.height); 484 for (i = 0; i < g->parent_obj.conf.max_outputs; i++) { 485 struct virtio_gpu_scanout *scanout; 486 pixman_region16_t region, finalregion; 487 pixman_box16_t *extents; 488 489 if (!(res->scanout_bitmask & (1 << i))) { 490 continue; 491 } 492 scanout = &g->parent_obj.scanout[i]; 493 494 pixman_region_init(&finalregion); 495 pixman_region_init_rect(®ion, scanout->x, scanout->y, 496 scanout->width, scanout->height); 497 498 pixman_region_intersect(&finalregion, &flush_region, ®ion); 499 pixman_region_translate(&finalregion, -scanout->x, -scanout->y); 500 extents = pixman_region_extents(&finalregion); 501 /* work out the area we need to update for each console */ 502 dpy_gfx_update(g->parent_obj.scanout[i].con, 503 extents->x1, extents->y1, 504 extents->x2 - extents->x1, 505 extents->y2 - extents->y1); 506 507 pixman_region_fini(®ion); 508 pixman_region_fini(&finalregion); 509 } 510 pixman_region_fini(&flush_region); 511 } 512 513 static void virtio_unref_resource(pixman_image_t *image, void *data) 514 { 515 pixman_image_unref(data); 516 } 517 518 static void virtio_gpu_set_scanout(VirtIOGPU *g, 519 struct virtio_gpu_ctrl_command *cmd) 520 { 521 struct virtio_gpu_simple_resource *res, *ores; 522 struct virtio_gpu_scanout *scanout; 523 pixman_format_code_t format; 524 uint32_t offset; 525 int bpp; 526 struct virtio_gpu_set_scanout ss; 527 528 VIRTIO_GPU_FILL_CMD(ss); 529 virtio_gpu_bswap_32(&ss, sizeof(ss)); 530 trace_virtio_gpu_cmd_set_scanout(ss.scanout_id, ss.resource_id, 531 ss.r.width, ss.r.height, ss.r.x, ss.r.y); 532 533 if (ss.scanout_id >= g->parent_obj.conf.max_outputs) { 534 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout id specified %d", 535 __func__, ss.scanout_id); 536 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID; 537 return; 538 } 539 540 g->parent_obj.enable = 1; 541 if (ss.resource_id == 0) { 542 virtio_gpu_disable_scanout(g, ss.scanout_id); 543 return; 544 } 545 546 /* create a surface for this scanout */ 547 res = virtio_gpu_find_resource(g, ss.resource_id); 548 if (!res) { 549 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n", 550 __func__, ss.resource_id); 551 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 552 return; 553 } 554 555 if (ss.r.x > res->width || 556 ss.r.y > res->height || 557 ss.r.width < 16 || 558 ss.r.height < 16 || 559 ss.r.width > res->width || 560 ss.r.height > res->height || 561 ss.r.x + ss.r.width > res->width || 562 ss.r.y + ss.r.height > res->height) { 563 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout %d bounds for" 564 " resource %d, (%d,%d)+%d,%d vs %d %d\n", 565 __func__, ss.scanout_id, ss.resource_id, ss.r.x, ss.r.y, 566 ss.r.width, ss.r.height, res->width, res->height); 567 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER; 568 return; 569 } 570 571 scanout = &g->parent_obj.scanout[ss.scanout_id]; 572 573 format = pixman_image_get_format(res->image); 574 bpp = DIV_ROUND_UP(PIXMAN_FORMAT_BPP(format), 8); 575 offset = (ss.r.x * bpp) + ss.r.y * pixman_image_get_stride(res->image); 576 if (!scanout->ds || surface_data(scanout->ds) 577 != ((uint8_t *)pixman_image_get_data(res->image) + offset) || 578 scanout->width != ss.r.width || 579 scanout->height != ss.r.height) { 580 pixman_image_t *rect; 581 void *ptr = (uint8_t *)pixman_image_get_data(res->image) + offset; 582 rect = pixman_image_create_bits(format, ss.r.width, ss.r.height, ptr, 583 pixman_image_get_stride(res->image)); 584 pixman_image_ref(res->image); 585 pixman_image_set_destroy_function(rect, virtio_unref_resource, 586 res->image); 587 /* realloc the surface ptr */ 588 scanout->ds = qemu_create_displaysurface_pixman(rect); 589 if (!scanout->ds) { 590 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; 591 return; 592 } 593 pixman_image_unref(rect); 594 dpy_gfx_replace_surface(g->parent_obj.scanout[ss.scanout_id].con, 595 scanout->ds); 596 } 597 598 ores = virtio_gpu_find_resource(g, scanout->resource_id); 599 if (ores) { 600 ores->scanout_bitmask &= ~(1 << ss.scanout_id); 601 } 602 603 res->scanout_bitmask |= (1 << ss.scanout_id); 604 scanout->resource_id = ss.resource_id; 605 scanout->x = ss.r.x; 606 scanout->y = ss.r.y; 607 scanout->width = ss.r.width; 608 scanout->height = ss.r.height; 609 } 610 611 int virtio_gpu_create_mapping_iov(VirtIOGPU *g, 612 struct virtio_gpu_resource_attach_backing *ab, 613 struct virtio_gpu_ctrl_command *cmd, 614 uint64_t **addr, struct iovec **iov) 615 { 616 struct virtio_gpu_mem_entry *ents; 617 size_t esize, s; 618 int i; 619 620 if (ab->nr_entries > 16384) { 621 qemu_log_mask(LOG_GUEST_ERROR, 622 "%s: nr_entries is too big (%d > 16384)\n", 623 __func__, ab->nr_entries); 624 return -1; 625 } 626 627 esize = sizeof(*ents) * ab->nr_entries; 628 ents = g_malloc(esize); 629 s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 630 sizeof(*ab), ents, esize); 631 if (s != esize) { 632 qemu_log_mask(LOG_GUEST_ERROR, 633 "%s: command data size incorrect %zu vs %zu\n", 634 __func__, s, esize); 635 g_free(ents); 636 return -1; 637 } 638 639 *iov = g_malloc0(sizeof(struct iovec) * ab->nr_entries); 640 if (addr) { 641 *addr = g_malloc0(sizeof(uint64_t) * ab->nr_entries); 642 } 643 for (i = 0; i < ab->nr_entries; i++) { 644 uint64_t a = le64_to_cpu(ents[i].addr); 645 uint32_t l = le32_to_cpu(ents[i].length); 646 hwaddr len = l; 647 (*iov)[i].iov_len = l; 648 (*iov)[i].iov_base = dma_memory_map(VIRTIO_DEVICE(g)->dma_as, 649 a, &len, DMA_DIRECTION_TO_DEVICE); 650 if (addr) { 651 (*addr)[i] = a; 652 } 653 if (!(*iov)[i].iov_base || len != l) { 654 qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to map MMIO memory for" 655 " resource %d element %d\n", 656 __func__, ab->resource_id, i); 657 virtio_gpu_cleanup_mapping_iov(g, *iov, i); 658 g_free(ents); 659 *iov = NULL; 660 if (addr) { 661 g_free(*addr); 662 *addr = NULL; 663 } 664 return -1; 665 } 666 } 667 g_free(ents); 668 return 0; 669 } 670 671 void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g, 672 struct iovec *iov, uint32_t count) 673 { 674 int i; 675 676 for (i = 0; i < count; i++) { 677 dma_memory_unmap(VIRTIO_DEVICE(g)->dma_as, 678 iov[i].iov_base, iov[i].iov_len, 679 DMA_DIRECTION_TO_DEVICE, 680 iov[i].iov_len); 681 } 682 g_free(iov); 683 } 684 685 static void virtio_gpu_cleanup_mapping(VirtIOGPU *g, 686 struct virtio_gpu_simple_resource *res) 687 { 688 virtio_gpu_cleanup_mapping_iov(g, res->iov, res->iov_cnt); 689 res->iov = NULL; 690 res->iov_cnt = 0; 691 g_free(res->addrs); 692 res->addrs = NULL; 693 } 694 695 static void 696 virtio_gpu_resource_attach_backing(VirtIOGPU *g, 697 struct virtio_gpu_ctrl_command *cmd) 698 { 699 struct virtio_gpu_simple_resource *res; 700 struct virtio_gpu_resource_attach_backing ab; 701 int ret; 702 703 VIRTIO_GPU_FILL_CMD(ab); 704 virtio_gpu_bswap_32(&ab, sizeof(ab)); 705 trace_virtio_gpu_cmd_res_back_attach(ab.resource_id); 706 707 res = virtio_gpu_find_resource(g, ab.resource_id); 708 if (!res) { 709 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n", 710 __func__, ab.resource_id); 711 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 712 return; 713 } 714 715 if (res->iov) { 716 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; 717 return; 718 } 719 720 ret = virtio_gpu_create_mapping_iov(g, &ab, cmd, &res->addrs, &res->iov); 721 if (ret != 0) { 722 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; 723 return; 724 } 725 726 res->iov_cnt = ab.nr_entries; 727 } 728 729 static void 730 virtio_gpu_resource_detach_backing(VirtIOGPU *g, 731 struct virtio_gpu_ctrl_command *cmd) 732 { 733 struct virtio_gpu_simple_resource *res; 734 struct virtio_gpu_resource_detach_backing detach; 735 736 VIRTIO_GPU_FILL_CMD(detach); 737 virtio_gpu_bswap_32(&detach, sizeof(detach)); 738 trace_virtio_gpu_cmd_res_back_detach(detach.resource_id); 739 740 res = virtio_gpu_find_resource(g, detach.resource_id); 741 if (!res || !res->iov) { 742 qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n", 743 __func__, detach.resource_id); 744 cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID; 745 return; 746 } 747 virtio_gpu_cleanup_mapping(g, res); 748 } 749 750 static void virtio_gpu_simple_process_cmd(VirtIOGPU *g, 751 struct virtio_gpu_ctrl_command *cmd) 752 { 753 VIRTIO_GPU_FILL_CMD(cmd->cmd_hdr); 754 virtio_gpu_ctrl_hdr_bswap(&cmd->cmd_hdr); 755 756 switch (cmd->cmd_hdr.type) { 757 case VIRTIO_GPU_CMD_GET_DISPLAY_INFO: 758 virtio_gpu_get_display_info(g, cmd); 759 break; 760 case VIRTIO_GPU_CMD_GET_EDID: 761 virtio_gpu_get_edid(g, cmd); 762 break; 763 case VIRTIO_GPU_CMD_RESOURCE_CREATE_2D: 764 virtio_gpu_resource_create_2d(g, cmd); 765 break; 766 case VIRTIO_GPU_CMD_RESOURCE_UNREF: 767 virtio_gpu_resource_unref(g, cmd); 768 break; 769 case VIRTIO_GPU_CMD_RESOURCE_FLUSH: 770 virtio_gpu_resource_flush(g, cmd); 771 break; 772 case VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D: 773 virtio_gpu_transfer_to_host_2d(g, cmd); 774 break; 775 case VIRTIO_GPU_CMD_SET_SCANOUT: 776 virtio_gpu_set_scanout(g, cmd); 777 break; 778 case VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING: 779 virtio_gpu_resource_attach_backing(g, cmd); 780 break; 781 case VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING: 782 virtio_gpu_resource_detach_backing(g, cmd); 783 break; 784 default: 785 cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC; 786 break; 787 } 788 if (!cmd->finished) { 789 virtio_gpu_ctrl_response_nodata(g, cmd, cmd->error ? cmd->error : 790 VIRTIO_GPU_RESP_OK_NODATA); 791 } 792 } 793 794 static void virtio_gpu_handle_ctrl_cb(VirtIODevice *vdev, VirtQueue *vq) 795 { 796 VirtIOGPU *g = VIRTIO_GPU(vdev); 797 qemu_bh_schedule(g->ctrl_bh); 798 } 799 800 static void virtio_gpu_handle_cursor_cb(VirtIODevice *vdev, VirtQueue *vq) 801 { 802 VirtIOGPU *g = VIRTIO_GPU(vdev); 803 qemu_bh_schedule(g->cursor_bh); 804 } 805 806 void virtio_gpu_process_cmdq(VirtIOGPU *g) 807 { 808 struct virtio_gpu_ctrl_command *cmd; 809 810 while (!QTAILQ_EMPTY(&g->cmdq)) { 811 cmd = QTAILQ_FIRST(&g->cmdq); 812 813 if (g->parent_obj.renderer_blocked) { 814 break; 815 } 816 817 /* process command */ 818 VIRGL(g, virtio_gpu_virgl_process_cmd, virtio_gpu_simple_process_cmd, 819 g, cmd); 820 821 QTAILQ_REMOVE(&g->cmdq, cmd, next); 822 if (virtio_gpu_stats_enabled(g->parent_obj.conf)) { 823 g->stats.requests++; 824 } 825 826 if (!cmd->finished) { 827 QTAILQ_INSERT_TAIL(&g->fenceq, cmd, next); 828 g->inflight++; 829 if (virtio_gpu_stats_enabled(g->parent_obj.conf)) { 830 if (g->stats.max_inflight < g->inflight) { 831 g->stats.max_inflight = g->inflight; 832 } 833 fprintf(stderr, "inflight: %3d (+)\r", g->inflight); 834 } 835 } else { 836 g_free(cmd); 837 } 838 } 839 } 840 841 static void virtio_gpu_gl_unblock(VirtIOGPUBase *b) 842 { 843 VirtIOGPU *g = VIRTIO_GPU(b); 844 845 #ifdef CONFIG_VIRGL 846 if (g->renderer_reset) { 847 g->renderer_reset = false; 848 virtio_gpu_virgl_reset(g); 849 } 850 #endif 851 virtio_gpu_process_cmdq(g); 852 } 853 854 static void virtio_gpu_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq) 855 { 856 VirtIOGPU *g = VIRTIO_GPU(vdev); 857 struct virtio_gpu_ctrl_command *cmd; 858 859 if (!virtio_queue_ready(vq)) { 860 return; 861 } 862 863 #ifdef CONFIG_VIRGL 864 if (!g->renderer_inited && g->parent_obj.use_virgl_renderer) { 865 virtio_gpu_virgl_init(g); 866 g->renderer_inited = true; 867 } 868 #endif 869 870 cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command)); 871 while (cmd) { 872 cmd->vq = vq; 873 cmd->error = 0; 874 cmd->finished = false; 875 QTAILQ_INSERT_TAIL(&g->cmdq, cmd, next); 876 cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command)); 877 } 878 879 virtio_gpu_process_cmdq(g); 880 881 #ifdef CONFIG_VIRGL 882 if (g->parent_obj.use_virgl_renderer) { 883 virtio_gpu_virgl_fence_poll(g); 884 } 885 #endif 886 } 887 888 static void virtio_gpu_ctrl_bh(void *opaque) 889 { 890 VirtIOGPU *g = opaque; 891 virtio_gpu_handle_ctrl(&g->parent_obj.parent_obj, g->ctrl_vq); 892 } 893 894 static void virtio_gpu_handle_cursor(VirtIODevice *vdev, VirtQueue *vq) 895 { 896 VirtIOGPU *g = VIRTIO_GPU(vdev); 897 VirtQueueElement *elem; 898 size_t s; 899 struct virtio_gpu_update_cursor cursor_info; 900 901 if (!virtio_queue_ready(vq)) { 902 return; 903 } 904 for (;;) { 905 elem = virtqueue_pop(vq, sizeof(VirtQueueElement)); 906 if (!elem) { 907 break; 908 } 909 910 s = iov_to_buf(elem->out_sg, elem->out_num, 0, 911 &cursor_info, sizeof(cursor_info)); 912 if (s != sizeof(cursor_info)) { 913 qemu_log_mask(LOG_GUEST_ERROR, 914 "%s: cursor size incorrect %zu vs %zu\n", 915 __func__, s, sizeof(cursor_info)); 916 } else { 917 virtio_gpu_bswap_32(&cursor_info, sizeof(cursor_info)); 918 update_cursor(g, &cursor_info); 919 } 920 virtqueue_push(vq, elem, 0); 921 virtio_notify(vdev, vq); 922 g_free(elem); 923 } 924 } 925 926 static void virtio_gpu_cursor_bh(void *opaque) 927 { 928 VirtIOGPU *g = opaque; 929 virtio_gpu_handle_cursor(&g->parent_obj.parent_obj, g->cursor_vq); 930 } 931 932 static const VMStateDescription vmstate_virtio_gpu_scanout = { 933 .name = "virtio-gpu-one-scanout", 934 .version_id = 1, 935 .fields = (VMStateField[]) { 936 VMSTATE_UINT32(resource_id, struct virtio_gpu_scanout), 937 VMSTATE_UINT32(width, struct virtio_gpu_scanout), 938 VMSTATE_UINT32(height, struct virtio_gpu_scanout), 939 VMSTATE_INT32(x, struct virtio_gpu_scanout), 940 VMSTATE_INT32(y, struct virtio_gpu_scanout), 941 VMSTATE_UINT32(cursor.resource_id, struct virtio_gpu_scanout), 942 VMSTATE_UINT32(cursor.hot_x, struct virtio_gpu_scanout), 943 VMSTATE_UINT32(cursor.hot_y, struct virtio_gpu_scanout), 944 VMSTATE_UINT32(cursor.pos.x, struct virtio_gpu_scanout), 945 VMSTATE_UINT32(cursor.pos.y, struct virtio_gpu_scanout), 946 VMSTATE_END_OF_LIST() 947 }, 948 }; 949 950 static const VMStateDescription vmstate_virtio_gpu_scanouts = { 951 .name = "virtio-gpu-scanouts", 952 .version_id = 1, 953 .fields = (VMStateField[]) { 954 VMSTATE_INT32(parent_obj.enable, struct VirtIOGPU), 955 VMSTATE_UINT32_EQUAL(parent_obj.conf.max_outputs, 956 struct VirtIOGPU, NULL), 957 VMSTATE_STRUCT_VARRAY_UINT32(parent_obj.scanout, struct VirtIOGPU, 958 parent_obj.conf.max_outputs, 1, 959 vmstate_virtio_gpu_scanout, 960 struct virtio_gpu_scanout), 961 VMSTATE_END_OF_LIST() 962 }, 963 }; 964 965 static int virtio_gpu_save(QEMUFile *f, void *opaque, size_t size, 966 const VMStateField *field, QJSON *vmdesc) 967 { 968 VirtIOGPU *g = opaque; 969 struct virtio_gpu_simple_resource *res; 970 int i; 971 972 /* in 2d mode we should never find unprocessed commands here */ 973 assert(QTAILQ_EMPTY(&g->cmdq)); 974 975 QTAILQ_FOREACH(res, &g->reslist, next) { 976 qemu_put_be32(f, res->resource_id); 977 qemu_put_be32(f, res->width); 978 qemu_put_be32(f, res->height); 979 qemu_put_be32(f, res->format); 980 qemu_put_be32(f, res->iov_cnt); 981 for (i = 0; i < res->iov_cnt; i++) { 982 qemu_put_be64(f, res->addrs[i]); 983 qemu_put_be32(f, res->iov[i].iov_len); 984 } 985 qemu_put_buffer(f, (void *)pixman_image_get_data(res->image), 986 pixman_image_get_stride(res->image) * res->height); 987 } 988 qemu_put_be32(f, 0); /* end of list */ 989 990 return vmstate_save_state(f, &vmstate_virtio_gpu_scanouts, g, NULL); 991 } 992 993 static int virtio_gpu_load(QEMUFile *f, void *opaque, size_t size, 994 const VMStateField *field) 995 { 996 VirtIOGPU *g = opaque; 997 struct virtio_gpu_simple_resource *res; 998 struct virtio_gpu_scanout *scanout; 999 uint32_t resource_id, pformat; 1000 int i; 1001 1002 g->hostmem = 0; 1003 1004 resource_id = qemu_get_be32(f); 1005 while (resource_id != 0) { 1006 res = virtio_gpu_find_resource(g, resource_id); 1007 if (res) { 1008 return -EINVAL; 1009 } 1010 1011 res = g_new0(struct virtio_gpu_simple_resource, 1); 1012 res->resource_id = resource_id; 1013 res->width = qemu_get_be32(f); 1014 res->height = qemu_get_be32(f); 1015 res->format = qemu_get_be32(f); 1016 res->iov_cnt = qemu_get_be32(f); 1017 1018 /* allocate */ 1019 pformat = virtio_gpu_get_pixman_format(res->format); 1020 if (!pformat) { 1021 g_free(res); 1022 return -EINVAL; 1023 } 1024 res->image = pixman_image_create_bits(pformat, 1025 res->width, res->height, 1026 NULL, 0); 1027 if (!res->image) { 1028 g_free(res); 1029 return -EINVAL; 1030 } 1031 1032 res->hostmem = calc_image_hostmem(pformat, res->width, res->height); 1033 1034 res->addrs = g_new(uint64_t, res->iov_cnt); 1035 res->iov = g_new(struct iovec, res->iov_cnt); 1036 1037 /* read data */ 1038 for (i = 0; i < res->iov_cnt; i++) { 1039 res->addrs[i] = qemu_get_be64(f); 1040 res->iov[i].iov_len = qemu_get_be32(f); 1041 } 1042 qemu_get_buffer(f, (void *)pixman_image_get_data(res->image), 1043 pixman_image_get_stride(res->image) * res->height); 1044 1045 /* restore mapping */ 1046 for (i = 0; i < res->iov_cnt; i++) { 1047 hwaddr len = res->iov[i].iov_len; 1048 res->iov[i].iov_base = 1049 dma_memory_map(VIRTIO_DEVICE(g)->dma_as, 1050 res->addrs[i], &len, DMA_DIRECTION_TO_DEVICE); 1051 1052 if (!res->iov[i].iov_base || len != res->iov[i].iov_len) { 1053 /* Clean up the half-a-mapping we just created... */ 1054 if (res->iov[i].iov_base) { 1055 dma_memory_unmap(VIRTIO_DEVICE(g)->dma_as, 1056 res->iov[i].iov_base, 1057 len, 1058 DMA_DIRECTION_TO_DEVICE, 1059 0); 1060 } 1061 /* ...and the mappings for previous loop iterations */ 1062 res->iov_cnt = i; 1063 virtio_gpu_cleanup_mapping(g, res); 1064 pixman_image_unref(res->image); 1065 g_free(res); 1066 return -EINVAL; 1067 } 1068 } 1069 1070 QTAILQ_INSERT_HEAD(&g->reslist, res, next); 1071 g->hostmem += res->hostmem; 1072 1073 resource_id = qemu_get_be32(f); 1074 } 1075 1076 /* load & apply scanout state */ 1077 vmstate_load_state(f, &vmstate_virtio_gpu_scanouts, g, 1); 1078 for (i = 0; i < g->parent_obj.conf.max_outputs; i++) { 1079 scanout = &g->parent_obj.scanout[i]; 1080 if (!scanout->resource_id) { 1081 continue; 1082 } 1083 res = virtio_gpu_find_resource(g, scanout->resource_id); 1084 if (!res) { 1085 return -EINVAL; 1086 } 1087 scanout->ds = qemu_create_displaysurface_pixman(res->image); 1088 if (!scanout->ds) { 1089 return -EINVAL; 1090 } 1091 1092 dpy_gfx_replace_surface(scanout->con, scanout->ds); 1093 dpy_gfx_update_full(scanout->con); 1094 if (scanout->cursor.resource_id) { 1095 update_cursor(g, &scanout->cursor); 1096 } 1097 res->scanout_bitmask |= (1 << i); 1098 } 1099 1100 return 0; 1101 } 1102 1103 static void virtio_gpu_device_realize(DeviceState *qdev, Error **errp) 1104 { 1105 VirtIODevice *vdev = VIRTIO_DEVICE(qdev); 1106 VirtIOGPU *g = VIRTIO_GPU(qdev); 1107 bool have_virgl; 1108 1109 #if !defined(CONFIG_VIRGL) || defined(HOST_WORDS_BIGENDIAN) 1110 have_virgl = false; 1111 #else 1112 have_virgl = display_opengl; 1113 #endif 1114 if (!have_virgl) { 1115 g->parent_obj.conf.flags &= ~(1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED); 1116 } else { 1117 #if defined(CONFIG_VIRGL) 1118 VIRTIO_GPU_BASE(g)->virtio_config.num_capsets = 1119 virtio_gpu_virgl_get_num_capsets(g); 1120 #endif 1121 } 1122 1123 if (!virtio_gpu_base_device_realize(qdev, 1124 virtio_gpu_handle_ctrl_cb, 1125 virtio_gpu_handle_cursor_cb, 1126 errp)) { 1127 return; 1128 } 1129 1130 g->ctrl_vq = virtio_get_queue(vdev, 0); 1131 g->cursor_vq = virtio_get_queue(vdev, 1); 1132 g->ctrl_bh = qemu_bh_new(virtio_gpu_ctrl_bh, g); 1133 g->cursor_bh = qemu_bh_new(virtio_gpu_cursor_bh, g); 1134 QTAILQ_INIT(&g->reslist); 1135 QTAILQ_INIT(&g->cmdq); 1136 QTAILQ_INIT(&g->fenceq); 1137 } 1138 1139 static void virtio_gpu_reset(VirtIODevice *vdev) 1140 { 1141 VirtIOGPU *g = VIRTIO_GPU(vdev); 1142 struct virtio_gpu_simple_resource *res, *tmp; 1143 struct virtio_gpu_ctrl_command *cmd; 1144 1145 #ifdef CONFIG_VIRGL 1146 if (g->parent_obj.use_virgl_renderer) { 1147 virtio_gpu_virgl_reset(g); 1148 } 1149 #endif 1150 1151 QTAILQ_FOREACH_SAFE(res, &g->reslist, next, tmp) { 1152 virtio_gpu_resource_destroy(g, res); 1153 } 1154 1155 while (!QTAILQ_EMPTY(&g->cmdq)) { 1156 cmd = QTAILQ_FIRST(&g->cmdq); 1157 QTAILQ_REMOVE(&g->cmdq, cmd, next); 1158 g_free(cmd); 1159 } 1160 1161 while (!QTAILQ_EMPTY(&g->fenceq)) { 1162 cmd = QTAILQ_FIRST(&g->fenceq); 1163 QTAILQ_REMOVE(&g->fenceq, cmd, next); 1164 g->inflight--; 1165 g_free(cmd); 1166 } 1167 1168 #ifdef CONFIG_VIRGL 1169 if (g->parent_obj.use_virgl_renderer) { 1170 if (g->parent_obj.renderer_blocked) { 1171 g->renderer_reset = true; 1172 } else { 1173 virtio_gpu_virgl_reset(g); 1174 } 1175 g->parent_obj.use_virgl_renderer = false; 1176 } 1177 #endif 1178 1179 virtio_gpu_base_reset(VIRTIO_GPU_BASE(vdev)); 1180 } 1181 1182 static void 1183 virtio_gpu_get_config(VirtIODevice *vdev, uint8_t *config) 1184 { 1185 VirtIOGPUBase *g = VIRTIO_GPU_BASE(vdev); 1186 1187 memcpy(config, &g->virtio_config, sizeof(g->virtio_config)); 1188 } 1189 1190 static void 1191 virtio_gpu_set_config(VirtIODevice *vdev, const uint8_t *config) 1192 { 1193 VirtIOGPUBase *g = VIRTIO_GPU_BASE(vdev); 1194 const struct virtio_gpu_config *vgconfig = 1195 (const struct virtio_gpu_config *)config; 1196 1197 if (vgconfig->events_clear) { 1198 g->virtio_config.events_read &= ~vgconfig->events_clear; 1199 } 1200 } 1201 1202 /* 1203 * For historical reasons virtio_gpu does not adhere to virtio migration 1204 * scheme as described in doc/virtio-migration.txt, in a sense that no 1205 * save/load callback are provided to the core. Instead the device data 1206 * is saved/loaded after the core data. 1207 * 1208 * Because of this we need a special vmsd. 1209 */ 1210 static const VMStateDescription vmstate_virtio_gpu = { 1211 .name = "virtio-gpu", 1212 .minimum_version_id = VIRTIO_GPU_VM_VERSION, 1213 .version_id = VIRTIO_GPU_VM_VERSION, 1214 .fields = (VMStateField[]) { 1215 VMSTATE_VIRTIO_DEVICE /* core */, 1216 { 1217 .name = "virtio-gpu", 1218 .info = &(const VMStateInfo) { 1219 .name = "virtio-gpu", 1220 .get = virtio_gpu_load, 1221 .put = virtio_gpu_save, 1222 }, 1223 .flags = VMS_SINGLE, 1224 } /* device */, 1225 VMSTATE_END_OF_LIST() 1226 }, 1227 }; 1228 1229 static Property virtio_gpu_properties[] = { 1230 VIRTIO_GPU_BASE_PROPERTIES(VirtIOGPU, parent_obj.conf), 1231 DEFINE_PROP_SIZE("max_hostmem", VirtIOGPU, conf_max_hostmem, 1232 256 * MiB), 1233 #ifdef CONFIG_VIRGL 1234 DEFINE_PROP_BIT("virgl", VirtIOGPU, parent_obj.conf.flags, 1235 VIRTIO_GPU_FLAG_VIRGL_ENABLED, true), 1236 DEFINE_PROP_BIT("stats", VirtIOGPU, parent_obj.conf.flags, 1237 VIRTIO_GPU_FLAG_STATS_ENABLED, false), 1238 #endif 1239 DEFINE_PROP_END_OF_LIST(), 1240 }; 1241 1242 static void virtio_gpu_class_init(ObjectClass *klass, void *data) 1243 { 1244 DeviceClass *dc = DEVICE_CLASS(klass); 1245 VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass); 1246 VirtIOGPUBaseClass *vgc = VIRTIO_GPU_BASE_CLASS(klass); 1247 1248 vgc->gl_unblock = virtio_gpu_gl_unblock; 1249 vdc->realize = virtio_gpu_device_realize; 1250 vdc->reset = virtio_gpu_reset; 1251 vdc->get_config = virtio_gpu_get_config; 1252 vdc->set_config = virtio_gpu_set_config; 1253 1254 dc->vmsd = &vmstate_virtio_gpu; 1255 dc->props = virtio_gpu_properties; 1256 } 1257 1258 static const TypeInfo virtio_gpu_info = { 1259 .name = TYPE_VIRTIO_GPU, 1260 .parent = TYPE_VIRTIO_GPU_BASE, 1261 .instance_size = sizeof(VirtIOGPU), 1262 .class_init = virtio_gpu_class_init, 1263 }; 1264 1265 static void virtio_register_types(void) 1266 { 1267 type_register_static(&virtio_gpu_info); 1268 } 1269 1270 type_init(virtio_register_types) 1271