xref: /openbmc/qemu/hw/display/pl110.c (revision 56c4bfb3) 
1 /*
2  * Arm PrimeCell PL110 Color LCD Controller
3  *
4  * Copyright (c) 2005-2009 CodeSourcery.
5  * Written by Paul Brook
6  *
7  * This code is licensed under the GNU LGPL
8  */
9 
10 #include "hw/sysbus.h"
11 #include "ui/console.h"
12 #include "framebuffer.h"
13 #include "ui/pixel_ops.h"
14 
15 #define PL110_CR_EN   0x001
16 #define PL110_CR_BGR  0x100
17 #define PL110_CR_BEBO 0x200
18 #define PL110_CR_BEPO 0x400
19 #define PL110_CR_PWR  0x800
20 
21 enum pl110_bppmode
22 {
23     BPP_1,
24     BPP_2,
25     BPP_4,
26     BPP_8,
27     BPP_16,
28     BPP_32,
29     BPP_16_565, /* PL111 only */
30     BPP_12      /* PL111 only */
31 };
32 
33 
34 /* The Versatile/PB uses a slightly modified PL110 controller.  */
35 enum pl110_version
36 {
37     PL110,
38     PL110_VERSATILE,
39     PL111
40 };
41 
42 #define TYPE_PL110 "pl110"
43 #define PL110(obj) OBJECT_CHECK(PL110State, (obj), TYPE_PL110)
44 
45 typedef struct PL110State {
46     SysBusDevice parent_obj;
47 
48     MemoryRegion iomem;
49     QemuConsole *con;
50 
51     int version;
52     uint32_t timing[4];
53     uint32_t cr;
54     uint32_t upbase;
55     uint32_t lpbase;
56     uint32_t int_status;
57     uint32_t int_mask;
58     int cols;
59     int rows;
60     enum pl110_bppmode bpp;
61     int invalidate;
62     uint32_t mux_ctrl;
63     uint32_t palette[256];
64     uint32_t raw_palette[128];
65     qemu_irq irq;
66 } PL110State;
67 
68 static int vmstate_pl110_post_load(void *opaque, int version_id);
69 
70 static const VMStateDescription vmstate_pl110 = {
71     .name = "pl110",
72     .version_id = 2,
73     .minimum_version_id = 1,
74     .post_load = vmstate_pl110_post_load,
75     .fields = (VMStateField[]) {
76         VMSTATE_INT32(version, PL110State),
77         VMSTATE_UINT32_ARRAY(timing, PL110State, 4),
78         VMSTATE_UINT32(cr, PL110State),
79         VMSTATE_UINT32(upbase, PL110State),
80         VMSTATE_UINT32(lpbase, PL110State),
81         VMSTATE_UINT32(int_status, PL110State),
82         VMSTATE_UINT32(int_mask, PL110State),
83         VMSTATE_INT32(cols, PL110State),
84         VMSTATE_INT32(rows, PL110State),
85         VMSTATE_UINT32(bpp, PL110State),
86         VMSTATE_INT32(invalidate, PL110State),
87         VMSTATE_UINT32_ARRAY(palette, PL110State, 256),
88         VMSTATE_UINT32_ARRAY(raw_palette, PL110State, 128),
89         VMSTATE_UINT32_V(mux_ctrl, PL110State, 2),
90         VMSTATE_END_OF_LIST()
91     }
92 };
93 
94 static const unsigned char pl110_id[] =
95 { 0x10, 0x11, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
96 
97 /* The Arm documentation (DDI0224C) says the CLDC on the Versatile board
98    has a different ID.  However Linux only looks for the normal ID.  */
99 #if 0
100 static const unsigned char pl110_versatile_id[] =
101 { 0x93, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
102 #else
103 #define pl110_versatile_id pl110_id
104 #endif
105 
106 static const unsigned char pl111_id[] = {
107     0x11, 0x11, 0x24, 0x00, 0x0d, 0xf0, 0x05, 0xb1
108 };
109 
110 /* Indexed by pl110_version */
111 static const unsigned char *idregs[] = {
112     pl110_id,
113     pl110_versatile_id,
114     pl111_id
115 };
116 
117 #define BITS 8
118 #include "pl110_template.h"
119 #define BITS 15
120 #include "pl110_template.h"
121 #define BITS 16
122 #include "pl110_template.h"
123 #define BITS 24
124 #include "pl110_template.h"
125 #define BITS 32
126 #include "pl110_template.h"
127 
128 static int pl110_enabled(PL110State *s)
129 {
130   return (s->cr & PL110_CR_EN) && (s->cr & PL110_CR_PWR);
131 }
132 
133 static void pl110_update_display(void *opaque)
134 {
135     PL110State *s = (PL110State *)opaque;
136     SysBusDevice *sbd;
137     DisplaySurface *surface = qemu_console_surface(s->con);
138     drawfn* fntable;
139     drawfn fn;
140     int dest_width;
141     int src_width;
142     int bpp_offset;
143     int first;
144     int last;
145 
146     if (!pl110_enabled(s)) {
147         return;
148     }
149 
150     sbd = SYS_BUS_DEVICE(s);
151 
152     switch (surface_bits_per_pixel(surface)) {
153     case 0:
154         return;
155     case 8:
156         fntable = pl110_draw_fn_8;
157         dest_width = 1;
158         break;
159     case 15:
160         fntable = pl110_draw_fn_15;
161         dest_width = 2;
162         break;
163     case 16:
164         fntable = pl110_draw_fn_16;
165         dest_width = 2;
166         break;
167     case 24:
168         fntable = pl110_draw_fn_24;
169         dest_width = 3;
170         break;
171     case 32:
172         fntable = pl110_draw_fn_32;
173         dest_width = 4;
174         break;
175     default:
176         fprintf(stderr, "pl110: Bad color depth\n");
177         exit(1);
178     }
179     if (s->cr & PL110_CR_BGR)
180         bpp_offset = 0;
181     else
182         bpp_offset = 24;
183 
184     if ((s->version != PL111) && (s->bpp == BPP_16)) {
185         /* The PL110's native 16 bit mode is 5551; however
186          * most boards with a PL110 implement an external
187          * mux which allows bits to be reshuffled to give
188          * 565 format. The mux is typically controlled by
189          * an external system register.
190          * This is controlled by a GPIO input pin
191          * so boards can wire it up to their register.
192          *
193          * The PL111 straightforwardly implements both
194          * 5551 and 565 under control of the bpp field
195          * in the LCDControl register.
196          */
197         switch (s->mux_ctrl) {
198         case 3: /* 565 BGR */
199             bpp_offset = (BPP_16_565 - BPP_16);
200             break;
201         case 1: /* 5551 */
202             break;
203         case 0: /* 888; also if we have loaded vmstate from an old version */
204         case 2: /* 565 RGB */
205         default:
206             /* treat as 565 but honour BGR bit */
207             bpp_offset += (BPP_16_565 - BPP_16);
208             break;
209         }
210     }
211 
212     if (s->cr & PL110_CR_BEBO)
213         fn = fntable[s->bpp + 8 + bpp_offset];
214     else if (s->cr & PL110_CR_BEPO)
215         fn = fntable[s->bpp + 16 + bpp_offset];
216     else
217         fn = fntable[s->bpp + bpp_offset];
218 
219     src_width = s->cols;
220     switch (s->bpp) {
221     case BPP_1:
222         src_width >>= 3;
223         break;
224     case BPP_2:
225         src_width >>= 2;
226         break;
227     case BPP_4:
228         src_width >>= 1;
229         break;
230     case BPP_8:
231         break;
232     case BPP_16:
233     case BPP_16_565:
234     case BPP_12:
235         src_width <<= 1;
236         break;
237     case BPP_32:
238         src_width <<= 2;
239         break;
240     }
241     dest_width *= s->cols;
242     first = 0;
243     framebuffer_update_display(surface, sysbus_address_space(sbd),
244                                s->upbase, s->cols, s->rows,
245                                src_width, dest_width, 0,
246                                s->invalidate,
247                                fn, s->palette,
248                                &first, &last);
249     if (first >= 0) {
250         dpy_gfx_update(s->con, 0, first, s->cols, last - first + 1);
251     }
252     s->invalidate = 0;
253 }
254 
255 static void pl110_invalidate_display(void * opaque)
256 {
257     PL110State *s = (PL110State *)opaque;
258     s->invalidate = 1;
259     if (pl110_enabled(s)) {
260         qemu_console_resize(s->con, s->cols, s->rows);
261     }
262 }
263 
264 static void pl110_update_palette(PL110State *s, int n)
265 {
266     DisplaySurface *surface = qemu_console_surface(s->con);
267     int i;
268     uint32_t raw;
269     unsigned int r, g, b;
270 
271     raw = s->raw_palette[n];
272     n <<= 1;
273     for (i = 0; i < 2; i++) {
274         r = (raw & 0x1f) << 3;
275         raw >>= 5;
276         g = (raw & 0x1f) << 3;
277         raw >>= 5;
278         b = (raw & 0x1f) << 3;
279         /* The I bit is ignored.  */
280         raw >>= 6;
281         switch (surface_bits_per_pixel(surface)) {
282         case 8:
283             s->palette[n] = rgb_to_pixel8(r, g, b);
284             break;
285         case 15:
286             s->palette[n] = rgb_to_pixel15(r, g, b);
287             break;
288         case 16:
289             s->palette[n] = rgb_to_pixel16(r, g, b);
290             break;
291         case 24:
292         case 32:
293             s->palette[n] = rgb_to_pixel32(r, g, b);
294             break;
295         }
296         n++;
297     }
298 }
299 
300 static void pl110_resize(PL110State *s, int width, int height)
301 {
302     if (width != s->cols || height != s->rows) {
303         if (pl110_enabled(s)) {
304             qemu_console_resize(s->con, width, height);
305         }
306     }
307     s->cols = width;
308     s->rows = height;
309 }
310 
311 /* Update interrupts.  */
312 static void pl110_update(PL110State *s)
313 {
314   /* TODO: Implement interrupts.  */
315 }
316 
317 static uint64_t pl110_read(void *opaque, hwaddr offset,
318                            unsigned size)
319 {
320     PL110State *s = (PL110State *)opaque;
321 
322     if (offset >= 0xfe0 && offset < 0x1000) {
323         return idregs[s->version][(offset - 0xfe0) >> 2];
324     }
325     if (offset >= 0x200 && offset < 0x400) {
326         return s->raw_palette[(offset - 0x200) >> 2];
327     }
328     switch (offset >> 2) {
329     case 0: /* LCDTiming0 */
330         return s->timing[0];
331     case 1: /* LCDTiming1 */
332         return s->timing[1];
333     case 2: /* LCDTiming2 */
334         return s->timing[2];
335     case 3: /* LCDTiming3 */
336         return s->timing[3];
337     case 4: /* LCDUPBASE */
338         return s->upbase;
339     case 5: /* LCDLPBASE */
340         return s->lpbase;
341     case 6: /* LCDIMSC */
342         if (s->version != PL110) {
343             return s->cr;
344         }
345         return s->int_mask;
346     case 7: /* LCDControl */
347         if (s->version != PL110) {
348             return s->int_mask;
349         }
350         return s->cr;
351     case 8: /* LCDRIS */
352         return s->int_status;
353     case 9: /* LCDMIS */
354         return s->int_status & s->int_mask;
355     case 11: /* LCDUPCURR */
356         /* TODO: Implement vertical refresh.  */
357         return s->upbase;
358     case 12: /* LCDLPCURR */
359         return s->lpbase;
360     default:
361         qemu_log_mask(LOG_GUEST_ERROR,
362                       "pl110_read: Bad offset %x\n", (int)offset);
363         return 0;
364     }
365 }
366 
367 static void pl110_write(void *opaque, hwaddr offset,
368                         uint64_t val, unsigned size)
369 {
370     PL110State *s = (PL110State *)opaque;
371     int n;
372 
373     /* For simplicity invalidate the display whenever a control register
374        is written to.  */
375     s->invalidate = 1;
376     if (offset >= 0x200 && offset < 0x400) {
377         /* Palette.  */
378         n = (offset - 0x200) >> 2;
379         s->raw_palette[(offset - 0x200) >> 2] = val;
380         pl110_update_palette(s, n);
381         return;
382     }
383     switch (offset >> 2) {
384     case 0: /* LCDTiming0 */
385         s->timing[0] = val;
386         n = ((val & 0xfc) + 4) * 4;
387         pl110_resize(s, n, s->rows);
388         break;
389     case 1: /* LCDTiming1 */
390         s->timing[1] = val;
391         n = (val & 0x3ff) + 1;
392         pl110_resize(s, s->cols, n);
393         break;
394     case 2: /* LCDTiming2 */
395         s->timing[2] = val;
396         break;
397     case 3: /* LCDTiming3 */
398         s->timing[3] = val;
399         break;
400     case 4: /* LCDUPBASE */
401         s->upbase = val;
402         break;
403     case 5: /* LCDLPBASE */
404         s->lpbase = val;
405         break;
406     case 6: /* LCDIMSC */
407         if (s->version != PL110) {
408             goto control;
409         }
410     imsc:
411         s->int_mask = val;
412         pl110_update(s);
413         break;
414     case 7: /* LCDControl */
415         if (s->version != PL110) {
416             goto imsc;
417         }
418     control:
419         s->cr = val;
420         s->bpp = (val >> 1) & 7;
421         if (pl110_enabled(s)) {
422             qemu_console_resize(s->con, s->cols, s->rows);
423         }
424         break;
425     case 10: /* LCDICR */
426         s->int_status &= ~val;
427         pl110_update(s);
428         break;
429     default:
430         qemu_log_mask(LOG_GUEST_ERROR,
431                       "pl110_write: Bad offset %x\n", (int)offset);
432     }
433 }
434 
435 static const MemoryRegionOps pl110_ops = {
436     .read = pl110_read,
437     .write = pl110_write,
438     .endianness = DEVICE_NATIVE_ENDIAN,
439 };
440 
441 static void pl110_mux_ctrl_set(void *opaque, int line, int level)
442 {
443     PL110State *s = (PL110State *)opaque;
444     s->mux_ctrl = level;
445 }
446 
447 static int vmstate_pl110_post_load(void *opaque, int version_id)
448 {
449     PL110State *s = opaque;
450     /* Make sure we redraw, and at the right size */
451     pl110_invalidate_display(s);
452     return 0;
453 }
454 
455 static const GraphicHwOps pl110_gfx_ops = {
456     .invalidate  = pl110_invalidate_display,
457     .gfx_update  = pl110_update_display,
458 };
459 
460 static int pl110_initfn(SysBusDevice *sbd)
461 {
462     DeviceState *dev = DEVICE(sbd);
463     PL110State *s = PL110(dev);
464 
465     memory_region_init_io(&s->iomem, OBJECT(s), &pl110_ops, s, "pl110", 0x1000);
466     sysbus_init_mmio(sbd, &s->iomem);
467     sysbus_init_irq(sbd, &s->irq);
468     qdev_init_gpio_in(dev, pl110_mux_ctrl_set, 1);
469     s->con = graphic_console_init(dev, &pl110_gfx_ops, s);
470     return 0;
471 }
472 
473 static void pl110_init(Object *obj)
474 {
475     PL110State *s = PL110(obj);
476 
477     s->version = PL110;
478 }
479 
480 static void pl110_versatile_init(Object *obj)
481 {
482     PL110State *s = PL110(obj);
483 
484     s->version = PL110_VERSATILE;
485 }
486 
487 static void pl111_init(Object *obj)
488 {
489     PL110State *s = PL110(obj);
490 
491     s->version = PL111;
492 }
493 
494 static void pl110_class_init(ObjectClass *klass, void *data)
495 {
496     DeviceClass *dc = DEVICE_CLASS(klass);
497     SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
498 
499     k->init = pl110_initfn;
500     set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
501     dc->no_user = 1;
502     dc->vmsd = &vmstate_pl110;
503 }
504 
505 static const TypeInfo pl110_info = {
506     .name          = TYPE_PL110,
507     .parent        = TYPE_SYS_BUS_DEVICE,
508     .instance_size = sizeof(PL110State),
509     .instance_init = pl110_init,
510     .class_init    = pl110_class_init,
511 };
512 
513 static const TypeInfo pl110_versatile_info = {
514     .name          = "pl110_versatile",
515     .parent        = TYPE_PL110,
516     .instance_init = pl110_versatile_init,
517 };
518 
519 static const TypeInfo pl111_info = {
520     .name          = "pl111",
521     .parent        = TYPE_PL110,
522     .instance_init = pl111_init,
523 };
524 
525 static void pl110_register_types(void)
526 {
527     type_register_static(&pl110_info);
528     type_register_static(&pl110_versatile_info);
529     type_register_static(&pl111_info);
530 }
531 
532 type_init(pl110_register_types)
533