1 /* 2 * QEMU G364 framebuffer Emulator. 3 * 4 * Copyright (c) 2007-2011 Herve Poussineau 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License along 17 * with this program; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "hw/hw.h" 22 #include "qemu/error-report.h" 23 #include "ui/console.h" 24 #include "ui/pixel_ops.h" 25 #include "trace.h" 26 #include "hw/sysbus.h" 27 28 typedef struct G364State { 29 /* hardware */ 30 uint8_t *vram; 31 uint32_t vram_size; 32 qemu_irq irq; 33 MemoryRegion mem_vram; 34 MemoryRegion mem_ctrl; 35 /* registers */ 36 uint8_t color_palette[256][3]; 37 uint8_t cursor_palette[3][3]; 38 uint16_t cursor[512]; 39 uint32_t cursor_position; 40 uint32_t ctla; 41 uint32_t top_of_screen; 42 uint32_t width, height; /* in pixels */ 43 /* display refresh support */ 44 QemuConsole *con; 45 int depth; 46 int blanked; 47 } G364State; 48 49 #define REG_BOOT 0x000000 50 #define REG_DISPLAY 0x000118 51 #define REG_VDISPLAY 0x000150 52 #define REG_CTLA 0x000300 53 #define REG_TOP 0x000400 54 #define REG_CURS_PAL 0x000508 55 #define REG_CURS_POS 0x000638 56 #define REG_CLR_PAL 0x000800 57 #define REG_CURS_PAT 0x001000 58 #define REG_RESET 0x100000 59 60 #define CTLA_FORCE_BLANK 0x00000400 61 #define CTLA_NO_CURSOR 0x00800000 62 63 #define G364_PAGE_SIZE 4096 64 65 static inline int check_dirty(G364State *s, ram_addr_t page) 66 { 67 return memory_region_test_and_clear_dirty(&s->mem_vram, page, G364_PAGE_SIZE, 68 DIRTY_MEMORY_VGA); 69 } 70 71 static void g364fb_draw_graphic8(G364State *s) 72 { 73 DisplaySurface *surface = qemu_console_surface(s->con); 74 int i, w; 75 uint8_t *vram; 76 uint8_t *data_display, *dd; 77 ram_addr_t page; 78 int x, y; 79 int xmin, xmax; 80 int ymin, ymax; 81 int xcursor, ycursor; 82 unsigned int (*rgb_to_pixel)(unsigned int r, unsigned int g, unsigned int b); 83 84 switch (surface_bits_per_pixel(surface)) { 85 case 8: 86 rgb_to_pixel = rgb_to_pixel8; 87 w = 1; 88 break; 89 case 15: 90 rgb_to_pixel = rgb_to_pixel15; 91 w = 2; 92 break; 93 case 16: 94 rgb_to_pixel = rgb_to_pixel16; 95 w = 2; 96 break; 97 case 32: 98 rgb_to_pixel = rgb_to_pixel32; 99 w = 4; 100 break; 101 default: 102 hw_error("g364: unknown host depth %d", 103 surface_bits_per_pixel(surface)); 104 return; 105 } 106 107 page = 0; 108 109 x = y = 0; 110 xmin = s->width; 111 xmax = 0; 112 ymin = s->height; 113 ymax = 0; 114 115 if (!(s->ctla & CTLA_NO_CURSOR)) { 116 xcursor = s->cursor_position >> 12; 117 ycursor = s->cursor_position & 0xfff; 118 } else { 119 xcursor = ycursor = -65; 120 } 121 122 vram = s->vram + s->top_of_screen; 123 /* XXX: out of range in vram? */ 124 data_display = dd = surface_data(surface); 125 while (y < s->height) { 126 if (check_dirty(s, page)) { 127 if (y < ymin) 128 ymin = ymax = y; 129 if (x < xmin) 130 xmin = x; 131 for (i = 0; i < G364_PAGE_SIZE; i++) { 132 uint8_t index; 133 unsigned int color; 134 if (unlikely((y >= ycursor && y < ycursor + 64) && 135 (x >= xcursor && x < xcursor + 64))) { 136 /* pointer area */ 137 int xdiff = x - xcursor; 138 uint16_t curs = s->cursor[(y - ycursor) * 8 + xdiff / 8]; 139 int op = (curs >> ((xdiff & 7) * 2)) & 3; 140 if (likely(op == 0)) { 141 /* transparent */ 142 index = *vram; 143 color = (*rgb_to_pixel)( 144 s->color_palette[index][0], 145 s->color_palette[index][1], 146 s->color_palette[index][2]); 147 } else { 148 /* get cursor color */ 149 index = op - 1; 150 color = (*rgb_to_pixel)( 151 s->cursor_palette[index][0], 152 s->cursor_palette[index][1], 153 s->cursor_palette[index][2]); 154 } 155 } else { 156 /* normal area */ 157 index = *vram; 158 color = (*rgb_to_pixel)( 159 s->color_palette[index][0], 160 s->color_palette[index][1], 161 s->color_palette[index][2]); 162 } 163 memcpy(dd, &color, w); 164 dd += w; 165 x++; 166 vram++; 167 if (x == s->width) { 168 xmax = s->width - 1; 169 y++; 170 if (y == s->height) { 171 ymax = s->height - 1; 172 goto done; 173 } 174 data_display = dd = data_display + surface_stride(surface); 175 xmin = 0; 176 x = 0; 177 } 178 } 179 if (x > xmax) 180 xmax = x; 181 if (y > ymax) 182 ymax = y; 183 } else { 184 int dy; 185 if (xmax || ymax) { 186 dpy_gfx_update(s->con, xmin, ymin, 187 xmax - xmin + 1, ymax - ymin + 1); 188 xmin = s->width; 189 xmax = 0; 190 ymin = s->height; 191 ymax = 0; 192 } 193 x += G364_PAGE_SIZE; 194 dy = x / s->width; 195 x = x % s->width; 196 y += dy; 197 vram += G364_PAGE_SIZE; 198 data_display += dy * surface_stride(surface); 199 dd = data_display + x * w; 200 } 201 page += G364_PAGE_SIZE; 202 } 203 204 done: 205 if (xmax || ymax) { 206 dpy_gfx_update(s->con, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1); 207 } 208 } 209 210 static void g364fb_draw_blank(G364State *s) 211 { 212 DisplaySurface *surface = qemu_console_surface(s->con); 213 int i, w; 214 uint8_t *d; 215 216 if (s->blanked) { 217 /* Screen is already blank. No need to redraw it */ 218 return; 219 } 220 221 w = s->width * surface_bytes_per_pixel(surface); 222 d = surface_data(surface); 223 for (i = 0; i < s->height; i++) { 224 memset(d, 0, w); 225 d += surface_stride(surface); 226 } 227 228 dpy_gfx_update(s->con, 0, 0, s->width, s->height); 229 s->blanked = 1; 230 } 231 232 static void g364fb_update_display(void *opaque) 233 { 234 G364State *s = opaque; 235 DisplaySurface *surface = qemu_console_surface(s->con); 236 237 qemu_flush_coalesced_mmio_buffer(); 238 239 if (s->width == 0 || s->height == 0) 240 return; 241 242 if (s->width != surface_width(surface) || 243 s->height != surface_height(surface)) { 244 qemu_console_resize(s->con, s->width, s->height); 245 } 246 247 memory_region_sync_dirty_bitmap(&s->mem_vram); 248 if (s->ctla & CTLA_FORCE_BLANK) { 249 g364fb_draw_blank(s); 250 } else if (s->depth == 8) { 251 g364fb_draw_graphic8(s); 252 } else { 253 error_report("g364: unknown guest depth %d", s->depth); 254 } 255 256 qemu_irq_raise(s->irq); 257 } 258 259 static inline void g364fb_invalidate_display(void *opaque) 260 { 261 G364State *s = opaque; 262 263 s->blanked = 0; 264 memory_region_set_dirty(&s->mem_vram, 0, s->vram_size); 265 } 266 267 static void g364fb_reset(G364State *s) 268 { 269 qemu_irq_lower(s->irq); 270 271 memset(s->color_palette, 0, sizeof(s->color_palette)); 272 memset(s->cursor_palette, 0, sizeof(s->cursor_palette)); 273 memset(s->cursor, 0, sizeof(s->cursor)); 274 s->cursor_position = 0; 275 s->ctla = 0; 276 s->top_of_screen = 0; 277 s->width = s->height = 0; 278 memset(s->vram, 0, s->vram_size); 279 g364fb_invalidate_display(s); 280 } 281 282 /* called for accesses to io ports */ 283 static uint64_t g364fb_ctrl_read(void *opaque, 284 hwaddr addr, 285 unsigned int size) 286 { 287 G364State *s = opaque; 288 uint32_t val; 289 290 if (addr >= REG_CURS_PAT && addr < REG_CURS_PAT + 0x1000) { 291 /* cursor pattern */ 292 int idx = (addr - REG_CURS_PAT) >> 3; 293 val = s->cursor[idx]; 294 } else if (addr >= REG_CURS_PAL && addr < REG_CURS_PAL + 0x18) { 295 /* cursor palette */ 296 int idx = (addr - REG_CURS_PAL) >> 3; 297 val = ((uint32_t)s->cursor_palette[idx][0] << 16); 298 val |= ((uint32_t)s->cursor_palette[idx][1] << 8); 299 val |= ((uint32_t)s->cursor_palette[idx][2] << 0); 300 } else { 301 switch (addr) { 302 case REG_DISPLAY: 303 val = s->width / 4; 304 break; 305 case REG_VDISPLAY: 306 val = s->height * 2; 307 break; 308 case REG_CTLA: 309 val = s->ctla; 310 break; 311 default: 312 { 313 error_report("g364: invalid read at [" TARGET_FMT_plx "]", 314 addr); 315 val = 0; 316 break; 317 } 318 } 319 } 320 321 trace_g364fb_read(addr, val); 322 323 return val; 324 } 325 326 static void g364fb_update_depth(G364State *s) 327 { 328 static const int depths[8] = { 1, 2, 4, 8, 15, 16, 0 }; 329 s->depth = depths[(s->ctla & 0x00700000) >> 20]; 330 } 331 332 static void g364_invalidate_cursor_position(G364State *s) 333 { 334 DisplaySurface *surface = qemu_console_surface(s->con); 335 int ymin, ymax, start, end; 336 337 /* invalidate only near the cursor */ 338 ymin = s->cursor_position & 0xfff; 339 ymax = MIN(s->height, ymin + 64); 340 start = ymin * surface_stride(surface); 341 end = (ymax + 1) * surface_stride(surface); 342 343 memory_region_set_dirty(&s->mem_vram, start, end - start); 344 } 345 346 static void g364fb_ctrl_write(void *opaque, 347 hwaddr addr, 348 uint64_t val, 349 unsigned int size) 350 { 351 G364State *s = opaque; 352 353 trace_g364fb_write(addr, val); 354 355 if (addr >= REG_CLR_PAL && addr < REG_CLR_PAL + 0x800) { 356 /* color palette */ 357 int idx = (addr - REG_CLR_PAL) >> 3; 358 s->color_palette[idx][0] = (val >> 16) & 0xff; 359 s->color_palette[idx][1] = (val >> 8) & 0xff; 360 s->color_palette[idx][2] = val & 0xff; 361 g364fb_invalidate_display(s); 362 } else if (addr >= REG_CURS_PAT && addr < REG_CURS_PAT + 0x1000) { 363 /* cursor pattern */ 364 int idx = (addr - REG_CURS_PAT) >> 3; 365 s->cursor[idx] = val; 366 g364fb_invalidate_display(s); 367 } else if (addr >= REG_CURS_PAL && addr < REG_CURS_PAL + 0x18) { 368 /* cursor palette */ 369 int idx = (addr - REG_CURS_PAL) >> 3; 370 s->cursor_palette[idx][0] = (val >> 16) & 0xff; 371 s->cursor_palette[idx][1] = (val >> 8) & 0xff; 372 s->cursor_palette[idx][2] = val & 0xff; 373 g364fb_invalidate_display(s); 374 } else { 375 switch (addr) { 376 case REG_BOOT: /* Boot timing */ 377 case 0x00108: /* Line timing: half sync */ 378 case 0x00110: /* Line timing: back porch */ 379 case 0x00120: /* Line timing: short display */ 380 case 0x00128: /* Frame timing: broad pulse */ 381 case 0x00130: /* Frame timing: v sync */ 382 case 0x00138: /* Frame timing: v preequalise */ 383 case 0x00140: /* Frame timing: v postequalise */ 384 case 0x00148: /* Frame timing: v blank */ 385 case 0x00158: /* Line timing: line time */ 386 case 0x00160: /* Frame store: line start */ 387 case 0x00168: /* vram cycle: mem init */ 388 case 0x00170: /* vram cycle: transfer delay */ 389 case 0x00200: /* vram cycle: mask register */ 390 /* ignore */ 391 break; 392 case REG_TOP: 393 s->top_of_screen = val; 394 g364fb_invalidate_display(s); 395 break; 396 case REG_DISPLAY: 397 s->width = val * 4; 398 break; 399 case REG_VDISPLAY: 400 s->height = val / 2; 401 break; 402 case REG_CTLA: 403 s->ctla = val; 404 g364fb_update_depth(s); 405 g364fb_invalidate_display(s); 406 break; 407 case REG_CURS_POS: 408 g364_invalidate_cursor_position(s); 409 s->cursor_position = val; 410 g364_invalidate_cursor_position(s); 411 break; 412 case REG_RESET: 413 g364fb_reset(s); 414 break; 415 default: 416 error_report("g364: invalid write of 0x%" PRIx64 417 " at [" TARGET_FMT_plx "]", val, addr); 418 break; 419 } 420 } 421 qemu_irq_lower(s->irq); 422 } 423 424 static const MemoryRegionOps g364fb_ctrl_ops = { 425 .read = g364fb_ctrl_read, 426 .write = g364fb_ctrl_write, 427 .endianness = DEVICE_LITTLE_ENDIAN, 428 .impl.min_access_size = 4, 429 .impl.max_access_size = 4, 430 }; 431 432 static int g364fb_post_load(void *opaque, int version_id) 433 { 434 G364State *s = opaque; 435 436 /* force refresh */ 437 g364fb_update_depth(s); 438 g364fb_invalidate_display(s); 439 440 return 0; 441 } 442 443 static const VMStateDescription vmstate_g364fb = { 444 .name = "g364fb", 445 .version_id = 1, 446 .minimum_version_id = 1, 447 .post_load = g364fb_post_load, 448 .fields = (VMStateField[]) { 449 VMSTATE_VBUFFER_UINT32(vram, G364State, 1, NULL, vram_size), 450 VMSTATE_BUFFER_UNSAFE(color_palette, G364State, 0, 256 * 3), 451 VMSTATE_BUFFER_UNSAFE(cursor_palette, G364State, 0, 9), 452 VMSTATE_UINT16_ARRAY(cursor, G364State, 512), 453 VMSTATE_UINT32(cursor_position, G364State), 454 VMSTATE_UINT32(ctla, G364State), 455 VMSTATE_UINT32(top_of_screen, G364State), 456 VMSTATE_UINT32(width, G364State), 457 VMSTATE_UINT32(height, G364State), 458 VMSTATE_END_OF_LIST() 459 } 460 }; 461 462 static const GraphicHwOps g364fb_ops = { 463 .invalidate = g364fb_invalidate_display, 464 .gfx_update = g364fb_update_display, 465 }; 466 467 static void g364fb_init(DeviceState *dev, G364State *s) 468 { 469 s->vram = g_malloc0(s->vram_size); 470 471 s->con = graphic_console_init(dev, 0, &g364fb_ops, s); 472 473 memory_region_init_io(&s->mem_ctrl, NULL, &g364fb_ctrl_ops, s, "ctrl", 0x180000); 474 memory_region_init_ram_ptr(&s->mem_vram, NULL, "vram", 475 s->vram_size, s->vram); 476 vmstate_register_ram(&s->mem_vram, dev); 477 memory_region_set_log(&s->mem_vram, true, DIRTY_MEMORY_VGA); 478 } 479 480 #define TYPE_G364 "sysbus-g364" 481 #define G364(obj) OBJECT_CHECK(G364SysBusState, (obj), TYPE_G364) 482 483 typedef struct { 484 SysBusDevice parent_obj; 485 486 G364State g364; 487 } G364SysBusState; 488 489 static int g364fb_sysbus_init(SysBusDevice *sbd) 490 { 491 DeviceState *dev = DEVICE(sbd); 492 G364SysBusState *sbs = G364(dev); 493 G364State *s = &sbs->g364; 494 495 g364fb_init(dev, s); 496 sysbus_init_irq(sbd, &s->irq); 497 sysbus_init_mmio(sbd, &s->mem_ctrl); 498 sysbus_init_mmio(sbd, &s->mem_vram); 499 500 return 0; 501 } 502 503 static void g364fb_sysbus_reset(DeviceState *d) 504 { 505 G364SysBusState *s = G364(d); 506 507 g364fb_reset(&s->g364); 508 } 509 510 static Property g364fb_sysbus_properties[] = { 511 DEFINE_PROP_UINT32("vram_size", G364SysBusState, g364.vram_size, 512 8 * 1024 * 1024), 513 DEFINE_PROP_END_OF_LIST(), 514 }; 515 516 static void g364fb_sysbus_class_init(ObjectClass *klass, void *data) 517 { 518 DeviceClass *dc = DEVICE_CLASS(klass); 519 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); 520 521 k->init = g364fb_sysbus_init; 522 set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories); 523 dc->desc = "G364 framebuffer"; 524 dc->reset = g364fb_sysbus_reset; 525 dc->vmsd = &vmstate_g364fb; 526 dc->props = g364fb_sysbus_properties; 527 } 528 529 static const TypeInfo g364fb_sysbus_info = { 530 .name = TYPE_G364, 531 .parent = TYPE_SYS_BUS_DEVICE, 532 .instance_size = sizeof(G364SysBusState), 533 .class_init = g364fb_sysbus_class_init, 534 }; 535 536 static void g364fb_register_types(void) 537 { 538 type_register_static(&g364fb_sysbus_info); 539 } 540 541 type_init(g364fb_register_types) 542