1 /* 2 * QEMU G364 framebuffer Emulator. 3 * 4 * Copyright (c) 2007-2011 Herve Poussineau 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License along 17 * with this program; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #include "qemu/osdep.h" 21 #include "qemu/units.h" 22 #include "hw/hw.h" 23 #include "hw/irq.h" 24 #include "qemu/error-report.h" 25 #include "qemu/module.h" 26 #include "ui/console.h" 27 #include "ui/pixel_ops.h" 28 #include "trace.h" 29 #include "hw/sysbus.h" 30 #include "migration/vmstate.h" 31 32 typedef struct G364State { 33 /* hardware */ 34 uint8_t *vram; 35 uint32_t vram_size; 36 qemu_irq irq; 37 MemoryRegion mem_vram; 38 MemoryRegion mem_ctrl; 39 /* registers */ 40 uint8_t color_palette[256][3]; 41 uint8_t cursor_palette[3][3]; 42 uint16_t cursor[512]; 43 uint32_t cursor_position; 44 uint32_t ctla; 45 uint32_t top_of_screen; 46 uint32_t width, height; /* in pixels */ 47 /* display refresh support */ 48 QemuConsole *con; 49 int depth; 50 int blanked; 51 } G364State; 52 53 #define REG_BOOT 0x000000 54 #define REG_DISPLAY 0x000118 55 #define REG_VDISPLAY 0x000150 56 #define REG_CTLA 0x000300 57 #define REG_TOP 0x000400 58 #define REG_CURS_PAL 0x000508 59 #define REG_CURS_POS 0x000638 60 #define REG_CLR_PAL 0x000800 61 #define REG_CURS_PAT 0x001000 62 #define REG_RESET 0x100000 63 64 #define CTLA_FORCE_BLANK 0x00000400 65 #define CTLA_NO_CURSOR 0x00800000 66 67 #define G364_PAGE_SIZE 4096 68 69 static inline int check_dirty(G364State *s, DirtyBitmapSnapshot *snap, ram_addr_t page) 70 { 71 return memory_region_snapshot_get_dirty(&s->mem_vram, snap, page, G364_PAGE_SIZE); 72 } 73 74 static void g364fb_draw_graphic8(G364State *s) 75 { 76 DisplaySurface *surface = qemu_console_surface(s->con); 77 DirtyBitmapSnapshot *snap; 78 int i, w; 79 uint8_t *vram; 80 uint8_t *data_display, *dd; 81 ram_addr_t page; 82 int x, y; 83 int xmin, xmax; 84 int ymin, ymax; 85 int xcursor, ycursor; 86 unsigned int (*rgb_to_pixel)(unsigned int r, unsigned int g, unsigned int b); 87 88 switch (surface_bits_per_pixel(surface)) { 89 case 8: 90 rgb_to_pixel = rgb_to_pixel8; 91 w = 1; 92 break; 93 case 15: 94 rgb_to_pixel = rgb_to_pixel15; 95 w = 2; 96 break; 97 case 16: 98 rgb_to_pixel = rgb_to_pixel16; 99 w = 2; 100 break; 101 case 32: 102 rgb_to_pixel = rgb_to_pixel32; 103 w = 4; 104 break; 105 default: 106 hw_error("g364: unknown host depth %d", 107 surface_bits_per_pixel(surface)); 108 return; 109 } 110 111 page = 0; 112 113 x = y = 0; 114 xmin = s->width; 115 xmax = 0; 116 ymin = s->height; 117 ymax = 0; 118 119 if (!(s->ctla & CTLA_NO_CURSOR)) { 120 xcursor = s->cursor_position >> 12; 121 ycursor = s->cursor_position & 0xfff; 122 } else { 123 xcursor = ycursor = -65; 124 } 125 126 vram = s->vram + s->top_of_screen; 127 /* XXX: out of range in vram? */ 128 data_display = dd = surface_data(surface); 129 snap = memory_region_snapshot_and_clear_dirty(&s->mem_vram, 0, s->vram_size, 130 DIRTY_MEMORY_VGA); 131 while (y < s->height) { 132 if (check_dirty(s, snap, page)) { 133 if (y < ymin) 134 ymin = ymax = y; 135 if (x < xmin) 136 xmin = x; 137 for (i = 0; i < G364_PAGE_SIZE; i++) { 138 uint8_t index; 139 unsigned int color; 140 if (unlikely((y >= ycursor && y < ycursor + 64) && 141 (x >= xcursor && x < xcursor + 64))) { 142 /* pointer area */ 143 int xdiff = x - xcursor; 144 uint16_t curs = s->cursor[(y - ycursor) * 8 + xdiff / 8]; 145 int op = (curs >> ((xdiff & 7) * 2)) & 3; 146 if (likely(op == 0)) { 147 /* transparent */ 148 index = *vram; 149 color = (*rgb_to_pixel)( 150 s->color_palette[index][0], 151 s->color_palette[index][1], 152 s->color_palette[index][2]); 153 } else { 154 /* get cursor color */ 155 index = op - 1; 156 color = (*rgb_to_pixel)( 157 s->cursor_palette[index][0], 158 s->cursor_palette[index][1], 159 s->cursor_palette[index][2]); 160 } 161 } else { 162 /* normal area */ 163 index = *vram; 164 color = (*rgb_to_pixel)( 165 s->color_palette[index][0], 166 s->color_palette[index][1], 167 s->color_palette[index][2]); 168 } 169 memcpy(dd, &color, w); 170 dd += w; 171 x++; 172 vram++; 173 if (x == s->width) { 174 xmax = s->width - 1; 175 y++; 176 if (y == s->height) { 177 ymax = s->height - 1; 178 goto done; 179 } 180 data_display = dd = data_display + surface_stride(surface); 181 xmin = 0; 182 x = 0; 183 } 184 } 185 if (x > xmax) 186 xmax = x; 187 if (y > ymax) 188 ymax = y; 189 } else { 190 int dy; 191 if (xmax || ymax) { 192 dpy_gfx_update(s->con, xmin, ymin, 193 xmax - xmin + 1, ymax - ymin + 1); 194 xmin = s->width; 195 xmax = 0; 196 ymin = s->height; 197 ymax = 0; 198 } 199 x += G364_PAGE_SIZE; 200 dy = x / s->width; 201 x = x % s->width; 202 y += dy; 203 vram += G364_PAGE_SIZE; 204 data_display += dy * surface_stride(surface); 205 dd = data_display + x * w; 206 } 207 page += G364_PAGE_SIZE; 208 } 209 210 done: 211 if (xmax || ymax) { 212 dpy_gfx_update(s->con, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1); 213 } 214 g_free(snap); 215 } 216 217 static void g364fb_draw_blank(G364State *s) 218 { 219 DisplaySurface *surface = qemu_console_surface(s->con); 220 int i, w; 221 uint8_t *d; 222 223 if (s->blanked) { 224 /* Screen is already blank. No need to redraw it */ 225 return; 226 } 227 228 w = s->width * surface_bytes_per_pixel(surface); 229 d = surface_data(surface); 230 for (i = 0; i < s->height; i++) { 231 memset(d, 0, w); 232 d += surface_stride(surface); 233 } 234 235 dpy_gfx_update_full(s->con); 236 s->blanked = 1; 237 } 238 239 static void g364fb_update_display(void *opaque) 240 { 241 G364State *s = opaque; 242 DisplaySurface *surface = qemu_console_surface(s->con); 243 244 qemu_flush_coalesced_mmio_buffer(); 245 246 if (s->width == 0 || s->height == 0) 247 return; 248 249 if (s->width != surface_width(surface) || 250 s->height != surface_height(surface)) { 251 qemu_console_resize(s->con, s->width, s->height); 252 } 253 254 if (s->ctla & CTLA_FORCE_BLANK) { 255 g364fb_draw_blank(s); 256 } else if (s->depth == 8) { 257 g364fb_draw_graphic8(s); 258 } else { 259 error_report("g364: unknown guest depth %d", s->depth); 260 } 261 262 qemu_irq_raise(s->irq); 263 } 264 265 static inline void g364fb_invalidate_display(void *opaque) 266 { 267 G364State *s = opaque; 268 269 s->blanked = 0; 270 memory_region_set_dirty(&s->mem_vram, 0, s->vram_size); 271 } 272 273 static void g364fb_reset(G364State *s) 274 { 275 qemu_irq_lower(s->irq); 276 277 memset(s->color_palette, 0, sizeof(s->color_palette)); 278 memset(s->cursor_palette, 0, sizeof(s->cursor_palette)); 279 memset(s->cursor, 0, sizeof(s->cursor)); 280 s->cursor_position = 0; 281 s->ctla = 0; 282 s->top_of_screen = 0; 283 s->width = s->height = 0; 284 memset(s->vram, 0, s->vram_size); 285 g364fb_invalidate_display(s); 286 } 287 288 /* called for accesses to io ports */ 289 static uint64_t g364fb_ctrl_read(void *opaque, 290 hwaddr addr, 291 unsigned int size) 292 { 293 G364State *s = opaque; 294 uint32_t val; 295 296 if (addr >= REG_CURS_PAT && addr < REG_CURS_PAT + 0x1000) { 297 /* cursor pattern */ 298 int idx = (addr - REG_CURS_PAT) >> 3; 299 val = s->cursor[idx]; 300 } else if (addr >= REG_CURS_PAL && addr < REG_CURS_PAL + 0x18) { 301 /* cursor palette */ 302 int idx = (addr - REG_CURS_PAL) >> 3; 303 val = ((uint32_t)s->cursor_palette[idx][0] << 16); 304 val |= ((uint32_t)s->cursor_palette[idx][1] << 8); 305 val |= ((uint32_t)s->cursor_palette[idx][2] << 0); 306 } else { 307 switch (addr) { 308 case REG_DISPLAY: 309 val = s->width / 4; 310 break; 311 case REG_VDISPLAY: 312 val = s->height * 2; 313 break; 314 case REG_CTLA: 315 val = s->ctla; 316 break; 317 default: 318 { 319 error_report("g364: invalid read at [" TARGET_FMT_plx "]", 320 addr); 321 val = 0; 322 break; 323 } 324 } 325 } 326 327 trace_g364fb_read(addr, val); 328 329 return val; 330 } 331 332 static void g364fb_update_depth(G364State *s) 333 { 334 static const int depths[8] = { 1, 2, 4, 8, 15, 16, 0 }; 335 s->depth = depths[(s->ctla & 0x00700000) >> 20]; 336 } 337 338 static void g364_invalidate_cursor_position(G364State *s) 339 { 340 DisplaySurface *surface = qemu_console_surface(s->con); 341 int ymin, ymax, start, end; 342 343 /* invalidate only near the cursor */ 344 ymin = s->cursor_position & 0xfff; 345 ymax = MIN(s->height, ymin + 64); 346 start = ymin * surface_stride(surface); 347 end = (ymax + 1) * surface_stride(surface); 348 349 memory_region_set_dirty(&s->mem_vram, start, end - start); 350 } 351 352 static void g364fb_ctrl_write(void *opaque, 353 hwaddr addr, 354 uint64_t val, 355 unsigned int size) 356 { 357 G364State *s = opaque; 358 359 trace_g364fb_write(addr, val); 360 361 if (addr >= REG_CLR_PAL && addr < REG_CLR_PAL + 0x800) { 362 /* color palette */ 363 int idx = (addr - REG_CLR_PAL) >> 3; 364 s->color_palette[idx][0] = (val >> 16) & 0xff; 365 s->color_palette[idx][1] = (val >> 8) & 0xff; 366 s->color_palette[idx][2] = val & 0xff; 367 g364fb_invalidate_display(s); 368 } else if (addr >= REG_CURS_PAT && addr < REG_CURS_PAT + 0x1000) { 369 /* cursor pattern */ 370 int idx = (addr - REG_CURS_PAT) >> 3; 371 s->cursor[idx] = val; 372 g364fb_invalidate_display(s); 373 } else if (addr >= REG_CURS_PAL && addr < REG_CURS_PAL + 0x18) { 374 /* cursor palette */ 375 int idx = (addr - REG_CURS_PAL) >> 3; 376 s->cursor_palette[idx][0] = (val >> 16) & 0xff; 377 s->cursor_palette[idx][1] = (val >> 8) & 0xff; 378 s->cursor_palette[idx][2] = val & 0xff; 379 g364fb_invalidate_display(s); 380 } else { 381 switch (addr) { 382 case REG_BOOT: /* Boot timing */ 383 case 0x00108: /* Line timing: half sync */ 384 case 0x00110: /* Line timing: back porch */ 385 case 0x00120: /* Line timing: short display */ 386 case 0x00128: /* Frame timing: broad pulse */ 387 case 0x00130: /* Frame timing: v sync */ 388 case 0x00138: /* Frame timing: v preequalise */ 389 case 0x00140: /* Frame timing: v postequalise */ 390 case 0x00148: /* Frame timing: v blank */ 391 case 0x00158: /* Line timing: line time */ 392 case 0x00160: /* Frame store: line start */ 393 case 0x00168: /* vram cycle: mem init */ 394 case 0x00170: /* vram cycle: transfer delay */ 395 case 0x00200: /* vram cycle: mask register */ 396 /* ignore */ 397 break; 398 case REG_TOP: 399 s->top_of_screen = val; 400 g364fb_invalidate_display(s); 401 break; 402 case REG_DISPLAY: 403 s->width = val * 4; 404 break; 405 case REG_VDISPLAY: 406 s->height = val / 2; 407 break; 408 case REG_CTLA: 409 s->ctla = val; 410 g364fb_update_depth(s); 411 g364fb_invalidate_display(s); 412 break; 413 case REG_CURS_POS: 414 g364_invalidate_cursor_position(s); 415 s->cursor_position = val; 416 g364_invalidate_cursor_position(s); 417 break; 418 case REG_RESET: 419 g364fb_reset(s); 420 break; 421 default: 422 error_report("g364: invalid write of 0x%" PRIx64 423 " at [" TARGET_FMT_plx "]", val, addr); 424 break; 425 } 426 } 427 qemu_irq_lower(s->irq); 428 } 429 430 static const MemoryRegionOps g364fb_ctrl_ops = { 431 .read = g364fb_ctrl_read, 432 .write = g364fb_ctrl_write, 433 .endianness = DEVICE_LITTLE_ENDIAN, 434 .impl.min_access_size = 4, 435 .impl.max_access_size = 4, 436 }; 437 438 static int g364fb_post_load(void *opaque, int version_id) 439 { 440 G364State *s = opaque; 441 442 /* force refresh */ 443 g364fb_update_depth(s); 444 g364fb_invalidate_display(s); 445 446 return 0; 447 } 448 449 static const VMStateDescription vmstate_g364fb = { 450 .name = "g364fb", 451 .version_id = 1, 452 .minimum_version_id = 1, 453 .post_load = g364fb_post_load, 454 .fields = (VMStateField[]) { 455 VMSTATE_VBUFFER_UINT32(vram, G364State, 1, NULL, vram_size), 456 VMSTATE_BUFFER_UNSAFE(color_palette, G364State, 0, 256 * 3), 457 VMSTATE_BUFFER_UNSAFE(cursor_palette, G364State, 0, 9), 458 VMSTATE_UINT16_ARRAY(cursor, G364State, 512), 459 VMSTATE_UINT32(cursor_position, G364State), 460 VMSTATE_UINT32(ctla, G364State), 461 VMSTATE_UINT32(top_of_screen, G364State), 462 VMSTATE_UINT32(width, G364State), 463 VMSTATE_UINT32(height, G364State), 464 VMSTATE_END_OF_LIST() 465 } 466 }; 467 468 static const GraphicHwOps g364fb_ops = { 469 .invalidate = g364fb_invalidate_display, 470 .gfx_update = g364fb_update_display, 471 }; 472 473 static void g364fb_init(DeviceState *dev, G364State *s) 474 { 475 s->vram = g_malloc0(s->vram_size); 476 477 s->con = graphic_console_init(dev, 0, &g364fb_ops, s); 478 479 memory_region_init_io(&s->mem_ctrl, NULL, &g364fb_ctrl_ops, s, "ctrl", 0x180000); 480 memory_region_init_ram_ptr(&s->mem_vram, NULL, "vram", 481 s->vram_size, s->vram); 482 vmstate_register_ram(&s->mem_vram, dev); 483 memory_region_set_log(&s->mem_vram, true, DIRTY_MEMORY_VGA); 484 } 485 486 #define TYPE_G364 "sysbus-g364" 487 #define G364(obj) OBJECT_CHECK(G364SysBusState, (obj), TYPE_G364) 488 489 typedef struct { 490 SysBusDevice parent_obj; 491 492 G364State g364; 493 } G364SysBusState; 494 495 static void g364fb_sysbus_realize(DeviceState *dev, Error **errp) 496 { 497 G364SysBusState *sbs = G364(dev); 498 G364State *s = &sbs->g364; 499 SysBusDevice *sbd = SYS_BUS_DEVICE(dev); 500 501 g364fb_init(dev, s); 502 sysbus_init_irq(sbd, &s->irq); 503 sysbus_init_mmio(sbd, &s->mem_ctrl); 504 sysbus_init_mmio(sbd, &s->mem_vram); 505 } 506 507 static void g364fb_sysbus_reset(DeviceState *d) 508 { 509 G364SysBusState *s = G364(d); 510 511 g364fb_reset(&s->g364); 512 } 513 514 static Property g364fb_sysbus_properties[] = { 515 DEFINE_PROP_UINT32("vram_size", G364SysBusState, g364.vram_size, 8 * MiB), 516 DEFINE_PROP_END_OF_LIST(), 517 }; 518 519 static void g364fb_sysbus_class_init(ObjectClass *klass, void *data) 520 { 521 DeviceClass *dc = DEVICE_CLASS(klass); 522 523 dc->realize = g364fb_sysbus_realize; 524 set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories); 525 dc->desc = "G364 framebuffer"; 526 dc->reset = g364fb_sysbus_reset; 527 dc->vmsd = &vmstate_g364fb; 528 dc->props = g364fb_sysbus_properties; 529 } 530 531 static const TypeInfo g364fb_sysbus_info = { 532 .name = TYPE_G364, 533 .parent = TYPE_SYS_BUS_DEVICE, 534 .instance_size = sizeof(G364SysBusState), 535 .class_init = g364fb_sysbus_class_init, 536 }; 537 538 static void g364fb_register_types(void) 539 { 540 type_register_static(&g364fb_sysbus_info); 541 } 542 543 type_init(g364fb_register_types) 544