1fc97bb5bSPaolo Bonzini /*
2fc97bb5bSPaolo Bonzini * Epson S1D13744/S1D13745 (Blizzard/Hailstorm/Tornado) LCD/TV controller.
3fc97bb5bSPaolo Bonzini *
4fc97bb5bSPaolo Bonzini * Copyright (C) 2008 Nokia Corporation
5fc97bb5bSPaolo Bonzini * Written by Andrzej Zaborowski <andrew@openedhand.com>
6fc97bb5bSPaolo Bonzini *
7fc97bb5bSPaolo Bonzini * This program is free software; you can redistribute it and/or
8fc97bb5bSPaolo Bonzini * modify it under the terms of the GNU General Public License as
9fc97bb5bSPaolo Bonzini * published by the Free Software Foundation; either version 2 or
10fc97bb5bSPaolo Bonzini * (at your option) version 3 of the License.
11fc97bb5bSPaolo Bonzini *
12fc97bb5bSPaolo Bonzini * This program is distributed in the hope that it will be useful,
13fc97bb5bSPaolo Bonzini * but WITHOUT ANY WARRANTY; without even the implied warranty of
14fc97bb5bSPaolo Bonzini * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15fc97bb5bSPaolo Bonzini * GNU General Public License for more details.
16fc97bb5bSPaolo Bonzini *
17fc97bb5bSPaolo Bonzini * You should have received a copy of the GNU General Public License along
18fc97bb5bSPaolo Bonzini * with this program; if not, see <http://www.gnu.org/licenses/>.
19fc97bb5bSPaolo Bonzini */
20fc97bb5bSPaolo Bonzini
2147df5154SPeter Maydell #include "qemu/osdep.h"
22fd1c2203SChen Qun #include "qemu/bitops.h"
23fc97bb5bSPaolo Bonzini #include "ui/console.h"
248a08cc71SPhilippe Mathieu-Daudé #include "hw/display/blizzard.h"
25fc97bb5bSPaolo Bonzini #include "ui/pixel_ops.h"
26fc97bb5bSPaolo Bonzini
27fc97bb5bSPaolo Bonzini typedef void (*blizzard_fn_t)(uint8_t *, const uint8_t *, unsigned int);
28fc97bb5bSPaolo Bonzini
29fc97bb5bSPaolo Bonzini typedef struct {
30fc97bb5bSPaolo Bonzini uint8_t reg;
31fc97bb5bSPaolo Bonzini uint32_t addr;
32fc97bb5bSPaolo Bonzini int swallow;
33fc97bb5bSPaolo Bonzini
34fc97bb5bSPaolo Bonzini int pll;
35fc97bb5bSPaolo Bonzini int pll_range;
36fc97bb5bSPaolo Bonzini int pll_ctrl;
37fc97bb5bSPaolo Bonzini uint8_t pll_mode;
38fc97bb5bSPaolo Bonzini uint8_t clksel;
39fc97bb5bSPaolo Bonzini int memenable;
40fc97bb5bSPaolo Bonzini int memrefresh;
41fc97bb5bSPaolo Bonzini uint8_t timing[3];
42fc97bb5bSPaolo Bonzini int priority;
43fc97bb5bSPaolo Bonzini
44fc97bb5bSPaolo Bonzini uint8_t lcd_config;
45fc97bb5bSPaolo Bonzini int x;
46fc97bb5bSPaolo Bonzini int y;
47fc97bb5bSPaolo Bonzini int skipx;
48fc97bb5bSPaolo Bonzini int skipy;
49fc97bb5bSPaolo Bonzini uint8_t hndp;
50fc97bb5bSPaolo Bonzini uint8_t vndp;
51fc97bb5bSPaolo Bonzini uint8_t hsync;
52fc97bb5bSPaolo Bonzini uint8_t vsync;
53fc97bb5bSPaolo Bonzini uint8_t pclk;
54fc97bb5bSPaolo Bonzini uint8_t u;
55fc97bb5bSPaolo Bonzini uint8_t v;
56fc97bb5bSPaolo Bonzini uint8_t yrc[2];
57fc97bb5bSPaolo Bonzini int ix[2];
58fc97bb5bSPaolo Bonzini int iy[2];
59fc97bb5bSPaolo Bonzini int ox[2];
60fc97bb5bSPaolo Bonzini int oy[2];
61fc97bb5bSPaolo Bonzini
62fc97bb5bSPaolo Bonzini int enable;
63fc97bb5bSPaolo Bonzini int blank;
64fc97bb5bSPaolo Bonzini int bpp;
65fc97bb5bSPaolo Bonzini int invalidate;
66fc97bb5bSPaolo Bonzini int mx[2];
67fc97bb5bSPaolo Bonzini int my[2];
68fc97bb5bSPaolo Bonzini uint8_t mode;
69fc97bb5bSPaolo Bonzini uint8_t effect;
70fc97bb5bSPaolo Bonzini uint8_t iformat;
71fc97bb5bSPaolo Bonzini uint8_t source;
72fc97bb5bSPaolo Bonzini QemuConsole *con;
73fc97bb5bSPaolo Bonzini blizzard_fn_t *line_fn_tab[2];
74fc97bb5bSPaolo Bonzini void *fb;
75fc97bb5bSPaolo Bonzini
76fc97bb5bSPaolo Bonzini uint8_t hssi_config[3];
77fc97bb5bSPaolo Bonzini uint8_t tv_config;
78fc97bb5bSPaolo Bonzini uint8_t tv_timing[4];
79fc97bb5bSPaolo Bonzini uint8_t vbi;
80fc97bb5bSPaolo Bonzini uint8_t tv_x;
81fc97bb5bSPaolo Bonzini uint8_t tv_y;
82fc97bb5bSPaolo Bonzini uint8_t tv_test;
83fc97bb5bSPaolo Bonzini uint8_t tv_filter_config;
84fc97bb5bSPaolo Bonzini uint8_t tv_filter_idx;
85fc97bb5bSPaolo Bonzini uint8_t tv_filter_coeff[0x20];
86fc97bb5bSPaolo Bonzini uint8_t border_r;
87fc97bb5bSPaolo Bonzini uint8_t border_g;
88fc97bb5bSPaolo Bonzini uint8_t border_b;
89fc97bb5bSPaolo Bonzini uint8_t gamma_config;
90fc97bb5bSPaolo Bonzini uint8_t gamma_idx;
91fc97bb5bSPaolo Bonzini uint8_t gamma_lut[0x100];
92fc97bb5bSPaolo Bonzini uint8_t matrix_ena;
93fc97bb5bSPaolo Bonzini uint8_t matrix_coeff[0x12];
94fc97bb5bSPaolo Bonzini uint8_t matrix_r;
95fc97bb5bSPaolo Bonzini uint8_t matrix_g;
96fc97bb5bSPaolo Bonzini uint8_t matrix_b;
97fc97bb5bSPaolo Bonzini uint8_t pm;
98fc97bb5bSPaolo Bonzini uint8_t status;
99fc97bb5bSPaolo Bonzini uint8_t rgbgpio_dir;
100fc97bb5bSPaolo Bonzini uint8_t rgbgpio;
101fc97bb5bSPaolo Bonzini uint8_t gpio_dir;
102fc97bb5bSPaolo Bonzini uint8_t gpio;
103fc97bb5bSPaolo Bonzini uint8_t gpio_edge[2];
104fc97bb5bSPaolo Bonzini uint8_t gpio_irq;
105fc97bb5bSPaolo Bonzini uint8_t gpio_pdown;
106fc97bb5bSPaolo Bonzini
107fc97bb5bSPaolo Bonzini struct {
108fc97bb5bSPaolo Bonzini int x;
109fc97bb5bSPaolo Bonzini int y;
110fc97bb5bSPaolo Bonzini int dx;
111fc97bb5bSPaolo Bonzini int dy;
112fc97bb5bSPaolo Bonzini int len;
113fc97bb5bSPaolo Bonzini int buflen;
114fc97bb5bSPaolo Bonzini void *buf;
115fc97bb5bSPaolo Bonzini void *data;
116fc97bb5bSPaolo Bonzini uint16_t *ptr;
117fc97bb5bSPaolo Bonzini int angle;
118fc97bb5bSPaolo Bonzini int pitch;
119fc97bb5bSPaolo Bonzini blizzard_fn_t line_fn;
120fc97bb5bSPaolo Bonzini } data;
121fc97bb5bSPaolo Bonzini } BlizzardState;
122fc97bb5bSPaolo Bonzini
123fc97bb5bSPaolo Bonzini /* Bytes(!) per pixel */
124fc97bb5bSPaolo Bonzini static const int blizzard_iformat_bpp[0x10] = {
125fc97bb5bSPaolo Bonzini 0,
126fc97bb5bSPaolo Bonzini 2, /* RGB 5:6:5*/
127fc97bb5bSPaolo Bonzini 3, /* RGB 6:6:6 mode 1 */
128fc97bb5bSPaolo Bonzini 3, /* RGB 8:8:8 mode 1 */
129fc97bb5bSPaolo Bonzini 0, 0,
130fc97bb5bSPaolo Bonzini 4, /* RGB 6:6:6 mode 2 */
131fc97bb5bSPaolo Bonzini 4, /* RGB 8:8:8 mode 2 */
132fc97bb5bSPaolo Bonzini 0, /* YUV 4:2:2 */
133fc97bb5bSPaolo Bonzini 0, /* YUV 4:2:0 */
134fc97bb5bSPaolo Bonzini 0, 0, 0, 0, 0, 0,
135fc97bb5bSPaolo Bonzini };
136fc97bb5bSPaolo Bonzini
blizzard_window(BlizzardState * s)137fc97bb5bSPaolo Bonzini static void blizzard_window(BlizzardState *s)
138fc97bb5bSPaolo Bonzini {
139fc97bb5bSPaolo Bonzini DisplaySurface *surface = qemu_console_surface(s->con);
140fc97bb5bSPaolo Bonzini uint8_t *src, *dst;
141fc97bb5bSPaolo Bonzini int bypp[2];
142fc97bb5bSPaolo Bonzini int bypl[3];
143fc97bb5bSPaolo Bonzini int y;
144fc97bb5bSPaolo Bonzini blizzard_fn_t fn = s->data.line_fn;
145fc97bb5bSPaolo Bonzini
146fc97bb5bSPaolo Bonzini if (!fn)
147fc97bb5bSPaolo Bonzini return;
148fc97bb5bSPaolo Bonzini if (s->mx[0] > s->data.x)
149fc97bb5bSPaolo Bonzini s->mx[0] = s->data.x;
150fc97bb5bSPaolo Bonzini if (s->my[0] > s->data.y)
151fc97bb5bSPaolo Bonzini s->my[0] = s->data.y;
152fc97bb5bSPaolo Bonzini if (s->mx[1] < s->data.x + s->data.dx)
153fc97bb5bSPaolo Bonzini s->mx[1] = s->data.x + s->data.dx;
154fc97bb5bSPaolo Bonzini if (s->my[1] < s->data.y + s->data.dy)
155fc97bb5bSPaolo Bonzini s->my[1] = s->data.y + s->data.dy;
156fc97bb5bSPaolo Bonzini
157fc97bb5bSPaolo Bonzini bypp[0] = s->bpp;
158fc97bb5bSPaolo Bonzini bypp[1] = surface_bytes_per_pixel(surface);
159fc97bb5bSPaolo Bonzini bypl[0] = bypp[0] * s->data.pitch;
160fc97bb5bSPaolo Bonzini bypl[1] = bypp[1] * s->x;
161fc97bb5bSPaolo Bonzini bypl[2] = bypp[0] * s->data.dx;
162fc97bb5bSPaolo Bonzini
163fc97bb5bSPaolo Bonzini src = s->data.data;
164fc97bb5bSPaolo Bonzini dst = s->fb + bypl[1] * s->data.y + bypp[1] * s->data.x;
165fc97bb5bSPaolo Bonzini for (y = s->data.dy; y > 0; y --, src += bypl[0], dst += bypl[1])
166fc97bb5bSPaolo Bonzini fn(dst, src, bypl[2]);
167fc97bb5bSPaolo Bonzini }
168fc97bb5bSPaolo Bonzini
blizzard_transfer_setup(BlizzardState * s)169fc97bb5bSPaolo Bonzini static int blizzard_transfer_setup(BlizzardState *s)
170fc97bb5bSPaolo Bonzini {
171fc97bb5bSPaolo Bonzini if (s->source > 3 || !s->bpp ||
172fc97bb5bSPaolo Bonzini s->ix[1] < s->ix[0] || s->iy[1] < s->iy[0])
173fc97bb5bSPaolo Bonzini return 0;
174fc97bb5bSPaolo Bonzini
175fc97bb5bSPaolo Bonzini s->data.angle = s->effect & 3;
176fc97bb5bSPaolo Bonzini s->data.line_fn = s->line_fn_tab[!!s->data.angle][s->iformat];
177fc97bb5bSPaolo Bonzini s->data.x = s->ix[0];
178fc97bb5bSPaolo Bonzini s->data.y = s->iy[0];
179fc97bb5bSPaolo Bonzini s->data.dx = s->ix[1] - s->ix[0] + 1;
180fc97bb5bSPaolo Bonzini s->data.dy = s->iy[1] - s->iy[0] + 1;
181fc97bb5bSPaolo Bonzini s->data.len = s->bpp * s->data.dx * s->data.dy;
182fc97bb5bSPaolo Bonzini s->data.pitch = s->data.dx;
183fc97bb5bSPaolo Bonzini if (s->data.len > s->data.buflen) {
184fc97bb5bSPaolo Bonzini s->data.buf = g_realloc(s->data.buf, s->data.len);
185fc97bb5bSPaolo Bonzini s->data.buflen = s->data.len;
186fc97bb5bSPaolo Bonzini }
187fc97bb5bSPaolo Bonzini s->data.ptr = s->data.buf;
188fc97bb5bSPaolo Bonzini s->data.data = s->data.buf;
189fc97bb5bSPaolo Bonzini s->data.len /= 2;
190fc97bb5bSPaolo Bonzini return 1;
191fc97bb5bSPaolo Bonzini }
192fc97bb5bSPaolo Bonzini
blizzard_reset(BlizzardState * s)193fc97bb5bSPaolo Bonzini static void blizzard_reset(BlizzardState *s)
194fc97bb5bSPaolo Bonzini {
195fc97bb5bSPaolo Bonzini s->reg = 0;
196fc97bb5bSPaolo Bonzini s->swallow = 0;
197fc97bb5bSPaolo Bonzini
198fc97bb5bSPaolo Bonzini s->pll = 9;
199fc97bb5bSPaolo Bonzini s->pll_range = 1;
200fc97bb5bSPaolo Bonzini s->pll_ctrl = 0x14;
201fc97bb5bSPaolo Bonzini s->pll_mode = 0x32;
202fc97bb5bSPaolo Bonzini s->clksel = 0x00;
203fc97bb5bSPaolo Bonzini s->memenable = 0;
204fc97bb5bSPaolo Bonzini s->memrefresh = 0x25c;
205fc97bb5bSPaolo Bonzini s->timing[0] = 0x3f;
206fc97bb5bSPaolo Bonzini s->timing[1] = 0x13;
207fc97bb5bSPaolo Bonzini s->timing[2] = 0x21;
208fc97bb5bSPaolo Bonzini s->priority = 0;
209fc97bb5bSPaolo Bonzini
210fc97bb5bSPaolo Bonzini s->lcd_config = 0x74;
211fc97bb5bSPaolo Bonzini s->x = 8;
212fc97bb5bSPaolo Bonzini s->y = 1;
213fc97bb5bSPaolo Bonzini s->skipx = 0;
214fc97bb5bSPaolo Bonzini s->skipy = 0;
215fc97bb5bSPaolo Bonzini s->hndp = 3;
216fc97bb5bSPaolo Bonzini s->vndp = 2;
217fc97bb5bSPaolo Bonzini s->hsync = 1;
218fc97bb5bSPaolo Bonzini s->vsync = 1;
219fc97bb5bSPaolo Bonzini s->pclk = 0x80;
220fc97bb5bSPaolo Bonzini
221fc97bb5bSPaolo Bonzini s->ix[0] = 0;
222fc97bb5bSPaolo Bonzini s->ix[1] = 0;
223fc97bb5bSPaolo Bonzini s->iy[0] = 0;
224fc97bb5bSPaolo Bonzini s->iy[1] = 0;
225fc97bb5bSPaolo Bonzini s->ox[0] = 0;
226fc97bb5bSPaolo Bonzini s->ox[1] = 0;
227fc97bb5bSPaolo Bonzini s->oy[0] = 0;
228fc97bb5bSPaolo Bonzini s->oy[1] = 0;
229fc97bb5bSPaolo Bonzini
230fc97bb5bSPaolo Bonzini s->yrc[0] = 0x00;
231fc97bb5bSPaolo Bonzini s->yrc[1] = 0x30;
232fc97bb5bSPaolo Bonzini s->u = 0;
233fc97bb5bSPaolo Bonzini s->v = 0;
234fc97bb5bSPaolo Bonzini
235fc97bb5bSPaolo Bonzini s->iformat = 3;
236fc97bb5bSPaolo Bonzini s->source = 0;
237fc97bb5bSPaolo Bonzini s->bpp = blizzard_iformat_bpp[s->iformat];
238fc97bb5bSPaolo Bonzini
239fc97bb5bSPaolo Bonzini s->hssi_config[0] = 0x00;
240fc97bb5bSPaolo Bonzini s->hssi_config[1] = 0x00;
241fc97bb5bSPaolo Bonzini s->hssi_config[2] = 0x01;
242fc97bb5bSPaolo Bonzini s->tv_config = 0x00;
243fc97bb5bSPaolo Bonzini s->tv_timing[0] = 0x00;
244fc97bb5bSPaolo Bonzini s->tv_timing[1] = 0x00;
245fc97bb5bSPaolo Bonzini s->tv_timing[2] = 0x00;
246fc97bb5bSPaolo Bonzini s->tv_timing[3] = 0x00;
247fc97bb5bSPaolo Bonzini s->vbi = 0x10;
248fc97bb5bSPaolo Bonzini s->tv_x = 0x14;
249fc97bb5bSPaolo Bonzini s->tv_y = 0x03;
250fc97bb5bSPaolo Bonzini s->tv_test = 0x00;
251fc97bb5bSPaolo Bonzini s->tv_filter_config = 0x80;
252fc97bb5bSPaolo Bonzini s->tv_filter_idx = 0x00;
253fc97bb5bSPaolo Bonzini s->border_r = 0x10;
254fc97bb5bSPaolo Bonzini s->border_g = 0x80;
255fc97bb5bSPaolo Bonzini s->border_b = 0x80;
256fc97bb5bSPaolo Bonzini s->gamma_config = 0x00;
257fc97bb5bSPaolo Bonzini s->gamma_idx = 0x00;
258fc97bb5bSPaolo Bonzini s->matrix_ena = 0x00;
259fc97bb5bSPaolo Bonzini memset(&s->matrix_coeff, 0, sizeof(s->matrix_coeff));
260fc97bb5bSPaolo Bonzini s->matrix_r = 0x00;
261fc97bb5bSPaolo Bonzini s->matrix_g = 0x00;
262fc97bb5bSPaolo Bonzini s->matrix_b = 0x00;
263fc97bb5bSPaolo Bonzini s->pm = 0x02;
264fc97bb5bSPaolo Bonzini s->status = 0x00;
265fc97bb5bSPaolo Bonzini s->rgbgpio_dir = 0x00;
266fc97bb5bSPaolo Bonzini s->gpio_dir = 0x00;
267fc97bb5bSPaolo Bonzini s->gpio_edge[0] = 0x00;
268fc97bb5bSPaolo Bonzini s->gpio_edge[1] = 0x00;
269fc97bb5bSPaolo Bonzini s->gpio_irq = 0x00;
270fc97bb5bSPaolo Bonzini s->gpio_pdown = 0xff;
271fc97bb5bSPaolo Bonzini }
272fc97bb5bSPaolo Bonzini
blizzard_invalidate_display(void * opaque)273fc97bb5bSPaolo Bonzini static inline void blizzard_invalidate_display(void *opaque) {
274fc97bb5bSPaolo Bonzini BlizzardState *s = (BlizzardState *) opaque;
275fc97bb5bSPaolo Bonzini
276fc97bb5bSPaolo Bonzini s->invalidate = 1;
277fc97bb5bSPaolo Bonzini }
278fc97bb5bSPaolo Bonzini
blizzard_reg_read(void * opaque,uint8_t reg)279fc97bb5bSPaolo Bonzini static uint16_t blizzard_reg_read(void *opaque, uint8_t reg)
280fc97bb5bSPaolo Bonzini {
281fc97bb5bSPaolo Bonzini BlizzardState *s = (BlizzardState *) opaque;
282fc97bb5bSPaolo Bonzini
283fc97bb5bSPaolo Bonzini switch (reg) {
284fc97bb5bSPaolo Bonzini case 0x00: /* Revision Code */
285fc97bb5bSPaolo Bonzini return 0xa5;
286fc97bb5bSPaolo Bonzini
287fc97bb5bSPaolo Bonzini case 0x02: /* Configuration Readback */
288fc97bb5bSPaolo Bonzini return 0x83; /* Macrovision OK, CNF[2:0] = 3 */
289fc97bb5bSPaolo Bonzini
290fc97bb5bSPaolo Bonzini case 0x04: /* PLL M-Divider */
291fc97bb5bSPaolo Bonzini return (s->pll - 1) | (1 << 7);
292fc97bb5bSPaolo Bonzini case 0x06: /* PLL Lock Range Control */
293fc97bb5bSPaolo Bonzini return s->pll_range;
294fc97bb5bSPaolo Bonzini case 0x08: /* PLL Lock Synthesis Control 0 */
295fc97bb5bSPaolo Bonzini return s->pll_ctrl & 0xff;
296fc97bb5bSPaolo Bonzini case 0x0a: /* PLL Lock Synthesis Control 1 */
297fc97bb5bSPaolo Bonzini return s->pll_ctrl >> 8;
298fc97bb5bSPaolo Bonzini case 0x0c: /* PLL Mode Control 0 */
299fc97bb5bSPaolo Bonzini return s->pll_mode;
300fc97bb5bSPaolo Bonzini
301fc97bb5bSPaolo Bonzini case 0x0e: /* Clock-Source Select */
302fc97bb5bSPaolo Bonzini return s->clksel;
303fc97bb5bSPaolo Bonzini
304fc97bb5bSPaolo Bonzini case 0x10: /* Memory Controller Activate */
305fc97bb5bSPaolo Bonzini case 0x14: /* Memory Controller Bank 0 Status Flag */
306fc97bb5bSPaolo Bonzini return s->memenable;
307fc97bb5bSPaolo Bonzini
308fc97bb5bSPaolo Bonzini case 0x18: /* Auto-Refresh Interval Setting 0 */
309fc97bb5bSPaolo Bonzini return s->memrefresh & 0xff;
310fc97bb5bSPaolo Bonzini case 0x1a: /* Auto-Refresh Interval Setting 1 */
311fc97bb5bSPaolo Bonzini return s->memrefresh >> 8;
312fc97bb5bSPaolo Bonzini
313fc97bb5bSPaolo Bonzini case 0x1c: /* Power-On Sequence Timing Control */
314fc97bb5bSPaolo Bonzini return s->timing[0];
315fc97bb5bSPaolo Bonzini case 0x1e: /* Timing Control 0 */
316fc97bb5bSPaolo Bonzini return s->timing[1];
317fc97bb5bSPaolo Bonzini case 0x20: /* Timing Control 1 */
318fc97bb5bSPaolo Bonzini return s->timing[2];
319fc97bb5bSPaolo Bonzini
320fc97bb5bSPaolo Bonzini case 0x24: /* Arbitration Priority Control */
321fc97bb5bSPaolo Bonzini return s->priority;
322fc97bb5bSPaolo Bonzini
323fc97bb5bSPaolo Bonzini case 0x28: /* LCD Panel Configuration */
324fc97bb5bSPaolo Bonzini return s->lcd_config;
325fc97bb5bSPaolo Bonzini
326fc97bb5bSPaolo Bonzini case 0x2a: /* LCD Horizontal Display Width */
327fc97bb5bSPaolo Bonzini return s->x >> 3;
328fc97bb5bSPaolo Bonzini case 0x2c: /* LCD Horizontal Non-display Period */
329fc97bb5bSPaolo Bonzini return s->hndp;
330fc97bb5bSPaolo Bonzini case 0x2e: /* LCD Vertical Display Height 0 */
331fc97bb5bSPaolo Bonzini return s->y & 0xff;
332fc97bb5bSPaolo Bonzini case 0x30: /* LCD Vertical Display Height 1 */
333fc97bb5bSPaolo Bonzini return s->y >> 8;
334fc97bb5bSPaolo Bonzini case 0x32: /* LCD Vertical Non-display Period */
335fc97bb5bSPaolo Bonzini return s->vndp;
336fc97bb5bSPaolo Bonzini case 0x34: /* LCD HS Pulse-width */
337fc97bb5bSPaolo Bonzini return s->hsync;
338fc97bb5bSPaolo Bonzini case 0x36: /* LCd HS Pulse Start Position */
339fc97bb5bSPaolo Bonzini return s->skipx >> 3;
340fc97bb5bSPaolo Bonzini case 0x38: /* LCD VS Pulse-width */
341fc97bb5bSPaolo Bonzini return s->vsync;
342fc97bb5bSPaolo Bonzini case 0x3a: /* LCD VS Pulse Start Position */
343fc97bb5bSPaolo Bonzini return s->skipy;
344fc97bb5bSPaolo Bonzini
345fc97bb5bSPaolo Bonzini case 0x3c: /* PCLK Polarity */
346fc97bb5bSPaolo Bonzini return s->pclk;
347fc97bb5bSPaolo Bonzini
348fc97bb5bSPaolo Bonzini case 0x3e: /* High-speed Serial Interface Tx Configuration Port 0 */
349fc97bb5bSPaolo Bonzini return s->hssi_config[0];
350fc97bb5bSPaolo Bonzini case 0x40: /* High-speed Serial Interface Tx Configuration Port 1 */
351fc97bb5bSPaolo Bonzini return s->hssi_config[1];
352fc97bb5bSPaolo Bonzini case 0x42: /* High-speed Serial Interface Tx Mode */
353fc97bb5bSPaolo Bonzini return s->hssi_config[2];
354fc97bb5bSPaolo Bonzini case 0x44: /* TV Display Configuration */
355fc97bb5bSPaolo Bonzini return s->tv_config;
356fc97bb5bSPaolo Bonzini case 0x46 ... 0x4c: /* TV Vertical Blanking Interval Data bits */
357fc97bb5bSPaolo Bonzini return s->tv_timing[(reg - 0x46) >> 1];
358fc97bb5bSPaolo Bonzini case 0x4e: /* VBI: Closed Caption / XDS Control / Status */
359fc97bb5bSPaolo Bonzini return s->vbi;
360fc97bb5bSPaolo Bonzini case 0x50: /* TV Horizontal Start Position */
361fc97bb5bSPaolo Bonzini return s->tv_x;
362fc97bb5bSPaolo Bonzini case 0x52: /* TV Vertical Start Position */
363fc97bb5bSPaolo Bonzini return s->tv_y;
364fc97bb5bSPaolo Bonzini case 0x54: /* TV Test Pattern Setting */
365fc97bb5bSPaolo Bonzini return s->tv_test;
366fc97bb5bSPaolo Bonzini case 0x56: /* TV Filter Setting */
367fc97bb5bSPaolo Bonzini return s->tv_filter_config;
368fc97bb5bSPaolo Bonzini case 0x58: /* TV Filter Coefficient Index */
369fc97bb5bSPaolo Bonzini return s->tv_filter_idx;
370fc97bb5bSPaolo Bonzini case 0x5a: /* TV Filter Coefficient Data */
371fc97bb5bSPaolo Bonzini if (s->tv_filter_idx < 0x20)
372fc97bb5bSPaolo Bonzini return s->tv_filter_coeff[s->tv_filter_idx ++];
373fc97bb5bSPaolo Bonzini return 0;
374fc97bb5bSPaolo Bonzini
375fc97bb5bSPaolo Bonzini case 0x60: /* Input YUV/RGB Translate Mode 0 */
376fc97bb5bSPaolo Bonzini return s->yrc[0];
377fc97bb5bSPaolo Bonzini case 0x62: /* Input YUV/RGB Translate Mode 1 */
378fc97bb5bSPaolo Bonzini return s->yrc[1];
379fc97bb5bSPaolo Bonzini case 0x64: /* U Data Fix */
380fc97bb5bSPaolo Bonzini return s->u;
381fc97bb5bSPaolo Bonzini case 0x66: /* V Data Fix */
382fc97bb5bSPaolo Bonzini return s->v;
383fc97bb5bSPaolo Bonzini
384fc97bb5bSPaolo Bonzini case 0x68: /* Display Mode */
385fc97bb5bSPaolo Bonzini return s->mode;
386fc97bb5bSPaolo Bonzini
387fc97bb5bSPaolo Bonzini case 0x6a: /* Special Effects */
388fc97bb5bSPaolo Bonzini return s->effect;
389fc97bb5bSPaolo Bonzini
390fc97bb5bSPaolo Bonzini case 0x6c: /* Input Window X Start Position 0 */
391fc97bb5bSPaolo Bonzini return s->ix[0] & 0xff;
392fc97bb5bSPaolo Bonzini case 0x6e: /* Input Window X Start Position 1 */
393fc97bb5bSPaolo Bonzini return s->ix[0] >> 3;
394fc97bb5bSPaolo Bonzini case 0x70: /* Input Window Y Start Position 0 */
395fc97bb5bSPaolo Bonzini return s->ix[0] & 0xff;
396fc97bb5bSPaolo Bonzini case 0x72: /* Input Window Y Start Position 1 */
397fc97bb5bSPaolo Bonzini return s->ix[0] >> 3;
398fc97bb5bSPaolo Bonzini case 0x74: /* Input Window X End Position 0 */
399fc97bb5bSPaolo Bonzini return s->ix[1] & 0xff;
400fc97bb5bSPaolo Bonzini case 0x76: /* Input Window X End Position 1 */
401fc97bb5bSPaolo Bonzini return s->ix[1] >> 3;
402fc97bb5bSPaolo Bonzini case 0x78: /* Input Window Y End Position 0 */
403fc97bb5bSPaolo Bonzini return s->ix[1] & 0xff;
404fc97bb5bSPaolo Bonzini case 0x7a: /* Input Window Y End Position 1 */
405fc97bb5bSPaolo Bonzini return s->ix[1] >> 3;
406fc97bb5bSPaolo Bonzini case 0x7c: /* Output Window X Start Position 0 */
407fc97bb5bSPaolo Bonzini return s->ox[0] & 0xff;
408fc97bb5bSPaolo Bonzini case 0x7e: /* Output Window X Start Position 1 */
409fc97bb5bSPaolo Bonzini return s->ox[0] >> 3;
410fc97bb5bSPaolo Bonzini case 0x80: /* Output Window Y Start Position 0 */
411fc97bb5bSPaolo Bonzini return s->oy[0] & 0xff;
412fc97bb5bSPaolo Bonzini case 0x82: /* Output Window Y Start Position 1 */
413fc97bb5bSPaolo Bonzini return s->oy[0] >> 3;
414fc97bb5bSPaolo Bonzini case 0x84: /* Output Window X End Position 0 */
415fc97bb5bSPaolo Bonzini return s->ox[1] & 0xff;
416fc97bb5bSPaolo Bonzini case 0x86: /* Output Window X End Position 1 */
417fc97bb5bSPaolo Bonzini return s->ox[1] >> 3;
418fc97bb5bSPaolo Bonzini case 0x88: /* Output Window Y End Position 0 */
419fc97bb5bSPaolo Bonzini return s->oy[1] & 0xff;
420fc97bb5bSPaolo Bonzini case 0x8a: /* Output Window Y End Position 1 */
421fc97bb5bSPaolo Bonzini return s->oy[1] >> 3;
422fc97bb5bSPaolo Bonzini
423fc97bb5bSPaolo Bonzini case 0x8c: /* Input Data Format */
424fc97bb5bSPaolo Bonzini return s->iformat;
425fc97bb5bSPaolo Bonzini case 0x8e: /* Data Source Select */
426fc97bb5bSPaolo Bonzini return s->source;
427fc97bb5bSPaolo Bonzini case 0x90: /* Display Memory Data Port */
428fc97bb5bSPaolo Bonzini return 0;
429fc97bb5bSPaolo Bonzini
430fc97bb5bSPaolo Bonzini case 0xa8: /* Border Color 0 */
431fc97bb5bSPaolo Bonzini return s->border_r;
432fc97bb5bSPaolo Bonzini case 0xaa: /* Border Color 1 */
433fc97bb5bSPaolo Bonzini return s->border_g;
434fc97bb5bSPaolo Bonzini case 0xac: /* Border Color 2 */
435fc97bb5bSPaolo Bonzini return s->border_b;
436fc97bb5bSPaolo Bonzini
437fc97bb5bSPaolo Bonzini case 0xb4: /* Gamma Correction Enable */
438fc97bb5bSPaolo Bonzini return s->gamma_config;
439fc97bb5bSPaolo Bonzini case 0xb6: /* Gamma Correction Table Index */
440fc97bb5bSPaolo Bonzini return s->gamma_idx;
441fc97bb5bSPaolo Bonzini case 0xb8: /* Gamma Correction Table Data */
442fc97bb5bSPaolo Bonzini return s->gamma_lut[s->gamma_idx ++];
443fc97bb5bSPaolo Bonzini
444fc97bb5bSPaolo Bonzini case 0xba: /* 3x3 Matrix Enable */
445fc97bb5bSPaolo Bonzini return s->matrix_ena;
446fc97bb5bSPaolo Bonzini case 0xbc ... 0xde: /* Coefficient Registers */
447fc97bb5bSPaolo Bonzini return s->matrix_coeff[(reg - 0xbc) >> 1];
448fc97bb5bSPaolo Bonzini case 0xe0: /* 3x3 Matrix Red Offset */
449fc97bb5bSPaolo Bonzini return s->matrix_r;
450fc97bb5bSPaolo Bonzini case 0xe2: /* 3x3 Matrix Green Offset */
451fc97bb5bSPaolo Bonzini return s->matrix_g;
452fc97bb5bSPaolo Bonzini case 0xe4: /* 3x3 Matrix Blue Offset */
453fc97bb5bSPaolo Bonzini return s->matrix_b;
454fc97bb5bSPaolo Bonzini
455fc97bb5bSPaolo Bonzini case 0xe6: /* Power-save */
456fc97bb5bSPaolo Bonzini return s->pm;
457fc97bb5bSPaolo Bonzini case 0xe8: /* Non-display Period Control / Status */
458fc97bb5bSPaolo Bonzini return s->status | (1 << 5);
459fc97bb5bSPaolo Bonzini case 0xea: /* RGB Interface Control */
460fc97bb5bSPaolo Bonzini return s->rgbgpio_dir;
461fc97bb5bSPaolo Bonzini case 0xec: /* RGB Interface Status */
462fc97bb5bSPaolo Bonzini return s->rgbgpio;
463fc97bb5bSPaolo Bonzini case 0xee: /* General-purpose IO Pins Configuration */
464fc97bb5bSPaolo Bonzini return s->gpio_dir;
465fc97bb5bSPaolo Bonzini case 0xf0: /* General-purpose IO Pins Status / Control */
466fc97bb5bSPaolo Bonzini return s->gpio;
467fc97bb5bSPaolo Bonzini case 0xf2: /* GPIO Positive Edge Interrupt Trigger */
468fc97bb5bSPaolo Bonzini return s->gpio_edge[0];
469fc97bb5bSPaolo Bonzini case 0xf4: /* GPIO Negative Edge Interrupt Trigger */
470fc97bb5bSPaolo Bonzini return s->gpio_edge[1];
471fc97bb5bSPaolo Bonzini case 0xf6: /* GPIO Interrupt Status */
472fc97bb5bSPaolo Bonzini return s->gpio_irq;
473fc97bb5bSPaolo Bonzini case 0xf8: /* GPIO Pull-down Control */
474fc97bb5bSPaolo Bonzini return s->gpio_pdown;
475fc97bb5bSPaolo Bonzini
476fc97bb5bSPaolo Bonzini default:
477a89f364aSAlistair Francis fprintf(stderr, "%s: unknown register %02x\n", __func__, reg);
478fc97bb5bSPaolo Bonzini return 0;
479fc97bb5bSPaolo Bonzini }
480fc97bb5bSPaolo Bonzini }
481fc97bb5bSPaolo Bonzini
blizzard_reg_write(void * opaque,uint8_t reg,uint16_t value)482fc97bb5bSPaolo Bonzini static void blizzard_reg_write(void *opaque, uint8_t reg, uint16_t value)
483fc97bb5bSPaolo Bonzini {
484fc97bb5bSPaolo Bonzini BlizzardState *s = (BlizzardState *) opaque;
485fc97bb5bSPaolo Bonzini
486fc97bb5bSPaolo Bonzini switch (reg) {
487fc97bb5bSPaolo Bonzini case 0x04: /* PLL M-Divider */
488fc97bb5bSPaolo Bonzini s->pll = (value & 0x3f) + 1;
489fc97bb5bSPaolo Bonzini break;
490fc97bb5bSPaolo Bonzini case 0x06: /* PLL Lock Range Control */
491fc97bb5bSPaolo Bonzini s->pll_range = value & 3;
492fc97bb5bSPaolo Bonzini break;
493fc97bb5bSPaolo Bonzini case 0x08: /* PLL Lock Synthesis Control 0 */
494fc97bb5bSPaolo Bonzini s->pll_ctrl &= 0xf00;
495fc97bb5bSPaolo Bonzini s->pll_ctrl |= (value << 0) & 0x0ff;
496fc97bb5bSPaolo Bonzini break;
497fc97bb5bSPaolo Bonzini case 0x0a: /* PLL Lock Synthesis Control 1 */
498fc97bb5bSPaolo Bonzini s->pll_ctrl &= 0x0ff;
499fc97bb5bSPaolo Bonzini s->pll_ctrl |= (value << 8) & 0xf00;
500fc97bb5bSPaolo Bonzini break;
501fc97bb5bSPaolo Bonzini case 0x0c: /* PLL Mode Control 0 */
502fc97bb5bSPaolo Bonzini s->pll_mode = value & 0x77;
503fc97bb5bSPaolo Bonzini if ((value & 3) == 0 || (value & 3) == 3)
504fc97bb5bSPaolo Bonzini fprintf(stderr, "%s: wrong PLL Control bits (%i)\n",
505a89f364aSAlistair Francis __func__, value & 3);
506fc97bb5bSPaolo Bonzini break;
507fc97bb5bSPaolo Bonzini
508fc97bb5bSPaolo Bonzini case 0x0e: /* Clock-Source Select */
509fc97bb5bSPaolo Bonzini s->clksel = value & 0xff;
510fc97bb5bSPaolo Bonzini break;
511fc97bb5bSPaolo Bonzini
512fc97bb5bSPaolo Bonzini case 0x10: /* Memory Controller Activate */
513fc97bb5bSPaolo Bonzini s->memenable = value & 1;
514fc97bb5bSPaolo Bonzini break;
515fc97bb5bSPaolo Bonzini case 0x14: /* Memory Controller Bank 0 Status Flag */
516fc97bb5bSPaolo Bonzini break;
517fc97bb5bSPaolo Bonzini
518fc97bb5bSPaolo Bonzini case 0x18: /* Auto-Refresh Interval Setting 0 */
519fc97bb5bSPaolo Bonzini s->memrefresh &= 0xf00;
520fc97bb5bSPaolo Bonzini s->memrefresh |= (value << 0) & 0x0ff;
521fc97bb5bSPaolo Bonzini break;
522fc97bb5bSPaolo Bonzini case 0x1a: /* Auto-Refresh Interval Setting 1 */
523fc97bb5bSPaolo Bonzini s->memrefresh &= 0x0ff;
524fc97bb5bSPaolo Bonzini s->memrefresh |= (value << 8) & 0xf00;
525fc97bb5bSPaolo Bonzini break;
526fc97bb5bSPaolo Bonzini
527fc97bb5bSPaolo Bonzini case 0x1c: /* Power-On Sequence Timing Control */
528fc97bb5bSPaolo Bonzini s->timing[0] = value & 0x7f;
529fc97bb5bSPaolo Bonzini break;
530fc97bb5bSPaolo Bonzini case 0x1e: /* Timing Control 0 */
531fc97bb5bSPaolo Bonzini s->timing[1] = value & 0x17;
532fc97bb5bSPaolo Bonzini break;
533fc97bb5bSPaolo Bonzini case 0x20: /* Timing Control 1 */
534fc97bb5bSPaolo Bonzini s->timing[2] = value & 0x35;
535fc97bb5bSPaolo Bonzini break;
536fc97bb5bSPaolo Bonzini
537fc97bb5bSPaolo Bonzini case 0x24: /* Arbitration Priority Control */
538fc97bb5bSPaolo Bonzini s->priority = value & 1;
539fc97bb5bSPaolo Bonzini break;
540fc97bb5bSPaolo Bonzini
541fc97bb5bSPaolo Bonzini case 0x28: /* LCD Panel Configuration */
542fc97bb5bSPaolo Bonzini s->lcd_config = value & 0xff;
543fc97bb5bSPaolo Bonzini if (value & (1 << 7))
544a89f364aSAlistair Francis fprintf(stderr, "%s: data swap not supported!\n", __func__);
545fc97bb5bSPaolo Bonzini break;
546fc97bb5bSPaolo Bonzini
547fc97bb5bSPaolo Bonzini case 0x2a: /* LCD Horizontal Display Width */
548fc97bb5bSPaolo Bonzini s->x = value << 3;
549fc97bb5bSPaolo Bonzini break;
550fc97bb5bSPaolo Bonzini case 0x2c: /* LCD Horizontal Non-display Period */
551fc97bb5bSPaolo Bonzini s->hndp = value & 0xff;
552fc97bb5bSPaolo Bonzini break;
553fc97bb5bSPaolo Bonzini case 0x2e: /* LCD Vertical Display Height 0 */
554fc97bb5bSPaolo Bonzini s->y &= 0x300;
555fc97bb5bSPaolo Bonzini s->y |= (value << 0) & 0x0ff;
556fc97bb5bSPaolo Bonzini break;
557fc97bb5bSPaolo Bonzini case 0x30: /* LCD Vertical Display Height 1 */
558fc97bb5bSPaolo Bonzini s->y &= 0x0ff;
559fc97bb5bSPaolo Bonzini s->y |= (value << 8) & 0x300;
560fc97bb5bSPaolo Bonzini break;
561fc97bb5bSPaolo Bonzini case 0x32: /* LCD Vertical Non-display Period */
562fc97bb5bSPaolo Bonzini s->vndp = value & 0xff;
563fc97bb5bSPaolo Bonzini break;
564fc97bb5bSPaolo Bonzini case 0x34: /* LCD HS Pulse-width */
565fc97bb5bSPaolo Bonzini s->hsync = value & 0xff;
566fc97bb5bSPaolo Bonzini break;
567fc97bb5bSPaolo Bonzini case 0x36: /* LCD HS Pulse Start Position */
568fc97bb5bSPaolo Bonzini s->skipx = value & 0xff;
569fc97bb5bSPaolo Bonzini break;
570fc97bb5bSPaolo Bonzini case 0x38: /* LCD VS Pulse-width */
571fc97bb5bSPaolo Bonzini s->vsync = value & 0xbf;
572fc97bb5bSPaolo Bonzini break;
573fc97bb5bSPaolo Bonzini case 0x3a: /* LCD VS Pulse Start Position */
574fc97bb5bSPaolo Bonzini s->skipy = value & 0xff;
575fc97bb5bSPaolo Bonzini break;
576fc97bb5bSPaolo Bonzini
577fc97bb5bSPaolo Bonzini case 0x3c: /* PCLK Polarity */
578fc97bb5bSPaolo Bonzini s->pclk = value & 0x82;
579fc97bb5bSPaolo Bonzini /* Affects calculation of s->hndp, s->hsync and s->skipx. */
580fc97bb5bSPaolo Bonzini break;
581fc97bb5bSPaolo Bonzini
582fc97bb5bSPaolo Bonzini case 0x3e: /* High-speed Serial Interface Tx Configuration Port 0 */
583fc97bb5bSPaolo Bonzini s->hssi_config[0] = value;
584fc97bb5bSPaolo Bonzini break;
585fc97bb5bSPaolo Bonzini case 0x40: /* High-speed Serial Interface Tx Configuration Port 1 */
586fc97bb5bSPaolo Bonzini s->hssi_config[1] = value;
587fc97bb5bSPaolo Bonzini if (((value >> 4) & 3) == 3)
588fc97bb5bSPaolo Bonzini fprintf(stderr, "%s: Illegal active-data-links value\n",
589a89f364aSAlistair Francis __func__);
590fc97bb5bSPaolo Bonzini break;
591fc97bb5bSPaolo Bonzini case 0x42: /* High-speed Serial Interface Tx Mode */
592fc97bb5bSPaolo Bonzini s->hssi_config[2] = value & 0xbd;
593fc97bb5bSPaolo Bonzini break;
594fc97bb5bSPaolo Bonzini
595fc97bb5bSPaolo Bonzini case 0x44: /* TV Display Configuration */
596fc97bb5bSPaolo Bonzini s->tv_config = value & 0xfe;
597fc97bb5bSPaolo Bonzini break;
598fc97bb5bSPaolo Bonzini case 0x46 ... 0x4c: /* TV Vertical Blanking Interval Data bits 0 */
599fc97bb5bSPaolo Bonzini s->tv_timing[(reg - 0x46) >> 1] = value;
600fc97bb5bSPaolo Bonzini break;
601fc97bb5bSPaolo Bonzini case 0x4e: /* VBI: Closed Caption / XDS Control / Status */
602fc97bb5bSPaolo Bonzini s->vbi = value;
603fc97bb5bSPaolo Bonzini break;
604fc97bb5bSPaolo Bonzini case 0x50: /* TV Horizontal Start Position */
605fc97bb5bSPaolo Bonzini s->tv_x = value;
606fc97bb5bSPaolo Bonzini break;
607fc97bb5bSPaolo Bonzini case 0x52: /* TV Vertical Start Position */
608fc97bb5bSPaolo Bonzini s->tv_y = value & 0x7f;
609fc97bb5bSPaolo Bonzini break;
610fc97bb5bSPaolo Bonzini case 0x54: /* TV Test Pattern Setting */
611fc97bb5bSPaolo Bonzini s->tv_test = value;
612fc97bb5bSPaolo Bonzini break;
613fc97bb5bSPaolo Bonzini case 0x56: /* TV Filter Setting */
614fc97bb5bSPaolo Bonzini s->tv_filter_config = value & 0xbf;
615fc97bb5bSPaolo Bonzini break;
616fc97bb5bSPaolo Bonzini case 0x58: /* TV Filter Coefficient Index */
617fc97bb5bSPaolo Bonzini s->tv_filter_idx = value & 0x1f;
618fc97bb5bSPaolo Bonzini break;
619fc97bb5bSPaolo Bonzini case 0x5a: /* TV Filter Coefficient Data */
620fc97bb5bSPaolo Bonzini if (s->tv_filter_idx < 0x20)
621fc97bb5bSPaolo Bonzini s->tv_filter_coeff[s->tv_filter_idx ++] = value;
622fc97bb5bSPaolo Bonzini break;
623fc97bb5bSPaolo Bonzini
624fc97bb5bSPaolo Bonzini case 0x60: /* Input YUV/RGB Translate Mode 0 */
625fc97bb5bSPaolo Bonzini s->yrc[0] = value & 0xb0;
626fc97bb5bSPaolo Bonzini break;
627fc97bb5bSPaolo Bonzini case 0x62: /* Input YUV/RGB Translate Mode 1 */
628fc97bb5bSPaolo Bonzini s->yrc[1] = value & 0x30;
629fc97bb5bSPaolo Bonzini break;
630fc97bb5bSPaolo Bonzini case 0x64: /* U Data Fix */
631fc97bb5bSPaolo Bonzini s->u = value & 0xff;
632fc97bb5bSPaolo Bonzini break;
633fc97bb5bSPaolo Bonzini case 0x66: /* V Data Fix */
634fc97bb5bSPaolo Bonzini s->v = value & 0xff;
635fc97bb5bSPaolo Bonzini break;
636fc97bb5bSPaolo Bonzini
637fc97bb5bSPaolo Bonzini case 0x68: /* Display Mode */
638fc97bb5bSPaolo Bonzini if ((s->mode ^ value) & 3)
639fc97bb5bSPaolo Bonzini s->invalidate = 1;
640fc97bb5bSPaolo Bonzini s->mode = value & 0xb7;
641fc97bb5bSPaolo Bonzini s->enable = value & 1;
642fc97bb5bSPaolo Bonzini s->blank = (value >> 1) & 1;
643fc97bb5bSPaolo Bonzini if (value & (1 << 4))
644a89f364aSAlistair Francis fprintf(stderr, "%s: Macrovision enable attempt!\n", __func__);
645fc97bb5bSPaolo Bonzini break;
646fc97bb5bSPaolo Bonzini
647fc97bb5bSPaolo Bonzini case 0x6a: /* Special Effects */
648fc97bb5bSPaolo Bonzini s->effect = value & 0xfb;
649fc97bb5bSPaolo Bonzini break;
650fc97bb5bSPaolo Bonzini
651fc97bb5bSPaolo Bonzini case 0x6c: /* Input Window X Start Position 0 */
652fc97bb5bSPaolo Bonzini s->ix[0] &= 0x300;
653fc97bb5bSPaolo Bonzini s->ix[0] |= (value << 0) & 0x0ff;
654fc97bb5bSPaolo Bonzini break;
655fc97bb5bSPaolo Bonzini case 0x6e: /* Input Window X Start Position 1 */
656fc97bb5bSPaolo Bonzini s->ix[0] &= 0x0ff;
657fc97bb5bSPaolo Bonzini s->ix[0] |= (value << 8) & 0x300;
658fc97bb5bSPaolo Bonzini break;
659fc97bb5bSPaolo Bonzini case 0x70: /* Input Window Y Start Position 0 */
660fc97bb5bSPaolo Bonzini s->iy[0] &= 0x300;
661fc97bb5bSPaolo Bonzini s->iy[0] |= (value << 0) & 0x0ff;
662fc97bb5bSPaolo Bonzini break;
663fc97bb5bSPaolo Bonzini case 0x72: /* Input Window Y Start Position 1 */
664fc97bb5bSPaolo Bonzini s->iy[0] &= 0x0ff;
665fc97bb5bSPaolo Bonzini s->iy[0] |= (value << 8) & 0x300;
666fc97bb5bSPaolo Bonzini break;
667fc97bb5bSPaolo Bonzini case 0x74: /* Input Window X End Position 0 */
668fc97bb5bSPaolo Bonzini s->ix[1] &= 0x300;
669fc97bb5bSPaolo Bonzini s->ix[1] |= (value << 0) & 0x0ff;
670fc97bb5bSPaolo Bonzini break;
671fc97bb5bSPaolo Bonzini case 0x76: /* Input Window X End Position 1 */
672fc97bb5bSPaolo Bonzini s->ix[1] &= 0x0ff;
673fc97bb5bSPaolo Bonzini s->ix[1] |= (value << 8) & 0x300;
674fc97bb5bSPaolo Bonzini break;
675fc97bb5bSPaolo Bonzini case 0x78: /* Input Window Y End Position 0 */
676fc97bb5bSPaolo Bonzini s->iy[1] &= 0x300;
677fc97bb5bSPaolo Bonzini s->iy[1] |= (value << 0) & 0x0ff;
678fc97bb5bSPaolo Bonzini break;
679fc97bb5bSPaolo Bonzini case 0x7a: /* Input Window Y End Position 1 */
680fc97bb5bSPaolo Bonzini s->iy[1] &= 0x0ff;
681fc97bb5bSPaolo Bonzini s->iy[1] |= (value << 8) & 0x300;
682fc97bb5bSPaolo Bonzini break;
683fc97bb5bSPaolo Bonzini case 0x7c: /* Output Window X Start Position 0 */
684fc97bb5bSPaolo Bonzini s->ox[0] &= 0x300;
685fc97bb5bSPaolo Bonzini s->ox[0] |= (value << 0) & 0x0ff;
686fc97bb5bSPaolo Bonzini break;
687fc97bb5bSPaolo Bonzini case 0x7e: /* Output Window X Start Position 1 */
688fc97bb5bSPaolo Bonzini s->ox[0] &= 0x0ff;
689fc97bb5bSPaolo Bonzini s->ox[0] |= (value << 8) & 0x300;
690fc97bb5bSPaolo Bonzini break;
691fc97bb5bSPaolo Bonzini case 0x80: /* Output Window Y Start Position 0 */
692fc97bb5bSPaolo Bonzini s->oy[0] &= 0x300;
693fc97bb5bSPaolo Bonzini s->oy[0] |= (value << 0) & 0x0ff;
694fc97bb5bSPaolo Bonzini break;
695fc97bb5bSPaolo Bonzini case 0x82: /* Output Window Y Start Position 1 */
696fc97bb5bSPaolo Bonzini s->oy[0] &= 0x0ff;
697fc97bb5bSPaolo Bonzini s->oy[0] |= (value << 8) & 0x300;
698fc97bb5bSPaolo Bonzini break;
699fc97bb5bSPaolo Bonzini case 0x84: /* Output Window X End Position 0 */
700fc97bb5bSPaolo Bonzini s->ox[1] &= 0x300;
701fc97bb5bSPaolo Bonzini s->ox[1] |= (value << 0) & 0x0ff;
702fc97bb5bSPaolo Bonzini break;
703fc97bb5bSPaolo Bonzini case 0x86: /* Output Window X End Position 1 */
704fc97bb5bSPaolo Bonzini s->ox[1] &= 0x0ff;
705fc97bb5bSPaolo Bonzini s->ox[1] |= (value << 8) & 0x300;
706fc97bb5bSPaolo Bonzini break;
707fc97bb5bSPaolo Bonzini case 0x88: /* Output Window Y End Position 0 */
708fc97bb5bSPaolo Bonzini s->oy[1] &= 0x300;
709fc97bb5bSPaolo Bonzini s->oy[1] |= (value << 0) & 0x0ff;
710fc97bb5bSPaolo Bonzini break;
711fc97bb5bSPaolo Bonzini case 0x8a: /* Output Window Y End Position 1 */
712fc97bb5bSPaolo Bonzini s->oy[1] &= 0x0ff;
713fc97bb5bSPaolo Bonzini s->oy[1] |= (value << 8) & 0x300;
714fc97bb5bSPaolo Bonzini break;
715fc97bb5bSPaolo Bonzini
716fc97bb5bSPaolo Bonzini case 0x8c: /* Input Data Format */
717fc97bb5bSPaolo Bonzini s->iformat = value & 0xf;
718fc97bb5bSPaolo Bonzini s->bpp = blizzard_iformat_bpp[s->iformat];
719fc97bb5bSPaolo Bonzini if (!s->bpp)
720fc97bb5bSPaolo Bonzini fprintf(stderr, "%s: Illegal or unsupported input format %x\n",
721a89f364aSAlistair Francis __func__, s->iformat);
722fc97bb5bSPaolo Bonzini break;
723fc97bb5bSPaolo Bonzini case 0x8e: /* Data Source Select */
724fc97bb5bSPaolo Bonzini s->source = value & 7;
725fc97bb5bSPaolo Bonzini /* Currently all windows will be "destructive overlays". */
726fc97bb5bSPaolo Bonzini if ((!(s->effect & (1 << 3)) && (s->ix[0] != s->ox[0] ||
727fc97bb5bSPaolo Bonzini s->iy[0] != s->oy[0] ||
728fc97bb5bSPaolo Bonzini s->ix[1] != s->ox[1] ||
729fc97bb5bSPaolo Bonzini s->iy[1] != s->oy[1])) ||
730fc97bb5bSPaolo Bonzini !((s->ix[1] - s->ix[0]) & (s->iy[1] - s->iy[0]) &
731fc97bb5bSPaolo Bonzini (s->ox[1] - s->ox[0]) & (s->oy[1] - s->oy[0]) & 1))
732fc97bb5bSPaolo Bonzini fprintf(stderr, "%s: Illegal input/output window positions\n",
733a89f364aSAlistair Francis __func__);
734fc97bb5bSPaolo Bonzini
735fc97bb5bSPaolo Bonzini blizzard_transfer_setup(s);
736fc97bb5bSPaolo Bonzini break;
737fc97bb5bSPaolo Bonzini
738fc97bb5bSPaolo Bonzini case 0x90: /* Display Memory Data Port */
739fc97bb5bSPaolo Bonzini if (!s->data.len && !blizzard_transfer_setup(s))
740fc97bb5bSPaolo Bonzini break;
741fc97bb5bSPaolo Bonzini
742fc97bb5bSPaolo Bonzini *s->data.ptr ++ = value;
743fc97bb5bSPaolo Bonzini if (-- s->data.len == 0)
744fc97bb5bSPaolo Bonzini blizzard_window(s);
745fc97bb5bSPaolo Bonzini break;
746fc97bb5bSPaolo Bonzini
747fc97bb5bSPaolo Bonzini case 0xa8: /* Border Color 0 */
748fc97bb5bSPaolo Bonzini s->border_r = value;
749fc97bb5bSPaolo Bonzini break;
750fc97bb5bSPaolo Bonzini case 0xaa: /* Border Color 1 */
751fc97bb5bSPaolo Bonzini s->border_g = value;
752fc97bb5bSPaolo Bonzini break;
753fc97bb5bSPaolo Bonzini case 0xac: /* Border Color 2 */
754fc97bb5bSPaolo Bonzini s->border_b = value;
755fc97bb5bSPaolo Bonzini break;
756fc97bb5bSPaolo Bonzini
757fc97bb5bSPaolo Bonzini case 0xb4: /* Gamma Correction Enable */
758fc97bb5bSPaolo Bonzini s->gamma_config = value & 0x87;
759fc97bb5bSPaolo Bonzini break;
760fc97bb5bSPaolo Bonzini case 0xb6: /* Gamma Correction Table Index */
761fc97bb5bSPaolo Bonzini s->gamma_idx = value;
762fc97bb5bSPaolo Bonzini break;
763fc97bb5bSPaolo Bonzini case 0xb8: /* Gamma Correction Table Data */
764fc97bb5bSPaolo Bonzini s->gamma_lut[s->gamma_idx ++] = value;
765fc97bb5bSPaolo Bonzini break;
766fc97bb5bSPaolo Bonzini
767fc97bb5bSPaolo Bonzini case 0xba: /* 3x3 Matrix Enable */
768fc97bb5bSPaolo Bonzini s->matrix_ena = value & 1;
769fc97bb5bSPaolo Bonzini break;
770fc97bb5bSPaolo Bonzini case 0xbc ... 0xde: /* Coefficient Registers */
771fc97bb5bSPaolo Bonzini s->matrix_coeff[(reg - 0xbc) >> 1] = value & ((reg & 2) ? 0x80 : 0xff);
772fc97bb5bSPaolo Bonzini break;
773fc97bb5bSPaolo Bonzini case 0xe0: /* 3x3 Matrix Red Offset */
774fc97bb5bSPaolo Bonzini s->matrix_r = value;
775fc97bb5bSPaolo Bonzini break;
776fc97bb5bSPaolo Bonzini case 0xe2: /* 3x3 Matrix Green Offset */
777fc97bb5bSPaolo Bonzini s->matrix_g = value;
778fc97bb5bSPaolo Bonzini break;
779fc97bb5bSPaolo Bonzini case 0xe4: /* 3x3 Matrix Blue Offset */
780fc97bb5bSPaolo Bonzini s->matrix_b = value;
781fc97bb5bSPaolo Bonzini break;
782fc97bb5bSPaolo Bonzini
783fc97bb5bSPaolo Bonzini case 0xe6: /* Power-save */
784fc97bb5bSPaolo Bonzini s->pm = value & 0x83;
785fc97bb5bSPaolo Bonzini if (value & s->mode & 1)
786fc97bb5bSPaolo Bonzini fprintf(stderr, "%s: The display must be disabled before entering "
787a89f364aSAlistair Francis "Standby Mode\n", __func__);
788fc97bb5bSPaolo Bonzini break;
789fc97bb5bSPaolo Bonzini case 0xe8: /* Non-display Period Control / Status */
790fc97bb5bSPaolo Bonzini s->status = value & 0x1b;
791fc97bb5bSPaolo Bonzini break;
792fc97bb5bSPaolo Bonzini case 0xea: /* RGB Interface Control */
793fc97bb5bSPaolo Bonzini s->rgbgpio_dir = value & 0x8f;
794fc97bb5bSPaolo Bonzini break;
795fc97bb5bSPaolo Bonzini case 0xec: /* RGB Interface Status */
796fc97bb5bSPaolo Bonzini s->rgbgpio = value & 0xcf;
797fc97bb5bSPaolo Bonzini break;
798fc97bb5bSPaolo Bonzini case 0xee: /* General-purpose IO Pins Configuration */
799fc97bb5bSPaolo Bonzini s->gpio_dir = value;
800fc97bb5bSPaolo Bonzini break;
801fc97bb5bSPaolo Bonzini case 0xf0: /* General-purpose IO Pins Status / Control */
802fc97bb5bSPaolo Bonzini s->gpio = value;
803fc97bb5bSPaolo Bonzini break;
804fc97bb5bSPaolo Bonzini case 0xf2: /* GPIO Positive Edge Interrupt Trigger */
805fc97bb5bSPaolo Bonzini s->gpio_edge[0] = value;
806fc97bb5bSPaolo Bonzini break;
807fc97bb5bSPaolo Bonzini case 0xf4: /* GPIO Negative Edge Interrupt Trigger */
808fc97bb5bSPaolo Bonzini s->gpio_edge[1] = value;
809fc97bb5bSPaolo Bonzini break;
810fc97bb5bSPaolo Bonzini case 0xf6: /* GPIO Interrupt Status */
811fc97bb5bSPaolo Bonzini s->gpio_irq &= value;
812fc97bb5bSPaolo Bonzini break;
813fc97bb5bSPaolo Bonzini case 0xf8: /* GPIO Pull-down Control */
814fc97bb5bSPaolo Bonzini s->gpio_pdown = value;
815fc97bb5bSPaolo Bonzini break;
816fc97bb5bSPaolo Bonzini
817fc97bb5bSPaolo Bonzini default:
818a89f364aSAlistair Francis fprintf(stderr, "%s: unknown register %02x\n", __func__, reg);
819fc97bb5bSPaolo Bonzini break;
820fc97bb5bSPaolo Bonzini }
821fc97bb5bSPaolo Bonzini }
822fc97bb5bSPaolo Bonzini
s1d13745_read(void * opaque,int dc)823fc97bb5bSPaolo Bonzini uint16_t s1d13745_read(void *opaque, int dc)
824fc97bb5bSPaolo Bonzini {
825fc97bb5bSPaolo Bonzini BlizzardState *s = (BlizzardState *) opaque;
826fc97bb5bSPaolo Bonzini uint16_t value = blizzard_reg_read(s, s->reg);
827fc97bb5bSPaolo Bonzini
828fc97bb5bSPaolo Bonzini if (s->swallow -- > 0)
829fc97bb5bSPaolo Bonzini return 0;
830fc97bb5bSPaolo Bonzini if (dc)
831fc97bb5bSPaolo Bonzini s->reg ++;
832fc97bb5bSPaolo Bonzini
833fc97bb5bSPaolo Bonzini return value;
834fc97bb5bSPaolo Bonzini }
835fc97bb5bSPaolo Bonzini
s1d13745_write(void * opaque,int dc,uint16_t value)836fc97bb5bSPaolo Bonzini void s1d13745_write(void *opaque, int dc, uint16_t value)
837fc97bb5bSPaolo Bonzini {
838fc97bb5bSPaolo Bonzini BlizzardState *s = (BlizzardState *) opaque;
839fc97bb5bSPaolo Bonzini
840fc97bb5bSPaolo Bonzini if (s->swallow -- > 0)
841fc97bb5bSPaolo Bonzini return;
842fc97bb5bSPaolo Bonzini if (dc) {
843fc97bb5bSPaolo Bonzini blizzard_reg_write(s, s->reg, value);
844fc97bb5bSPaolo Bonzini
845fc97bb5bSPaolo Bonzini if (s->reg != 0x90 && s->reg != 0x5a && s->reg != 0xb8)
846fc97bb5bSPaolo Bonzini s->reg += 2;
847fc97bb5bSPaolo Bonzini } else
848fc97bb5bSPaolo Bonzini s->reg = value & 0xff;
849fc97bb5bSPaolo Bonzini }
850fc97bb5bSPaolo Bonzini
s1d13745_write_block(void * opaque,int dc,void * buf,size_t len,int pitch)851fc97bb5bSPaolo Bonzini void s1d13745_write_block(void *opaque, int dc,
852fc97bb5bSPaolo Bonzini void *buf, size_t len, int pitch)
853fc97bb5bSPaolo Bonzini {
854fc97bb5bSPaolo Bonzini BlizzardState *s = (BlizzardState *) opaque;
855fc97bb5bSPaolo Bonzini
856fc97bb5bSPaolo Bonzini while (len > 0) {
857fc97bb5bSPaolo Bonzini if (s->reg == 0x90 && dc &&
858fc97bb5bSPaolo Bonzini (s->data.len || blizzard_transfer_setup(s)) &&
859fc97bb5bSPaolo Bonzini len >= (s->data.len << 1)) {
860fc97bb5bSPaolo Bonzini len -= s->data.len << 1;
861fc97bb5bSPaolo Bonzini s->data.len = 0;
862fc97bb5bSPaolo Bonzini s->data.data = buf;
863fc97bb5bSPaolo Bonzini if (pitch)
864fc97bb5bSPaolo Bonzini s->data.pitch = pitch;
865fc97bb5bSPaolo Bonzini blizzard_window(s);
866fc97bb5bSPaolo Bonzini s->data.data = s->data.buf;
867fc97bb5bSPaolo Bonzini continue;
868fc97bb5bSPaolo Bonzini }
869fc97bb5bSPaolo Bonzini
870fc97bb5bSPaolo Bonzini s1d13745_write(opaque, dc, *(uint16_t *) buf);
871fc97bb5bSPaolo Bonzini len -= 2;
872fc97bb5bSPaolo Bonzini buf += 2;
873fc97bb5bSPaolo Bonzini }
874fc97bb5bSPaolo Bonzini }
875fc97bb5bSPaolo Bonzini
blizzard_update_display(void * opaque)876fc97bb5bSPaolo Bonzini static void blizzard_update_display(void *opaque)
877fc97bb5bSPaolo Bonzini {
878fc97bb5bSPaolo Bonzini BlizzardState *s = (BlizzardState *) opaque;
879fc97bb5bSPaolo Bonzini DisplaySurface *surface = qemu_console_surface(s->con);
880fc97bb5bSPaolo Bonzini int y, bypp, bypl, bwidth;
881fc97bb5bSPaolo Bonzini uint8_t *src, *dst;
882fc97bb5bSPaolo Bonzini
883fc97bb5bSPaolo Bonzini if (!s->enable)
884fc97bb5bSPaolo Bonzini return;
885fc97bb5bSPaolo Bonzini
886fc97bb5bSPaolo Bonzini if (s->x != surface_width(surface) || s->y != surface_height(surface)) {
887fc97bb5bSPaolo Bonzini s->invalidate = 1;
888fc97bb5bSPaolo Bonzini qemu_console_resize(s->con, s->x, s->y);
889fc97bb5bSPaolo Bonzini surface = qemu_console_surface(s->con);
890fc97bb5bSPaolo Bonzini }
891fc97bb5bSPaolo Bonzini
892fc97bb5bSPaolo Bonzini if (s->invalidate) {
893fc97bb5bSPaolo Bonzini s->invalidate = 0;
894fc97bb5bSPaolo Bonzini
895fc97bb5bSPaolo Bonzini if (s->blank) {
896fc97bb5bSPaolo Bonzini bypp = surface_bytes_per_pixel(surface);
897fc97bb5bSPaolo Bonzini memset(surface_data(surface), 0, bypp * s->x * s->y);
898fc97bb5bSPaolo Bonzini return;
899fc97bb5bSPaolo Bonzini }
900fc97bb5bSPaolo Bonzini
901fc97bb5bSPaolo Bonzini s->mx[0] = 0;
902fc97bb5bSPaolo Bonzini s->mx[1] = s->x;
903fc97bb5bSPaolo Bonzini s->my[0] = 0;
904fc97bb5bSPaolo Bonzini s->my[1] = s->y;
905fc97bb5bSPaolo Bonzini }
906fc97bb5bSPaolo Bonzini
907fc97bb5bSPaolo Bonzini if (s->mx[1] <= s->mx[0])
908fc97bb5bSPaolo Bonzini return;
909fc97bb5bSPaolo Bonzini
910fc97bb5bSPaolo Bonzini bypp = surface_bytes_per_pixel(surface);
911fc97bb5bSPaolo Bonzini bypl = bypp * s->x;
912fc97bb5bSPaolo Bonzini bwidth = bypp * (s->mx[1] - s->mx[0]);
913fc97bb5bSPaolo Bonzini y = s->my[0];
914fc97bb5bSPaolo Bonzini src = s->fb + bypl * y + bypp * s->mx[0];
915fc97bb5bSPaolo Bonzini dst = surface_data(surface) + bypl * y + bypp * s->mx[0];
916fc97bb5bSPaolo Bonzini for (; y < s->my[1]; y ++, src += bypl, dst += bypl)
917fc97bb5bSPaolo Bonzini memcpy(dst, src, bwidth);
918fc97bb5bSPaolo Bonzini
919fc97bb5bSPaolo Bonzini dpy_gfx_update(s->con, s->mx[0], s->my[0],
920fc97bb5bSPaolo Bonzini s->mx[1] - s->mx[0], y - s->my[0]);
921fc97bb5bSPaolo Bonzini
922fc97bb5bSPaolo Bonzini s->mx[0] = s->x;
923fc97bb5bSPaolo Bonzini s->mx[1] = 0;
924fc97bb5bSPaolo Bonzini s->my[0] = s->y;
925fc97bb5bSPaolo Bonzini s->my[1] = 0;
926fc97bb5bSPaolo Bonzini }
927fc97bb5bSPaolo Bonzini
blizzard_draw_line16_32(uint32_t * dest,const uint16_t * src,unsigned int width)9284274d821SPeter Maydell static void blizzard_draw_line16_32(uint32_t *dest,
9294274d821SPeter Maydell const uint16_t *src, unsigned int width)
9304274d821SPeter Maydell {
9314274d821SPeter Maydell uint16_t data;
9324274d821SPeter Maydell unsigned int r, g, b;
9334274d821SPeter Maydell const uint16_t *end = (const void *) src + width;
9344274d821SPeter Maydell while (src < end) {
9354274d821SPeter Maydell data = *src ++;
936fd1c2203SChen Qun b = extract16(data, 0, 5) << 3;
937fd1c2203SChen Qun g = extract16(data, 5, 6) << 2;
938fd1c2203SChen Qun r = extract16(data, 11, 5) << 3;
9394274d821SPeter Maydell *dest++ = rgb_to_pixel32(r, g, b);
9404274d821SPeter Maydell }
9414274d821SPeter Maydell }
9424274d821SPeter Maydell
blizzard_draw_line24mode1_32(uint32_t * dest,const uint8_t * src,unsigned int width)9434274d821SPeter Maydell static void blizzard_draw_line24mode1_32(uint32_t *dest,
9444274d821SPeter Maydell const uint8_t *src, unsigned int width)
9454274d821SPeter Maydell {
9464274d821SPeter Maydell /* TODO: check if SDL 24-bit planes are not in the same format and
9474274d821SPeter Maydell * if so, use memcpy */
9484274d821SPeter Maydell unsigned int r[2], g[2], b[2];
9494274d821SPeter Maydell const uint8_t *end = src + width;
9504274d821SPeter Maydell while (src < end) {
9514274d821SPeter Maydell g[0] = *src ++;
9524274d821SPeter Maydell r[0] = *src ++;
9534274d821SPeter Maydell r[1] = *src ++;
9544274d821SPeter Maydell b[0] = *src ++;
9554274d821SPeter Maydell *dest++ = rgb_to_pixel32(r[0], g[0], b[0]);
9564274d821SPeter Maydell b[1] = *src ++;
9574274d821SPeter Maydell g[1] = *src ++;
9584274d821SPeter Maydell *dest++ = rgb_to_pixel32(r[1], g[1], b[1]);
9594274d821SPeter Maydell }
9604274d821SPeter Maydell }
9614274d821SPeter Maydell
blizzard_draw_line24mode2_32(uint32_t * dest,const uint8_t * src,unsigned int width)9624274d821SPeter Maydell static void blizzard_draw_line24mode2_32(uint32_t *dest,
9634274d821SPeter Maydell const uint8_t *src, unsigned int width)
9644274d821SPeter Maydell {
9654274d821SPeter Maydell unsigned int r, g, b;
9664274d821SPeter Maydell const uint8_t *end = src + width;
9674274d821SPeter Maydell while (src < end) {
9684274d821SPeter Maydell r = *src ++;
9694274d821SPeter Maydell src ++;
9704274d821SPeter Maydell b = *src ++;
9714274d821SPeter Maydell g = *src ++;
9724274d821SPeter Maydell *dest++ = rgb_to_pixel32(r, g, b);
9734274d821SPeter Maydell }
9744274d821SPeter Maydell }
9754274d821SPeter Maydell
9764274d821SPeter Maydell /* No rotation */
9774274d821SPeter Maydell static blizzard_fn_t blizzard_draw_fn_32[0x10] = {
9784274d821SPeter Maydell NULL,
9794274d821SPeter Maydell /* RGB 5:6:5*/
9804274d821SPeter Maydell (blizzard_fn_t) blizzard_draw_line16_32,
9814274d821SPeter Maydell /* RGB 6:6:6 mode 1 */
9824274d821SPeter Maydell (blizzard_fn_t) blizzard_draw_line24mode1_32,
9834274d821SPeter Maydell /* RGB 8:8:8 mode 1 */
9844274d821SPeter Maydell (blizzard_fn_t) blizzard_draw_line24mode1_32,
9854274d821SPeter Maydell NULL, NULL,
9864274d821SPeter Maydell /* RGB 6:6:6 mode 2 */
9874274d821SPeter Maydell (blizzard_fn_t) blizzard_draw_line24mode2_32,
9884274d821SPeter Maydell /* RGB 8:8:8 mode 2 */
9894274d821SPeter Maydell (blizzard_fn_t) blizzard_draw_line24mode2_32,
9904274d821SPeter Maydell /* YUV 4:2:2 */
9914274d821SPeter Maydell NULL,
9924274d821SPeter Maydell /* YUV 4:2:0 */
9934274d821SPeter Maydell NULL,
9944274d821SPeter Maydell NULL, NULL, NULL, NULL, NULL, NULL,
9954274d821SPeter Maydell };
9964274d821SPeter Maydell
9974274d821SPeter Maydell /* 90deg, 180deg and 270deg rotation */
9984274d821SPeter Maydell static blizzard_fn_t blizzard_draw_fn_r_32[0x10] = {
9994274d821SPeter Maydell /* TODO */
10004274d821SPeter Maydell [0 ... 0xf] = NULL,
10014274d821SPeter Maydell };
1002fc97bb5bSPaolo Bonzini
1003380cd056SGerd Hoffmann static const GraphicHwOps blizzard_ops = {
1004380cd056SGerd Hoffmann .invalidate = blizzard_invalidate_display,
1005380cd056SGerd Hoffmann .gfx_update = blizzard_update_display,
1006380cd056SGerd Hoffmann };
1007380cd056SGerd Hoffmann
s1d13745_init(qemu_irq gpio_int)1008fc97bb5bSPaolo Bonzini void *s1d13745_init(qemu_irq gpio_int)
1009fc97bb5bSPaolo Bonzini {
1010*0a553c12SMarkus Armbruster BlizzardState *s = g_malloc0(sizeof(*s));
1011fc97bb5bSPaolo Bonzini DisplaySurface *surface;
1012fc97bb5bSPaolo Bonzini
1013fc97bb5bSPaolo Bonzini s->fb = g_malloc(0x180000);
1014fc97bb5bSPaolo Bonzini
10155643706aSGerd Hoffmann s->con = graphic_console_init(NULL, 0, &blizzard_ops, s);
1016fc97bb5bSPaolo Bonzini surface = qemu_console_surface(s->con);
1017fc97bb5bSPaolo Bonzini
10185c87c408SPooja Dhannawat assert(surface_bits_per_pixel(surface) == 32);
10195c87c408SPooja Dhannawat
1020fc97bb5bSPaolo Bonzini s->line_fn_tab[0] = blizzard_draw_fn_32;
1021fc97bb5bSPaolo Bonzini s->line_fn_tab[1] = blizzard_draw_fn_r_32;
1022fc97bb5bSPaolo Bonzini
1023fc97bb5bSPaolo Bonzini blizzard_reset(s);
1024fc97bb5bSPaolo Bonzini
1025fc97bb5bSPaolo Bonzini return s;
1026fc97bb5bSPaolo Bonzini }
1027