xref: /openbmc/qemu/hw/display/ati_int.h (revision f1733749)
1 /*
2  * QEMU ATI SVGA emulation
3  *
4  * Copyright (c) 2019 BALATON Zoltan
5  *
6  * This work is licensed under the GNU GPL license version 2 or later.
7  */
8 
9 #ifndef ATI_INT_H
10 #define ATI_INT_H
11 
12 #include "qemu/timer.h"
13 #include "hw/pci/pci.h"
14 #include "hw/i2c/bitbang_i2c.h"
15 #include "vga_int.h"
16 
17 /*#define DEBUG_ATI*/
18 
19 #ifdef DEBUG_ATI
20 #define DPRINTF(fmt, ...) printf("%s: " fmt, __func__, ## __VA_ARGS__)
21 #else
22 #define DPRINTF(fmt, ...) do {} while (0)
23 #endif
24 
25 #define PCI_VENDOR_ID_ATI 0x1002
26 /* Rage128 Pro GL */
27 #define PCI_DEVICE_ID_ATI_RAGE128_PF 0x5046
28 /* Radeon RV100 (VE) */
29 #define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159
30 
31 #define TYPE_ATI_VGA "ati-vga"
32 #define ATI_VGA(obj) OBJECT_CHECK(ATIVGAState, (obj), TYPE_ATI_VGA)
33 
34 typedef struct ATIVGARegs {
35     uint32_t mm_index;
36     uint32_t bios_scratch[8];
37     uint32_t gen_int_cntl;
38     uint32_t gen_int_status;
39     uint32_t crtc_gen_cntl;
40     uint32_t crtc_ext_cntl;
41     uint32_t dac_cntl;
42     uint32_t gpio_vga_ddc;
43     uint32_t gpio_dvi_ddc;
44     uint32_t gpio_monid;
45     uint32_t config_cntl;
46     uint32_t crtc_h_total_disp;
47     uint32_t crtc_h_sync_strt_wid;
48     uint32_t crtc_v_total_disp;
49     uint32_t crtc_v_sync_strt_wid;
50     uint32_t crtc_offset;
51     uint32_t crtc_offset_cntl;
52     uint32_t crtc_pitch;
53     uint32_t cur_offset;
54     uint32_t cur_hv_pos;
55     uint32_t cur_hv_offs;
56     uint32_t cur_color0;
57     uint32_t cur_color1;
58     uint32_t dst_offset;
59     uint32_t dst_pitch;
60     uint32_t dst_tile;
61     uint32_t dst_width;
62     uint32_t dst_height;
63     uint32_t src_offset;
64     uint32_t src_pitch;
65     uint32_t src_tile;
66     uint32_t src_x;
67     uint32_t src_y;
68     uint32_t dst_x;
69     uint32_t dst_y;
70     uint32_t dp_gui_master_cntl;
71     uint32_t dp_brush_bkgd_clr;
72     uint32_t dp_brush_frgd_clr;
73     uint32_t dp_src_frgd_clr;
74     uint32_t dp_src_bkgd_clr;
75     uint32_t dp_cntl;
76     uint32_t dp_datatype;
77     uint32_t dp_mix;
78     uint32_t dp_write_mask;
79     uint32_t default_offset;
80     uint32_t default_pitch;
81     uint32_t default_tile;
82     uint32_t default_sc_bottom_right;
83 } ATIVGARegs;
84 
85 typedef struct ATIVGAState {
86     PCIDevice dev;
87     VGACommonState vga;
88     char *model;
89     uint16_t dev_id;
90     uint8_t mode;
91     bool cursor_guest_mode;
92     uint16_t cursor_size;
93     uint32_t cursor_offset;
94     QEMUCursor *cursor;
95     QEMUTimer vblank_timer;
96     bitbang_i2c_interface bbi2c;
97     MemoryRegion io;
98     MemoryRegion mm;
99     ATIVGARegs regs;
100 } ATIVGAState;
101 
102 const char *ati_reg_name(int num);
103 
104 void ati_2d_blt(ATIVGAState *s);
105 
106 #endif /* ATI_INT_H */
107