1 /* 2 * QEMU ATI SVGA emulation 3 * 4 * Copyright (c) 2019 BALATON Zoltan 5 * 6 * This work is licensed under the GNU GPL license version 2 or later. 7 */ 8 9 #ifndef ATI_INT_H 10 #define ATI_INT_H 11 12 #include "qemu/timer.h" 13 #include "hw/pci/pci_device.h" 14 #include "hw/i2c/bitbang_i2c.h" 15 #include "vga_int.h" 16 #include "qom/object.h" 17 18 /*#define DEBUG_ATI*/ 19 20 #ifdef DEBUG_ATI 21 #define DPRINTF(fmt, ...) printf("%s: " fmt, __func__, ## __VA_ARGS__) 22 #else 23 #define DPRINTF(fmt, ...) do {} while (0) 24 #endif 25 26 #define PCI_VENDOR_ID_ATI 0x1002 27 /* Rage128 Pro GL */ 28 #define PCI_DEVICE_ID_ATI_RAGE128_PF 0x5046 29 /* Radeon RV100 (VE) */ 30 #define PCI_DEVICE_ID_ATI_RADEON_QY 0x5159 31 32 #define TYPE_ATI_VGA "ati-vga" 33 OBJECT_DECLARE_SIMPLE_TYPE(ATIVGAState, ATI_VGA) 34 35 typedef struct ATIVGARegs { 36 uint32_t mm_index; 37 uint32_t bios_scratch[8]; 38 uint32_t gen_int_cntl; 39 uint32_t gen_int_status; 40 uint32_t crtc_gen_cntl; 41 uint32_t crtc_ext_cntl; 42 uint32_t dac_cntl; 43 uint32_t gpio_vga_ddc; 44 uint32_t gpio_dvi_ddc; 45 uint32_t gpio_monid; 46 uint32_t config_cntl; 47 uint32_t crtc_h_total_disp; 48 uint32_t crtc_h_sync_strt_wid; 49 uint32_t crtc_v_total_disp; 50 uint32_t crtc_v_sync_strt_wid; 51 uint32_t crtc_offset; 52 uint32_t crtc_offset_cntl; 53 uint32_t crtc_pitch; 54 uint32_t cur_offset; 55 uint32_t cur_hv_pos; 56 uint32_t cur_hv_offs; 57 uint32_t cur_color0; 58 uint32_t cur_color1; 59 uint32_t dst_offset; 60 uint32_t dst_pitch; 61 uint32_t dst_tile; 62 uint32_t dst_width; 63 uint32_t dst_height; 64 uint32_t src_offset; 65 uint32_t src_pitch; 66 uint32_t src_tile; 67 uint32_t src_x; 68 uint32_t src_y; 69 uint32_t dst_x; 70 uint32_t dst_y; 71 uint32_t dp_gui_master_cntl; 72 uint32_t dp_brush_bkgd_clr; 73 uint32_t dp_brush_frgd_clr; 74 uint32_t dp_src_frgd_clr; 75 uint32_t dp_src_bkgd_clr; 76 uint32_t dp_cntl; 77 uint32_t dp_datatype; 78 uint32_t dp_mix; 79 uint32_t dp_write_mask; 80 uint32_t default_offset; 81 uint32_t default_pitch; 82 uint32_t default_tile; 83 uint32_t default_sc_bottom_right; 84 } ATIVGARegs; 85 86 struct ATIVGAState { 87 PCIDevice dev; 88 VGACommonState vga; 89 char *model; 90 uint16_t dev_id; 91 uint8_t mode; 92 bool cursor_guest_mode; 93 uint16_t cursor_size; 94 uint32_t cursor_offset; 95 QEMUCursor *cursor; 96 QEMUTimer vblank_timer; 97 bitbang_i2c_interface bbi2c; 98 MemoryRegion io; 99 MemoryRegion mm; 100 ATIVGARegs regs; 101 }; 102 103 const char *ati_reg_name(int num); 104 105 void ati_2d_blt(ATIVGAState *s); 106 107 #endif /* ATI_INT_H */ 108