1 /* 2 * RealView ARM11MPCore internal peripheral emulation 3 * 4 * Copyright (c) 2006-2007 CodeSourcery. 5 * Copyright (c) 2013 SUSE LINUX Products GmbH 6 * Written by Paul Brook and Andreas Färber 7 * 8 * This code is licensed under the GPL. 9 */ 10 11 #include "qemu/osdep.h" 12 #include "qapi/error.h" 13 #include "qemu/module.h" 14 #include "hw/cpu/arm11mpcore.h" 15 #include "hw/intc/realview_gic.h" 16 17 #define TYPE_REALVIEW_MPCORE_RIRQ "realview_mpcore" 18 #define REALVIEW_MPCORE_RIRQ(obj) \ 19 OBJECT_CHECK(mpcore_rirq_state, (obj), TYPE_REALVIEW_MPCORE_RIRQ) 20 21 /* Dummy PIC to route IRQ lines. The baseboard has 4 independent IRQ 22 controllers. The output of these, plus some of the raw input lines 23 are fed into a single SMP-aware interrupt controller on the CPU. */ 24 typedef struct { 25 SysBusDevice parent_obj; 26 27 qemu_irq cpuic[32]; 28 qemu_irq rvic[4][64]; 29 uint32_t num_cpu; 30 31 ARM11MPCorePriveState priv; 32 RealViewGICState gic[4]; 33 } mpcore_rirq_state; 34 35 /* Map baseboard IRQs onto CPU IRQ lines. */ 36 static const int mpcore_irq_map[32] = { 37 -1, -1, -1, -1, 1, 2, -1, -1, 38 -1, -1, 6, -1, 4, 5, -1, -1, 39 -1, 14, 15, 0, 7, 8, -1, -1, 40 -1, -1, -1, -1, 9, 3, -1, -1, 41 }; 42 43 static void mpcore_rirq_set_irq(void *opaque, int irq, int level) 44 { 45 mpcore_rirq_state *s = (mpcore_rirq_state *)opaque; 46 int i; 47 48 for (i = 0; i < 4; i++) { 49 qemu_set_irq(s->rvic[i][irq], level); 50 } 51 if (irq < 32) { 52 irq = mpcore_irq_map[irq]; 53 if (irq >= 0) { 54 qemu_set_irq(s->cpuic[irq], level); 55 } 56 } 57 } 58 59 static void realview_mpcore_realize(DeviceState *dev, Error **errp) 60 { 61 SysBusDevice *sbd = SYS_BUS_DEVICE(dev); 62 mpcore_rirq_state *s = REALVIEW_MPCORE_RIRQ(dev); 63 DeviceState *priv = DEVICE(&s->priv); 64 DeviceState *gic; 65 SysBusDevice *gicbusdev; 66 Error *err = NULL; 67 int n; 68 int i; 69 70 qdev_prop_set_uint32(priv, "num-cpu", s->num_cpu); 71 object_property_set_bool(OBJECT(&s->priv), true, "realized", &err); 72 if (err != NULL) { 73 error_propagate(errp, err); 74 return; 75 } 76 sysbus_pass_irq(sbd, SYS_BUS_DEVICE(&s->priv)); 77 for (i = 0; i < 32; i++) { 78 s->cpuic[i] = qdev_get_gpio_in(priv, i); 79 } 80 /* ??? IRQ routing is hardcoded to "normal" mode. */ 81 for (n = 0; n < 4; n++) { 82 object_property_set_bool(OBJECT(&s->gic[n]), true, "realized", &err); 83 if (err != NULL) { 84 error_propagate(errp, err); 85 return; 86 } 87 gic = DEVICE(&s->gic[n]); 88 gicbusdev = SYS_BUS_DEVICE(&s->gic[n]); 89 sysbus_mmio_map(gicbusdev, 0, 0x10040000 + n * 0x10000); 90 sysbus_connect_irq(gicbusdev, 0, s->cpuic[10 + n]); 91 for (i = 0; i < 64; i++) { 92 s->rvic[n][i] = qdev_get_gpio_in(gic, i); 93 } 94 } 95 qdev_init_gpio_in(dev, mpcore_rirq_set_irq, 64); 96 } 97 98 static void mpcore_rirq_init(Object *obj) 99 { 100 SysBusDevice *sbd = SYS_BUS_DEVICE(obj); 101 mpcore_rirq_state *s = REALVIEW_MPCORE_RIRQ(obj); 102 SysBusDevice *privbusdev; 103 int i; 104 105 sysbus_init_child_obj(obj, "a11priv", &s->priv, sizeof(s->priv), 106 TYPE_ARM11MPCORE_PRIV); 107 privbusdev = SYS_BUS_DEVICE(&s->priv); 108 sysbus_init_mmio(sbd, sysbus_mmio_get_region(privbusdev, 0)); 109 110 for (i = 0; i < 4; i++) { 111 sysbus_init_child_obj(obj, "gic[*]", &s->gic[i], sizeof(s->gic[i]), 112 TYPE_REALVIEW_GIC); 113 } 114 } 115 116 static Property mpcore_rirq_properties[] = { 117 DEFINE_PROP_UINT32("num-cpu", mpcore_rirq_state, num_cpu, 1), 118 DEFINE_PROP_END_OF_LIST(), 119 }; 120 121 static void mpcore_rirq_class_init(ObjectClass *klass, void *data) 122 { 123 DeviceClass *dc = DEVICE_CLASS(klass); 124 125 dc->realize = realview_mpcore_realize; 126 dc->props = mpcore_rirq_properties; 127 } 128 129 static const TypeInfo mpcore_rirq_info = { 130 .name = TYPE_REALVIEW_MPCORE_RIRQ, 131 .parent = TYPE_SYS_BUS_DEVICE, 132 .instance_size = sizeof(mpcore_rirq_state), 133 .instance_init = mpcore_rirq_init, 134 .class_init = mpcore_rirq_class_init, 135 }; 136 137 static void realview_mpcore_register_types(void) 138 { 139 type_register_static(&mpcore_rirq_info); 140 } 141 142 type_init(realview_mpcore_register_types) 143