1 /* 2 * General purpose implementation of a simple periodic countdown timer. 3 * 4 * Copyright (c) 2007 CodeSourcery. 5 * 6 * This code is licensed under the GNU LGPL. 7 */ 8 9 #include "qemu/osdep.h" 10 #include "hw/ptimer.h" 11 #include "migration/vmstate.h" 12 #include "qemu/host-utils.h" 13 #include "exec/replay-core.h" 14 #include "sysemu/cpu-timers.h" 15 #include "sysemu/qtest.h" 16 #include "block/aio.h" 17 #include "hw/clock.h" 18 19 #define DELTA_ADJUST 1 20 #define DELTA_NO_ADJUST -1 21 22 struct ptimer_state 23 { 24 uint8_t enabled; /* 0 = disabled, 1 = periodic, 2 = oneshot. */ 25 uint64_t limit; 26 uint64_t delta; 27 uint32_t period_frac; 28 int64_t period; 29 int64_t last_event; 30 int64_t next_event; 31 uint8_t policy_mask; 32 QEMUTimer *timer; 33 ptimer_cb callback; 34 void *callback_opaque; 35 /* 36 * These track whether we're in a transaction block, and if we 37 * need to do a timer reload when the block finishes. They don't 38 * need to be migrated because migration can never happen in the 39 * middle of a transaction block. 40 */ 41 bool in_transaction; 42 bool need_reload; 43 }; 44 45 /* Use a bottom-half routine to avoid reentrancy issues. */ 46 static void ptimer_trigger(ptimer_state *s) 47 { 48 s->callback(s->callback_opaque); 49 } 50 51 static void ptimer_reload(ptimer_state *s, int delta_adjust) 52 { 53 uint32_t period_frac; 54 uint64_t period; 55 uint64_t delta; 56 bool suppress_trigger = false; 57 58 /* 59 * Note that if delta_adjust is 0 then we must be here because of 60 * a count register write or timer start, not because of timer expiry. 61 * In that case the policy might require us to suppress the timer trigger 62 * that we would otherwise generate for a zero delta. 63 */ 64 if (delta_adjust == 0 && 65 (s->policy_mask & PTIMER_POLICY_TRIGGER_ONLY_ON_DECREMENT)) { 66 suppress_trigger = true; 67 } 68 if (s->delta == 0 && !(s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER) 69 && !suppress_trigger) { 70 ptimer_trigger(s); 71 } 72 73 /* 74 * Note that ptimer_trigger() might call the device callback function, 75 * which can then modify timer state, so we must not cache any fields 76 * from ptimer_state until after we have called it. 77 */ 78 delta = s->delta; 79 period = s->period; 80 period_frac = s->period_frac; 81 82 if (delta == 0 && !(s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_RELOAD)) { 83 delta = s->delta = s->limit; 84 } 85 86 if (s->period == 0 && s->period_frac == 0) { 87 if (!qtest_enabled()) { 88 fprintf(stderr, "Timer with period zero, disabling\n"); 89 } 90 timer_del(s->timer); 91 s->enabled = 0; 92 return; 93 } 94 95 if (s->policy_mask & PTIMER_POLICY_WRAP_AFTER_ONE_PERIOD) { 96 if (delta_adjust != DELTA_NO_ADJUST) { 97 delta += delta_adjust; 98 } 99 } 100 101 if (delta == 0 && (s->policy_mask & PTIMER_POLICY_CONTINUOUS_TRIGGER)) { 102 if (s->enabled == 1 && s->limit == 0) { 103 delta = 1; 104 } 105 } 106 107 if (delta == 0 && (s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER)) { 108 if (delta_adjust != DELTA_NO_ADJUST) { 109 delta = 1; 110 } 111 } 112 113 if (delta == 0 && (s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_RELOAD)) { 114 if (s->enabled == 1 && s->limit != 0) { 115 delta = 1; 116 } 117 } 118 119 if (delta == 0) { 120 if (s->enabled == 0) { 121 /* trigger callback disabled the timer already */ 122 return; 123 } 124 if (!qtest_enabled()) { 125 fprintf(stderr, "Timer with delta zero, disabling\n"); 126 } 127 timer_del(s->timer); 128 s->enabled = 0; 129 return; 130 } 131 132 /* 133 * Artificially limit timeout rate to something 134 * achievable under QEMU. Otherwise, QEMU spends all 135 * its time generating timer interrupts, and there 136 * is no forward progress. 137 * About ten microseconds is the fastest that really works 138 * on the current generation of host machines. 139 */ 140 141 if (s->enabled == 1 && (delta * period < 10000) && 142 !icount_enabled() && !qtest_enabled()) { 143 period = 10000 / delta; 144 period_frac = 0; 145 } 146 147 s->last_event = s->next_event; 148 s->next_event = s->last_event + delta * period; 149 if (period_frac) { 150 s->next_event += ((int64_t)period_frac * delta) >> 32; 151 } 152 timer_mod(s->timer, s->next_event); 153 } 154 155 static void ptimer_tick(void *opaque) 156 { 157 ptimer_state *s = (ptimer_state *)opaque; 158 bool trigger = true; 159 160 /* 161 * We perform all the tick actions within a begin/commit block 162 * because the callback function that ptimer_trigger() calls 163 * might make calls into the ptimer APIs that provoke another 164 * trigger, and we want that to cause the callback function 165 * to be called iteratively, not recursively. 166 */ 167 ptimer_transaction_begin(s); 168 169 if (s->enabled == 2) { 170 s->delta = 0; 171 s->enabled = 0; 172 } else { 173 int delta_adjust = DELTA_ADJUST; 174 175 if (s->delta == 0 || s->limit == 0) { 176 /* If a "continuous trigger" policy is not used and limit == 0, 177 we should error out. delta == 0 means that this tick is 178 caused by a "no immediate reload" policy, so it shouldn't 179 be adjusted. */ 180 delta_adjust = DELTA_NO_ADJUST; 181 } 182 183 if (!(s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER)) { 184 /* Avoid re-trigger on deferred reload if "no immediate trigger" 185 policy isn't used. */ 186 trigger = (delta_adjust == DELTA_ADJUST); 187 } 188 189 s->delta = s->limit; 190 191 ptimer_reload(s, delta_adjust); 192 } 193 194 if (trigger) { 195 ptimer_trigger(s); 196 } 197 198 ptimer_transaction_commit(s); 199 } 200 201 uint64_t ptimer_get_count(ptimer_state *s) 202 { 203 uint64_t counter; 204 205 if (s->enabled && s->delta != 0) { 206 int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 207 int64_t next = s->next_event; 208 int64_t last = s->last_event; 209 bool expired = (now - next >= 0); 210 bool oneshot = (s->enabled == 2); 211 212 /* Figure out the current counter value. */ 213 if (expired) { 214 /* Prevent timer underflowing if it should already have 215 triggered. */ 216 counter = 0; 217 } else { 218 uint64_t rem; 219 uint64_t div; 220 int clz1, clz2; 221 int shift; 222 uint32_t period_frac = s->period_frac; 223 uint64_t period = s->period; 224 225 if (!oneshot && (s->delta * period < 10000) && 226 !icount_enabled() && !qtest_enabled()) { 227 period = 10000 / s->delta; 228 period_frac = 0; 229 } 230 231 /* We need to divide time by period, where time is stored in 232 rem (64-bit integer) and period is stored in period/period_frac 233 (64.32 fixed point). 234 235 Doing full precision division is hard, so scale values and 236 do a 64-bit division. The result should be rounded down, 237 so that the rounding error never causes the timer to go 238 backwards. 239 */ 240 241 rem = next - now; 242 div = period; 243 244 clz1 = clz64(rem); 245 clz2 = clz64(div); 246 shift = clz1 < clz2 ? clz1 : clz2; 247 248 rem <<= shift; 249 div <<= shift; 250 if (shift >= 32) { 251 div |= ((uint64_t)period_frac << (shift - 32)); 252 } else { 253 if (shift != 0) 254 div |= (period_frac >> (32 - shift)); 255 /* Look at remaining bits of period_frac and round div up if 256 necessary. */ 257 if ((uint32_t)(period_frac << shift)) 258 div += 1; 259 } 260 counter = rem / div; 261 262 if (s->policy_mask & PTIMER_POLICY_WRAP_AFTER_ONE_PERIOD) { 263 /* Before wrapping around, timer should stay with counter = 0 264 for a one period. */ 265 if (!oneshot && s->delta == s->limit) { 266 if (now == last) { 267 /* Counter == delta here, check whether it was 268 adjusted and if it was, then right now it is 269 that "one period". */ 270 if (counter == s->limit + DELTA_ADJUST) { 271 return 0; 272 } 273 } else if (counter == s->limit) { 274 /* Since the counter is rounded down and now != last, 275 the counter == limit means that delta was adjusted 276 by +1 and right now it is that adjusted period. */ 277 return 0; 278 } 279 } 280 } 281 } 282 283 if (s->policy_mask & PTIMER_POLICY_NO_COUNTER_ROUND_DOWN) { 284 /* If now == last then delta == limit, i.e. the counter already 285 represents the correct value. It would be rounded down a 1ns 286 later. */ 287 if (now != last) { 288 counter += 1; 289 } 290 } 291 } else { 292 counter = s->delta; 293 } 294 return counter; 295 } 296 297 void ptimer_set_count(ptimer_state *s, uint64_t count) 298 { 299 assert(s->in_transaction); 300 s->delta = count; 301 if (s->enabled) { 302 s->need_reload = true; 303 } 304 } 305 306 void ptimer_run(ptimer_state *s, int oneshot) 307 { 308 bool was_disabled = !s->enabled; 309 310 assert(s->in_transaction); 311 312 if (was_disabled && s->period == 0 && s->period_frac == 0) { 313 if (!qtest_enabled()) { 314 fprintf(stderr, "Timer with period zero, disabling\n"); 315 } 316 return; 317 } 318 s->enabled = oneshot ? 2 : 1; 319 if (was_disabled) { 320 s->need_reload = true; 321 } 322 } 323 324 /* Pause a timer. Note that this may cause it to "lose" time, even if it 325 is immediately restarted. */ 326 void ptimer_stop(ptimer_state *s) 327 { 328 assert(s->in_transaction); 329 330 if (!s->enabled) 331 return; 332 333 s->delta = ptimer_get_count(s); 334 timer_del(s->timer); 335 s->enabled = 0; 336 s->need_reload = false; 337 } 338 339 /* Set counter increment interval in nanoseconds. */ 340 void ptimer_set_period(ptimer_state *s, int64_t period) 341 { 342 assert(s->in_transaction); 343 s->delta = ptimer_get_count(s); 344 s->period = period; 345 s->period_frac = 0; 346 if (s->enabled) { 347 s->need_reload = true; 348 } 349 } 350 351 /* Set counter increment interval from a Clock */ 352 void ptimer_set_period_from_clock(ptimer_state *s, const Clock *clk, 353 unsigned int divisor) 354 { 355 /* 356 * The raw clock period is a 64-bit value in units of 2^-32 ns; 357 * put another way it's a 32.32 fixed-point ns value. Our internal 358 * representation of the period is 64.32 fixed point ns, so 359 * the conversion is simple. 360 */ 361 uint64_t raw_period = clock_get(clk); 362 uint64_t period_frac; 363 364 assert(s->in_transaction); 365 s->delta = ptimer_get_count(s); 366 s->period = extract64(raw_period, 32, 32); 367 period_frac = extract64(raw_period, 0, 32); 368 /* 369 * divisor specifies a possible frequency divisor between the 370 * clock and the timer, so it is a multiplier on the period. 371 * We do the multiply after splitting the raw period out into 372 * period and frac to avoid having to do a 32*64->96 multiply. 373 */ 374 s->period *= divisor; 375 period_frac *= divisor; 376 s->period += extract64(period_frac, 32, 32); 377 s->period_frac = (uint32_t)period_frac; 378 379 if (s->enabled) { 380 s->need_reload = true; 381 } 382 } 383 384 /* Set counter frequency in Hz. */ 385 void ptimer_set_freq(ptimer_state *s, uint32_t freq) 386 { 387 assert(s->in_transaction); 388 s->delta = ptimer_get_count(s); 389 s->period = 1000000000ll / freq; 390 s->period_frac = (1000000000ll << 32) / freq; 391 if (s->enabled) { 392 s->need_reload = true; 393 } 394 } 395 396 /* Set the initial countdown value. If reload is nonzero then also set 397 count = limit. */ 398 void ptimer_set_limit(ptimer_state *s, uint64_t limit, int reload) 399 { 400 assert(s->in_transaction); 401 s->limit = limit; 402 if (reload) 403 s->delta = limit; 404 if (s->enabled && reload) { 405 s->need_reload = true; 406 } 407 } 408 409 uint64_t ptimer_get_limit(ptimer_state *s) 410 { 411 return s->limit; 412 } 413 414 void ptimer_transaction_begin(ptimer_state *s) 415 { 416 assert(!s->in_transaction); 417 s->in_transaction = true; 418 s->need_reload = false; 419 } 420 421 void ptimer_transaction_commit(ptimer_state *s) 422 { 423 assert(s->in_transaction); 424 /* 425 * We must loop here because ptimer_reload() can call the callback 426 * function, which might then update ptimer state in a way that 427 * means we need to do another reload and possibly another callback. 428 * A disabled timer never needs reloading (and if we don't check 429 * this then we loop forever if ptimer_reload() disables the timer). 430 */ 431 while (s->need_reload && s->enabled) { 432 s->need_reload = false; 433 s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 434 ptimer_reload(s, 0); 435 } 436 /* Now we've finished reload we can leave the transaction block. */ 437 s->in_transaction = false; 438 } 439 440 const VMStateDescription vmstate_ptimer = { 441 .name = "ptimer", 442 .version_id = 1, 443 .minimum_version_id = 1, 444 .fields = (const VMStateField[]) { 445 VMSTATE_UINT8(enabled, ptimer_state), 446 VMSTATE_UINT64(limit, ptimer_state), 447 VMSTATE_UINT64(delta, ptimer_state), 448 VMSTATE_UINT32(period_frac, ptimer_state), 449 VMSTATE_INT64(period, ptimer_state), 450 VMSTATE_INT64(last_event, ptimer_state), 451 VMSTATE_INT64(next_event, ptimer_state), 452 VMSTATE_TIMER_PTR(timer, ptimer_state), 453 VMSTATE_END_OF_LIST() 454 } 455 }; 456 457 ptimer_state *ptimer_init(ptimer_cb callback, void *callback_opaque, 458 uint8_t policy_mask) 459 { 460 ptimer_state *s; 461 462 /* The callback function is mandatory. */ 463 assert(callback); 464 465 s = g_new0(ptimer_state, 1); 466 s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, ptimer_tick, s); 467 s->policy_mask = policy_mask; 468 s->callback = callback; 469 s->callback_opaque = callback_opaque; 470 471 /* 472 * These two policies are incompatible -- trigger-on-decrement implies 473 * a timer trigger when the count becomes 0, but no-immediate-trigger 474 * implies a trigger when the count stops being 0. 475 */ 476 assert(!((policy_mask & PTIMER_POLICY_TRIGGER_ONLY_ON_DECREMENT) && 477 (policy_mask & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER))); 478 return s; 479 } 480 481 void ptimer_free(ptimer_state *s) 482 { 483 timer_free(s->timer); 484 g_free(s); 485 } 486