1 /* 2 * General purpose implementation of a simple periodic countdown timer. 3 * 4 * Copyright (c) 2007 CodeSourcery. 5 * 6 * This code is licensed under the GNU LGPL. 7 */ 8 #include "qemu/osdep.h" 9 #include "hw/hw.h" 10 #include "qemu/timer.h" 11 #include "hw/ptimer.h" 12 #include "qemu/host-utils.h" 13 #include "sysemu/replay.h" 14 #include "sysemu/qtest.h" 15 16 #define DELTA_ADJUST 1 17 18 struct ptimer_state 19 { 20 uint8_t enabled; /* 0 = disabled, 1 = periodic, 2 = oneshot. */ 21 uint64_t limit; 22 uint64_t delta; 23 uint32_t period_frac; 24 int64_t period; 25 int64_t last_event; 26 int64_t next_event; 27 uint8_t policy_mask; 28 QEMUBH *bh; 29 QEMUTimer *timer; 30 }; 31 32 /* Use a bottom-half routine to avoid reentrancy issues. */ 33 static void ptimer_trigger(ptimer_state *s) 34 { 35 if (s->bh) { 36 replay_bh_schedule_event(s->bh); 37 } 38 } 39 40 static void ptimer_reload(ptimer_state *s, int delta_adjust) 41 { 42 uint32_t period_frac = s->period_frac; 43 uint64_t period = s->period; 44 uint64_t delta = s->delta; 45 46 if (delta == 0) { 47 ptimer_trigger(s); 48 delta = s->delta = s->limit; 49 } 50 if (delta == 0 || s->period == 0) { 51 if (!qtest_enabled()) { 52 fprintf(stderr, "Timer with period zero, disabling\n"); 53 } 54 timer_del(s->timer); 55 s->enabled = 0; 56 return; 57 } 58 59 if (s->policy_mask & PTIMER_POLICY_WRAP_AFTER_ONE_PERIOD) { 60 delta += delta_adjust; 61 } 62 63 /* 64 * Artificially limit timeout rate to something 65 * achievable under QEMU. Otherwise, QEMU spends all 66 * its time generating timer interrupts, and there 67 * is no forward progress. 68 * About ten microseconds is the fastest that really works 69 * on the current generation of host machines. 70 */ 71 72 if (s->enabled == 1 && (delta * period < 10000) && !use_icount) { 73 period = 10000 / delta; 74 period_frac = 0; 75 } 76 77 s->last_event = s->next_event; 78 s->next_event = s->last_event + delta * period; 79 if (period_frac) { 80 s->next_event += ((int64_t)period_frac * delta) >> 32; 81 } 82 timer_mod(s->timer, s->next_event); 83 } 84 85 static void ptimer_tick(void *opaque) 86 { 87 ptimer_state *s = (ptimer_state *)opaque; 88 ptimer_trigger(s); 89 s->delta = 0; 90 if (s->enabled == 2) { 91 s->enabled = 0; 92 } else { 93 ptimer_reload(s, DELTA_ADJUST); 94 } 95 } 96 97 uint64_t ptimer_get_count(ptimer_state *s) 98 { 99 uint64_t counter; 100 101 if (s->enabled) { 102 int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 103 int64_t next = s->next_event; 104 int64_t last = s->last_event; 105 bool expired = (now - next >= 0); 106 bool oneshot = (s->enabled == 2); 107 108 /* Figure out the current counter value. */ 109 if (expired) { 110 /* Prevent timer underflowing if it should already have 111 triggered. */ 112 counter = 0; 113 } else { 114 uint64_t rem; 115 uint64_t div; 116 int clz1, clz2; 117 int shift; 118 uint32_t period_frac = s->period_frac; 119 uint64_t period = s->period; 120 121 if (!oneshot && (s->delta * period < 10000) && !use_icount) { 122 period = 10000 / s->delta; 123 period_frac = 0; 124 } 125 126 /* We need to divide time by period, where time is stored in 127 rem (64-bit integer) and period is stored in period/period_frac 128 (64.32 fixed point). 129 130 Doing full precision division is hard, so scale values and 131 do a 64-bit division. The result should be rounded down, 132 so that the rounding error never causes the timer to go 133 backwards. 134 */ 135 136 rem = next - now; 137 div = period; 138 139 clz1 = clz64(rem); 140 clz2 = clz64(div); 141 shift = clz1 < clz2 ? clz1 : clz2; 142 143 rem <<= shift; 144 div <<= shift; 145 if (shift >= 32) { 146 div |= ((uint64_t)period_frac << (shift - 32)); 147 } else { 148 if (shift != 0) 149 div |= (period_frac >> (32 - shift)); 150 /* Look at remaining bits of period_frac and round div up if 151 necessary. */ 152 if ((uint32_t)(period_frac << shift)) 153 div += 1; 154 } 155 counter = rem / div; 156 157 if (s->policy_mask & PTIMER_POLICY_WRAP_AFTER_ONE_PERIOD) { 158 /* Before wrapping around, timer should stay with counter = 0 159 for a one period. */ 160 if (!oneshot && s->delta == s->limit) { 161 if (now == last) { 162 /* Counter == delta here, check whether it was 163 adjusted and if it was, then right now it is 164 that "one period". */ 165 if (counter == s->limit + DELTA_ADJUST) { 166 return 0; 167 } 168 } else if (counter == s->limit) { 169 /* Since the counter is rounded down and now != last, 170 the counter == limit means that delta was adjusted 171 by +1 and right now it is that adjusted period. */ 172 return 0; 173 } 174 } 175 } 176 } 177 } else { 178 counter = s->delta; 179 } 180 return counter; 181 } 182 183 void ptimer_set_count(ptimer_state *s, uint64_t count) 184 { 185 s->delta = count; 186 if (s->enabled) { 187 s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 188 ptimer_reload(s, 0); 189 } 190 } 191 192 void ptimer_run(ptimer_state *s, int oneshot) 193 { 194 bool was_disabled = !s->enabled; 195 196 if (was_disabled && s->period == 0) { 197 if (!qtest_enabled()) { 198 fprintf(stderr, "Timer with period zero, disabling\n"); 199 } 200 return; 201 } 202 s->enabled = oneshot ? 2 : 1; 203 if (was_disabled) { 204 s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 205 ptimer_reload(s, 0); 206 } 207 } 208 209 /* Pause a timer. Note that this may cause it to "lose" time, even if it 210 is immediately restarted. */ 211 void ptimer_stop(ptimer_state *s) 212 { 213 if (!s->enabled) 214 return; 215 216 s->delta = ptimer_get_count(s); 217 timer_del(s->timer); 218 s->enabled = 0; 219 } 220 221 /* Set counter increment interval in nanoseconds. */ 222 void ptimer_set_period(ptimer_state *s, int64_t period) 223 { 224 s->delta = ptimer_get_count(s); 225 s->period = period; 226 s->period_frac = 0; 227 if (s->enabled) { 228 s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 229 ptimer_reload(s, 0); 230 } 231 } 232 233 /* Set counter frequency in Hz. */ 234 void ptimer_set_freq(ptimer_state *s, uint32_t freq) 235 { 236 s->delta = ptimer_get_count(s); 237 s->period = 1000000000ll / freq; 238 s->period_frac = (1000000000ll << 32) / freq; 239 if (s->enabled) { 240 s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 241 ptimer_reload(s, 0); 242 } 243 } 244 245 /* Set the initial countdown value. If reload is nonzero then also set 246 count = limit. */ 247 void ptimer_set_limit(ptimer_state *s, uint64_t limit, int reload) 248 { 249 s->limit = limit; 250 if (reload) 251 s->delta = limit; 252 if (s->enabled && reload) { 253 s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); 254 ptimer_reload(s, 0); 255 } 256 } 257 258 uint64_t ptimer_get_limit(ptimer_state *s) 259 { 260 return s->limit; 261 } 262 263 const VMStateDescription vmstate_ptimer = { 264 .name = "ptimer", 265 .version_id = 1, 266 .minimum_version_id = 1, 267 .fields = (VMStateField[]) { 268 VMSTATE_UINT8(enabled, ptimer_state), 269 VMSTATE_UINT64(limit, ptimer_state), 270 VMSTATE_UINT64(delta, ptimer_state), 271 VMSTATE_UINT32(period_frac, ptimer_state), 272 VMSTATE_INT64(period, ptimer_state), 273 VMSTATE_INT64(last_event, ptimer_state), 274 VMSTATE_INT64(next_event, ptimer_state), 275 VMSTATE_TIMER_PTR(timer, ptimer_state), 276 VMSTATE_END_OF_LIST() 277 } 278 }; 279 280 ptimer_state *ptimer_init(QEMUBH *bh, uint8_t policy_mask) 281 { 282 ptimer_state *s; 283 284 s = (ptimer_state *)g_malloc0(sizeof(ptimer_state)); 285 s->bh = bh; 286 s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, ptimer_tick, s); 287 s->policy_mask = policy_mask; 288 return s; 289 } 290