xref: /openbmc/qemu/hw/core/or-irq.c (revision fcf5ef2a)
1 /*
2  * QEMU IRQ/GPIO common code.
3  *
4  * Copyright (c) 2016 Alistair Francis <alistair@alistair23.me>.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 #include "qemu/osdep.h"
26 #include "hw/or-irq.h"
27 
28 static void or_irq_handler(void *opaque, int n, int level)
29 {
30     qemu_or_irq *s = OR_IRQ(opaque);
31     int or_level = 0;
32     int i;
33 
34     s->levels[n] = level;
35 
36     for (i = 0; i < s->num_lines; i++) {
37         or_level |= s->levels[i];
38     }
39 
40     qemu_set_irq(s->out_irq, or_level);
41 }
42 
43 static void or_irq_reset(DeviceState *dev)
44 {
45     qemu_or_irq *s = OR_IRQ(dev);
46     int i;
47 
48     for (i = 0; i < MAX_OR_LINES; i++) {
49         s->levels[i] = false;
50     }
51 }
52 
53 static void or_irq_realize(DeviceState *dev, Error **errp)
54 {
55     qemu_or_irq *s = OR_IRQ(dev);
56 
57     assert(s->num_lines < MAX_OR_LINES);
58 
59     qdev_init_gpio_in(dev, or_irq_handler, s->num_lines);
60 }
61 
62 static void or_irq_init(Object *obj)
63 {
64     qemu_or_irq *s = OR_IRQ(obj);
65 
66     qdev_init_gpio_out(DEVICE(obj), &s->out_irq, 1);
67 }
68 
69 static const VMStateDescription vmstate_or_irq = {
70     .name = TYPE_OR_IRQ,
71     .version_id = 1,
72     .minimum_version_id = 1,
73     .fields = (VMStateField[]) {
74         VMSTATE_BOOL_ARRAY(levels, qemu_or_irq, MAX_OR_LINES),
75         VMSTATE_END_OF_LIST(),
76     }
77 };
78 
79 static Property or_irq_properties[] = {
80     DEFINE_PROP_UINT16("num-lines", qemu_or_irq, num_lines, 1),
81     DEFINE_PROP_END_OF_LIST(),
82 };
83 
84 static void or_irq_class_init(ObjectClass *klass, void *data)
85 {
86     DeviceClass *dc = DEVICE_CLASS(klass);
87 
88     dc->reset = or_irq_reset;
89     dc->props = or_irq_properties;
90     dc->realize = or_irq_realize;
91     dc->vmsd = &vmstate_or_irq;
92 }
93 
94 static const TypeInfo or_irq_type_info = {
95    .name = TYPE_OR_IRQ,
96    .parent = TYPE_DEVICE,
97    .instance_size = sizeof(qemu_or_irq),
98    .instance_init = or_irq_init,
99    .class_init = or_irq_class_init,
100 };
101 
102 static void or_irq_register_types(void)
103 {
104     type_register_static(&or_irq_type_info);
105 }
106 
107 type_init(or_irq_register_types)
108