1 /* 2 * QEMU Machine 3 * 4 * Copyright (C) 2014 Red Hat Inc 5 * 6 * Authors: 7 * Marcel Apfelbaum <marcel.a@redhat.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or later. 10 * See the COPYING file in the top-level directory. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "qemu/option.h" 15 #include "qemu/accel.h" 16 #include "sysemu/replay.h" 17 #include "qemu/units.h" 18 #include "hw/boards.h" 19 #include "hw/loader.h" 20 #include "qapi/error.h" 21 #include "qapi/qapi-visit-common.h" 22 #include "qapi/qapi-visit-machine.h" 23 #include "qapi/visitor.h" 24 #include "qom/object_interfaces.h" 25 #include "hw/sysbus.h" 26 #include "sysemu/cpus.h" 27 #include "sysemu/sysemu.h" 28 #include "sysemu/reset.h" 29 #include "sysemu/runstate.h" 30 #include "sysemu/numa.h" 31 #include "sysemu/xen.h" 32 #include "qemu/error-report.h" 33 #include "sysemu/qtest.h" 34 #include "hw/pci/pci.h" 35 #include "hw/mem/nvdimm.h" 36 #include "migration/global_state.h" 37 #include "migration/vmstate.h" 38 #include "exec/confidential-guest-support.h" 39 #include "hw/virtio/virtio.h" 40 #include "hw/virtio/virtio-pci.h" 41 42 GlobalProperty hw_compat_8_0[] = {}; 43 const size_t hw_compat_8_0_len = G_N_ELEMENTS(hw_compat_8_0); 44 45 GlobalProperty hw_compat_7_2[] = { 46 { "e1000e", "migrate-timadj", "off" }, 47 { "virtio-mem", "x-early-migration", "false" }, 48 { "migration", "x-preempt-pre-7-2", "true" }, 49 }; 50 const size_t hw_compat_7_2_len = G_N_ELEMENTS(hw_compat_7_2); 51 52 GlobalProperty hw_compat_7_1[] = { 53 { "virtio-device", "queue_reset", "false" }, 54 { "virtio-rng-pci", "vectors", "0" }, 55 { "virtio-rng-pci-transitional", "vectors", "0" }, 56 { "virtio-rng-pci-non-transitional", "vectors", "0" }, 57 }; 58 const size_t hw_compat_7_1_len = G_N_ELEMENTS(hw_compat_7_1); 59 60 GlobalProperty hw_compat_7_0[] = { 61 { "arm-gicv3-common", "force-8-bit-prio", "on" }, 62 { "nvme-ns", "eui64-default", "on"}, 63 }; 64 const size_t hw_compat_7_0_len = G_N_ELEMENTS(hw_compat_7_0); 65 66 GlobalProperty hw_compat_6_2[] = { 67 { "PIIX4_PM", "x-not-migrate-acpi-index", "on"}, 68 }; 69 const size_t hw_compat_6_2_len = G_N_ELEMENTS(hw_compat_6_2); 70 71 GlobalProperty hw_compat_6_1[] = { 72 { "vhost-user-vsock-device", "seqpacket", "off" }, 73 { "nvme-ns", "shared", "off" }, 74 }; 75 const size_t hw_compat_6_1_len = G_N_ELEMENTS(hw_compat_6_1); 76 77 GlobalProperty hw_compat_6_0[] = { 78 { "gpex-pcihost", "allow-unmapped-accesses", "false" }, 79 { "i8042", "extended-state", "false"}, 80 { "nvme-ns", "eui64-default", "off"}, 81 { "e1000", "init-vet", "off" }, 82 { "e1000e", "init-vet", "off" }, 83 { "vhost-vsock-device", "seqpacket", "off" }, 84 }; 85 const size_t hw_compat_6_0_len = G_N_ELEMENTS(hw_compat_6_0); 86 87 GlobalProperty hw_compat_5_2[] = { 88 { "ICH9-LPC", "smm-compat", "on"}, 89 { "PIIX4_PM", "smm-compat", "on"}, 90 { "virtio-blk-device", "report-discard-granularity", "off" }, 91 { "virtio-net-pci-base", "vectors", "3"}, 92 }; 93 const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2); 94 95 GlobalProperty hw_compat_5_1[] = { 96 { "vhost-scsi", "num_queues", "1"}, 97 { "vhost-user-blk", "num-queues", "1"}, 98 { "vhost-user-scsi", "num_queues", "1"}, 99 { "virtio-blk-device", "num-queues", "1"}, 100 { "virtio-scsi-device", "num_queues", "1"}, 101 { "nvme", "use-intel-id", "on"}, 102 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */ 103 { "pl011", "migrate-clk", "off" }, 104 { "virtio-pci", "x-ats-page-aligned", "off"}, 105 }; 106 const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1); 107 108 GlobalProperty hw_compat_5_0[] = { 109 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" }, 110 { "virtio-balloon-device", "page-poison", "false" }, 111 { "vmport", "x-read-set-eax", "off" }, 112 { "vmport", "x-signal-unsupported-cmd", "off" }, 113 { "vmport", "x-report-vmx-type", "off" }, 114 { "vmport", "x-cmds-v2", "off" }, 115 { "virtio-device", "x-disable-legacy-check", "true" }, 116 }; 117 const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0); 118 119 GlobalProperty hw_compat_4_2[] = { 120 { "virtio-blk-device", "queue-size", "128"}, 121 { "virtio-scsi-device", "virtqueue_size", "128"}, 122 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" }, 123 { "virtio-blk-device", "seg-max-adjust", "off"}, 124 { "virtio-scsi-device", "seg_max_adjust", "off"}, 125 { "vhost-blk-device", "seg_max_adjust", "off"}, 126 { "usb-host", "suppress-remote-wake", "off" }, 127 { "usb-redir", "suppress-remote-wake", "off" }, 128 { "qxl", "revision", "4" }, 129 { "qxl-vga", "revision", "4" }, 130 { "fw_cfg", "acpi-mr-restore", "false" }, 131 { "virtio-device", "use-disabled-flag", "false" }, 132 }; 133 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2); 134 135 GlobalProperty hw_compat_4_1[] = { 136 { "virtio-pci", "x-pcie-flr-init", "off" }, 137 }; 138 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1); 139 140 GlobalProperty hw_compat_4_0[] = { 141 { "VGA", "edid", "false" }, 142 { "secondary-vga", "edid", "false" }, 143 { "bochs-display", "edid", "false" }, 144 { "virtio-vga", "edid", "false" }, 145 { "virtio-gpu-device", "edid", "false" }, 146 { "virtio-device", "use-started", "false" }, 147 { "virtio-balloon-device", "qemu-4-0-config-size", "true" }, 148 { "pl031", "migrate-tick-offset", "false" }, 149 }; 150 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0); 151 152 GlobalProperty hw_compat_3_1[] = { 153 { "pcie-root-port", "x-speed", "2_5" }, 154 { "pcie-root-port", "x-width", "1" }, 155 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, 156 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, 157 { "tpm-crb", "ppi", "false" }, 158 { "tpm-tis", "ppi", "false" }, 159 { "usb-kbd", "serial", "42" }, 160 { "usb-mouse", "serial", "42" }, 161 { "usb-tablet", "serial", "42" }, 162 { "virtio-blk-device", "discard", "false" }, 163 { "virtio-blk-device", "write-zeroes", "false" }, 164 { "virtio-balloon-device", "qemu-4-0-config-size", "false" }, 165 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */ 166 }; 167 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); 168 169 GlobalProperty hw_compat_3_0[] = {}; 170 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0); 171 172 GlobalProperty hw_compat_2_12[] = { 173 { "migration", "decompress-error-check", "off" }, 174 { "hda-audio", "use-timer", "false" }, 175 { "cirrus-vga", "global-vmstate", "true" }, 176 { "VGA", "global-vmstate", "true" }, 177 { "vmware-svga", "global-vmstate", "true" }, 178 { "qxl-vga", "global-vmstate", "true" }, 179 }; 180 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12); 181 182 GlobalProperty hw_compat_2_11[] = { 183 { "hpet", "hpet-offset-saved", "false" }, 184 { "virtio-blk-pci", "vectors", "2" }, 185 { "vhost-user-blk-pci", "vectors", "2" }, 186 { "e1000", "migrate_tso_props", "off" }, 187 }; 188 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11); 189 190 GlobalProperty hw_compat_2_10[] = { 191 { "virtio-mouse-device", "wheel-axis", "false" }, 192 { "virtio-tablet-device", "wheel-axis", "false" }, 193 }; 194 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10); 195 196 GlobalProperty hw_compat_2_9[] = { 197 { "pci-bridge", "shpc", "off" }, 198 { "intel-iommu", "pt", "off" }, 199 { "virtio-net-device", "x-mtu-bypass-backend", "off" }, 200 { "pcie-root-port", "x-migrate-msix", "false" }, 201 }; 202 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9); 203 204 GlobalProperty hw_compat_2_8[] = { 205 { "fw_cfg_mem", "x-file-slots", "0x10" }, 206 { "fw_cfg_io", "x-file-slots", "0x10" }, 207 { "pflash_cfi01", "old-multiple-chip-handling", "on" }, 208 { "pci-bridge", "shpc", "on" }, 209 { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" }, 210 { "virtio-pci", "x-pcie-deverr-init", "off" }, 211 { "virtio-pci", "x-pcie-lnkctl-init", "off" }, 212 { "virtio-pci", "x-pcie-pm-init", "off" }, 213 { "cirrus-vga", "vgamem_mb", "8" }, 214 { "isa-cirrus-vga", "vgamem_mb", "8" }, 215 }; 216 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8); 217 218 GlobalProperty hw_compat_2_7[] = { 219 { "virtio-pci", "page-per-vq", "on" }, 220 { "virtio-serial-device", "emergency-write", "off" }, 221 { "ioapic", "version", "0x11" }, 222 { "intel-iommu", "x-buggy-eim", "true" }, 223 { "virtio-pci", "x-ignore-backend-features", "on" }, 224 }; 225 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7); 226 227 GlobalProperty hw_compat_2_6[] = { 228 { "virtio-mmio", "format_transport_address", "off" }, 229 /* Optional because not all virtio-pci devices support legacy mode */ 230 { "virtio-pci", "disable-modern", "on", .optional = true }, 231 { "virtio-pci", "disable-legacy", "off", .optional = true }, 232 }; 233 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6); 234 235 GlobalProperty hw_compat_2_5[] = { 236 { "isa-fdc", "fallback", "144" }, 237 { "pvscsi", "x-old-pci-configuration", "on" }, 238 { "pvscsi", "x-disable-pcie", "on" }, 239 { "vmxnet3", "x-old-msi-offsets", "on" }, 240 { "vmxnet3", "x-disable-pcie", "on" }, 241 }; 242 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5); 243 244 GlobalProperty hw_compat_2_4[] = { 245 /* Optional because the 'scsi' property is Linux-only */ 246 { "virtio-blk-device", "scsi", "true", .optional = true }, 247 { "e1000", "extra_mac_registers", "off" }, 248 { "virtio-pci", "x-disable-pcie", "on" }, 249 { "virtio-pci", "migrate-extra", "off" }, 250 { "fw_cfg_mem", "dma_enabled", "off" }, 251 { "fw_cfg_io", "dma_enabled", "off" } 252 }; 253 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4); 254 255 GlobalProperty hw_compat_2_3[] = { 256 { "virtio-blk-pci", "any_layout", "off" }, 257 { "virtio-balloon-pci", "any_layout", "off" }, 258 { "virtio-serial-pci", "any_layout", "off" }, 259 { "virtio-9p-pci", "any_layout", "off" }, 260 { "virtio-rng-pci", "any_layout", "off" }, 261 { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" }, 262 { "migration", "send-configuration", "off" }, 263 { "migration", "send-section-footer", "off" }, 264 { "migration", "store-global-state", "off" }, 265 }; 266 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3); 267 268 GlobalProperty hw_compat_2_2[] = {}; 269 const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2); 270 271 GlobalProperty hw_compat_2_1[] = { 272 { "intel-hda", "old_msi_addr", "on" }, 273 { "VGA", "qemu-extended-regs", "off" }, 274 { "secondary-vga", "qemu-extended-regs", "off" }, 275 { "virtio-scsi-pci", "any_layout", "off" }, 276 { "usb-mouse", "usb_version", "1" }, 277 { "usb-kbd", "usb_version", "1" }, 278 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" }, 279 }; 280 const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1); 281 282 MachineState *current_machine; 283 284 static char *machine_get_kernel(Object *obj, Error **errp) 285 { 286 MachineState *ms = MACHINE(obj); 287 288 return g_strdup(ms->kernel_filename); 289 } 290 291 static void machine_set_kernel(Object *obj, const char *value, Error **errp) 292 { 293 MachineState *ms = MACHINE(obj); 294 295 g_free(ms->kernel_filename); 296 ms->kernel_filename = g_strdup(value); 297 } 298 299 static char *machine_get_initrd(Object *obj, Error **errp) 300 { 301 MachineState *ms = MACHINE(obj); 302 303 return g_strdup(ms->initrd_filename); 304 } 305 306 static void machine_set_initrd(Object *obj, const char *value, Error **errp) 307 { 308 MachineState *ms = MACHINE(obj); 309 310 g_free(ms->initrd_filename); 311 ms->initrd_filename = g_strdup(value); 312 } 313 314 static char *machine_get_append(Object *obj, Error **errp) 315 { 316 MachineState *ms = MACHINE(obj); 317 318 return g_strdup(ms->kernel_cmdline); 319 } 320 321 static void machine_set_append(Object *obj, const char *value, Error **errp) 322 { 323 MachineState *ms = MACHINE(obj); 324 325 g_free(ms->kernel_cmdline); 326 ms->kernel_cmdline = g_strdup(value); 327 } 328 329 static char *machine_get_dtb(Object *obj, Error **errp) 330 { 331 MachineState *ms = MACHINE(obj); 332 333 return g_strdup(ms->dtb); 334 } 335 336 static void machine_set_dtb(Object *obj, const char *value, Error **errp) 337 { 338 MachineState *ms = MACHINE(obj); 339 340 g_free(ms->dtb); 341 ms->dtb = g_strdup(value); 342 } 343 344 static char *machine_get_dumpdtb(Object *obj, Error **errp) 345 { 346 MachineState *ms = MACHINE(obj); 347 348 return g_strdup(ms->dumpdtb); 349 } 350 351 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) 352 { 353 MachineState *ms = MACHINE(obj); 354 355 g_free(ms->dumpdtb); 356 ms->dumpdtb = g_strdup(value); 357 } 358 359 static void machine_get_phandle_start(Object *obj, Visitor *v, 360 const char *name, void *opaque, 361 Error **errp) 362 { 363 MachineState *ms = MACHINE(obj); 364 int64_t value = ms->phandle_start; 365 366 visit_type_int(v, name, &value, errp); 367 } 368 369 static void machine_set_phandle_start(Object *obj, Visitor *v, 370 const char *name, void *opaque, 371 Error **errp) 372 { 373 MachineState *ms = MACHINE(obj); 374 int64_t value; 375 376 if (!visit_type_int(v, name, &value, errp)) { 377 return; 378 } 379 380 ms->phandle_start = value; 381 } 382 383 static char *machine_get_dt_compatible(Object *obj, Error **errp) 384 { 385 MachineState *ms = MACHINE(obj); 386 387 return g_strdup(ms->dt_compatible); 388 } 389 390 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) 391 { 392 MachineState *ms = MACHINE(obj); 393 394 g_free(ms->dt_compatible); 395 ms->dt_compatible = g_strdup(value); 396 } 397 398 static bool machine_get_dump_guest_core(Object *obj, Error **errp) 399 { 400 MachineState *ms = MACHINE(obj); 401 402 return ms->dump_guest_core; 403 } 404 405 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) 406 { 407 MachineState *ms = MACHINE(obj); 408 409 ms->dump_guest_core = value; 410 } 411 412 static bool machine_get_mem_merge(Object *obj, Error **errp) 413 { 414 MachineState *ms = MACHINE(obj); 415 416 return ms->mem_merge; 417 } 418 419 static void machine_set_mem_merge(Object *obj, bool value, Error **errp) 420 { 421 MachineState *ms = MACHINE(obj); 422 423 ms->mem_merge = value; 424 } 425 426 static bool machine_get_usb(Object *obj, Error **errp) 427 { 428 MachineState *ms = MACHINE(obj); 429 430 return ms->usb; 431 } 432 433 static void machine_set_usb(Object *obj, bool value, Error **errp) 434 { 435 MachineState *ms = MACHINE(obj); 436 437 ms->usb = value; 438 ms->usb_disabled = !value; 439 } 440 441 static bool machine_get_graphics(Object *obj, Error **errp) 442 { 443 MachineState *ms = MACHINE(obj); 444 445 return ms->enable_graphics; 446 } 447 448 static void machine_set_graphics(Object *obj, bool value, Error **errp) 449 { 450 MachineState *ms = MACHINE(obj); 451 452 ms->enable_graphics = value; 453 } 454 455 static char *machine_get_firmware(Object *obj, Error **errp) 456 { 457 MachineState *ms = MACHINE(obj); 458 459 return g_strdup(ms->firmware); 460 } 461 462 static void machine_set_firmware(Object *obj, const char *value, Error **errp) 463 { 464 MachineState *ms = MACHINE(obj); 465 466 g_free(ms->firmware); 467 ms->firmware = g_strdup(value); 468 } 469 470 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) 471 { 472 MachineState *ms = MACHINE(obj); 473 474 ms->suppress_vmdesc = value; 475 } 476 477 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) 478 { 479 MachineState *ms = MACHINE(obj); 480 481 return ms->suppress_vmdesc; 482 } 483 484 static char *machine_get_memory_encryption(Object *obj, Error **errp) 485 { 486 MachineState *ms = MACHINE(obj); 487 488 if (ms->cgs) { 489 return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs))); 490 } 491 492 return NULL; 493 } 494 495 static void machine_set_memory_encryption(Object *obj, const char *value, 496 Error **errp) 497 { 498 Object *cgs = 499 object_resolve_path_component(object_get_objects_root(), value); 500 501 if (!cgs) { 502 error_setg(errp, "No such memory encryption object '%s'", value); 503 return; 504 } 505 506 object_property_set_link(obj, "confidential-guest-support", cgs, errp); 507 } 508 509 static void machine_check_confidential_guest_support(const Object *obj, 510 const char *name, 511 Object *new_target, 512 Error **errp) 513 { 514 /* 515 * So far the only constraint is that the target has the 516 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked 517 * by the QOM core 518 */ 519 } 520 521 static bool machine_get_nvdimm(Object *obj, Error **errp) 522 { 523 MachineState *ms = MACHINE(obj); 524 525 return ms->nvdimms_state->is_enabled; 526 } 527 528 static void machine_set_nvdimm(Object *obj, bool value, Error **errp) 529 { 530 MachineState *ms = MACHINE(obj); 531 532 ms->nvdimms_state->is_enabled = value; 533 } 534 535 static bool machine_get_hmat(Object *obj, Error **errp) 536 { 537 MachineState *ms = MACHINE(obj); 538 539 return ms->numa_state->hmat_enabled; 540 } 541 542 static void machine_set_hmat(Object *obj, bool value, Error **errp) 543 { 544 MachineState *ms = MACHINE(obj); 545 546 ms->numa_state->hmat_enabled = value; 547 } 548 549 static void machine_get_mem(Object *obj, Visitor *v, const char *name, 550 void *opaque, Error **errp) 551 { 552 MachineState *ms = MACHINE(obj); 553 MemorySizeConfiguration mem = { 554 .has_size = true, 555 .size = ms->ram_size, 556 .has_max_size = !!ms->ram_slots, 557 .max_size = ms->maxram_size, 558 .has_slots = !!ms->ram_slots, 559 .slots = ms->ram_slots, 560 }; 561 MemorySizeConfiguration *p_mem = &mem; 562 563 visit_type_MemorySizeConfiguration(v, name, &p_mem, &error_abort); 564 } 565 566 static void machine_set_mem(Object *obj, Visitor *v, const char *name, 567 void *opaque, Error **errp) 568 { 569 ERRP_GUARD(); 570 MachineState *ms = MACHINE(obj); 571 MachineClass *mc = MACHINE_GET_CLASS(obj); 572 MemorySizeConfiguration *mem; 573 574 if (!visit_type_MemorySizeConfiguration(v, name, &mem, errp)) { 575 return; 576 } 577 578 if (!mem->has_size) { 579 mem->has_size = true; 580 mem->size = mc->default_ram_size; 581 } 582 mem->size = QEMU_ALIGN_UP(mem->size, 8192); 583 if (mc->fixup_ram_size) { 584 mem->size = mc->fixup_ram_size(mem->size); 585 } 586 if ((ram_addr_t)mem->size != mem->size) { 587 error_setg(errp, "ram size too large"); 588 goto out_free; 589 } 590 591 if (mem->has_max_size) { 592 if (mem->max_size < mem->size) { 593 error_setg(errp, "invalid value of maxmem: " 594 "maximum memory size (0x%" PRIx64 ") must be at least " 595 "the initial memory size (0x%" PRIx64 ")", 596 mem->max_size, mem->size); 597 goto out_free; 598 } 599 if (mem->has_slots && mem->slots && mem->max_size == mem->size) { 600 error_setg(errp, "invalid value of maxmem: " 601 "memory slots were specified but maximum memory size " 602 "(0x%" PRIx64 ") is equal to the initial memory size " 603 "(0x%" PRIx64 ")", mem->max_size, mem->size); 604 goto out_free; 605 } 606 ms->maxram_size = mem->max_size; 607 } else { 608 if (mem->has_slots) { 609 error_setg(errp, "slots specified but no max-size"); 610 goto out_free; 611 } 612 ms->maxram_size = mem->size; 613 } 614 ms->ram_size = mem->size; 615 ms->ram_slots = mem->has_slots ? mem->slots : 0; 616 out_free: 617 qapi_free_MemorySizeConfiguration(mem); 618 } 619 620 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) 621 { 622 MachineState *ms = MACHINE(obj); 623 624 return g_strdup(ms->nvdimms_state->persistence_string); 625 } 626 627 static void machine_set_nvdimm_persistence(Object *obj, const char *value, 628 Error **errp) 629 { 630 MachineState *ms = MACHINE(obj); 631 NVDIMMState *nvdimms_state = ms->nvdimms_state; 632 633 if (strcmp(value, "cpu") == 0) { 634 nvdimms_state->persistence = 3; 635 } else if (strcmp(value, "mem-ctrl") == 0) { 636 nvdimms_state->persistence = 2; 637 } else { 638 error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", 639 value); 640 return; 641 } 642 643 g_free(nvdimms_state->persistence_string); 644 nvdimms_state->persistence_string = g_strdup(value); 645 } 646 647 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) 648 { 649 QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type)); 650 } 651 652 bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev) 653 { 654 Object *obj = OBJECT(dev); 655 656 if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) { 657 return false; 658 } 659 660 return device_type_is_dynamic_sysbus(mc, object_get_typename(obj)); 661 } 662 663 bool device_type_is_dynamic_sysbus(MachineClass *mc, const char *type) 664 { 665 bool allowed = false; 666 strList *wl; 667 ObjectClass *klass = object_class_by_name(type); 668 669 for (wl = mc->allowed_dynamic_sysbus_devices; 670 !allowed && wl; 671 wl = wl->next) { 672 allowed |= !!object_class_dynamic_cast(klass, wl->value); 673 } 674 675 return allowed; 676 } 677 678 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) 679 { 680 int i; 681 HotpluggableCPUList *head = NULL; 682 MachineClass *mc = MACHINE_GET_CLASS(machine); 683 684 /* force board to initialize possible_cpus if it hasn't been done yet */ 685 mc->possible_cpu_arch_ids(machine); 686 687 for (i = 0; i < machine->possible_cpus->len; i++) { 688 Object *cpu; 689 HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); 690 691 cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); 692 cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; 693 cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, 694 sizeof(*cpu_item->props)); 695 696 cpu = machine->possible_cpus->cpus[i].cpu; 697 if (cpu) { 698 cpu_item->qom_path = object_get_canonical_path(cpu); 699 } 700 QAPI_LIST_PREPEND(head, cpu_item); 701 } 702 return head; 703 } 704 705 /** 706 * machine_set_cpu_numa_node: 707 * @machine: machine object to modify 708 * @props: specifies which cpu objects to assign to 709 * numa node specified by @props.node_id 710 * @errp: if an error occurs, a pointer to an area to store the error 711 * 712 * Associate NUMA node specified by @props.node_id with cpu slots that 713 * match socket/core/thread-ids specified by @props. It's recommended to use 714 * query-hotpluggable-cpus.props values to specify affected cpu slots, 715 * which would lead to exact 1:1 mapping of cpu slots to NUMA node. 716 * 717 * However for CLI convenience it's possible to pass in subset of properties, 718 * which would affect all cpu slots that match it. 719 * Ex for pc machine: 720 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ 721 * -numa cpu,node-id=0,socket_id=0 \ 722 * -numa cpu,node-id=1,socket_id=1 723 * will assign all child cores of socket 0 to node 0 and 724 * of socket 1 to node 1. 725 * 726 * On attempt of reassigning (already assigned) cpu slot to another NUMA node, 727 * return error. 728 * Empty subset is disallowed and function will return with error in this case. 729 */ 730 void machine_set_cpu_numa_node(MachineState *machine, 731 const CpuInstanceProperties *props, Error **errp) 732 { 733 MachineClass *mc = MACHINE_GET_CLASS(machine); 734 NodeInfo *numa_info = machine->numa_state->nodes; 735 bool match = false; 736 int i; 737 738 if (!mc->possible_cpu_arch_ids) { 739 error_setg(errp, "mapping of CPUs to NUMA node is not supported"); 740 return; 741 } 742 743 /* disabling node mapping is not supported, forbid it */ 744 assert(props->has_node_id); 745 746 /* force board to initialize possible_cpus if it hasn't been done yet */ 747 mc->possible_cpu_arch_ids(machine); 748 749 for (i = 0; i < machine->possible_cpus->len; i++) { 750 CPUArchId *slot = &machine->possible_cpus->cpus[i]; 751 752 /* reject unsupported by board properties */ 753 if (props->has_thread_id && !slot->props.has_thread_id) { 754 error_setg(errp, "thread-id is not supported"); 755 return; 756 } 757 758 if (props->has_core_id && !slot->props.has_core_id) { 759 error_setg(errp, "core-id is not supported"); 760 return; 761 } 762 763 if (props->has_cluster_id && !slot->props.has_cluster_id) { 764 error_setg(errp, "cluster-id is not supported"); 765 return; 766 } 767 768 if (props->has_socket_id && !slot->props.has_socket_id) { 769 error_setg(errp, "socket-id is not supported"); 770 return; 771 } 772 773 if (props->has_die_id && !slot->props.has_die_id) { 774 error_setg(errp, "die-id is not supported"); 775 return; 776 } 777 778 /* skip slots with explicit mismatch */ 779 if (props->has_thread_id && props->thread_id != slot->props.thread_id) { 780 continue; 781 } 782 783 if (props->has_core_id && props->core_id != slot->props.core_id) { 784 continue; 785 } 786 787 if (props->has_cluster_id && 788 props->cluster_id != slot->props.cluster_id) { 789 continue; 790 } 791 792 if (props->has_die_id && props->die_id != slot->props.die_id) { 793 continue; 794 } 795 796 if (props->has_socket_id && props->socket_id != slot->props.socket_id) { 797 continue; 798 } 799 800 /* reject assignment if slot is already assigned, for compatibility 801 * of legacy cpu_index mapping with SPAPR core based mapping do not 802 * error out if cpu thread and matched core have the same node-id */ 803 if (slot->props.has_node_id && 804 slot->props.node_id != props->node_id) { 805 error_setg(errp, "CPU is already assigned to node-id: %" PRId64, 806 slot->props.node_id); 807 return; 808 } 809 810 /* assign slot to node as it's matched '-numa cpu' key */ 811 match = true; 812 slot->props.node_id = props->node_id; 813 slot->props.has_node_id = props->has_node_id; 814 815 if (machine->numa_state->hmat_enabled) { 816 if ((numa_info[props->node_id].initiator < MAX_NODES) && 817 (props->node_id != numa_info[props->node_id].initiator)) { 818 error_setg(errp, "The initiator of CPU NUMA node %" PRId64 819 " should be itself (got %" PRIu16 ")", 820 props->node_id, numa_info[props->node_id].initiator); 821 return; 822 } 823 numa_info[props->node_id].has_cpu = true; 824 numa_info[props->node_id].initiator = props->node_id; 825 } 826 } 827 828 if (!match) { 829 error_setg(errp, "no match found"); 830 } 831 } 832 833 static void machine_get_smp(Object *obj, Visitor *v, const char *name, 834 void *opaque, Error **errp) 835 { 836 MachineState *ms = MACHINE(obj); 837 SMPConfiguration *config = &(SMPConfiguration){ 838 .has_cpus = true, .cpus = ms->smp.cpus, 839 .has_sockets = true, .sockets = ms->smp.sockets, 840 .has_dies = true, .dies = ms->smp.dies, 841 .has_clusters = true, .clusters = ms->smp.clusters, 842 .has_cores = true, .cores = ms->smp.cores, 843 .has_threads = true, .threads = ms->smp.threads, 844 .has_maxcpus = true, .maxcpus = ms->smp.max_cpus, 845 }; 846 847 if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) { 848 return; 849 } 850 } 851 852 static void machine_set_smp(Object *obj, Visitor *v, const char *name, 853 void *opaque, Error **errp) 854 { 855 MachineState *ms = MACHINE(obj); 856 g_autoptr(SMPConfiguration) config = NULL; 857 858 if (!visit_type_SMPConfiguration(v, name, &config, errp)) { 859 return; 860 } 861 862 machine_parse_smp_config(ms, config, errp); 863 } 864 865 static void machine_get_boot(Object *obj, Visitor *v, const char *name, 866 void *opaque, Error **errp) 867 { 868 MachineState *ms = MACHINE(obj); 869 BootConfiguration *config = &ms->boot_config; 870 visit_type_BootConfiguration(v, name, &config, &error_abort); 871 } 872 873 static void machine_free_boot_config(MachineState *ms) 874 { 875 g_free(ms->boot_config.order); 876 g_free(ms->boot_config.once); 877 g_free(ms->boot_config.splash); 878 } 879 880 static void machine_copy_boot_config(MachineState *ms, BootConfiguration *config) 881 { 882 MachineClass *machine_class = MACHINE_GET_CLASS(ms); 883 884 machine_free_boot_config(ms); 885 ms->boot_config = *config; 886 if (!config->order) { 887 ms->boot_config.order = g_strdup(machine_class->default_boot_order); 888 } 889 } 890 891 static void machine_set_boot(Object *obj, Visitor *v, const char *name, 892 void *opaque, Error **errp) 893 { 894 ERRP_GUARD(); 895 MachineState *ms = MACHINE(obj); 896 BootConfiguration *config = NULL; 897 898 if (!visit_type_BootConfiguration(v, name, &config, errp)) { 899 return; 900 } 901 if (config->order) { 902 validate_bootdevices(config->order, errp); 903 if (*errp) { 904 goto out_free; 905 } 906 } 907 if (config->once) { 908 validate_bootdevices(config->once, errp); 909 if (*errp) { 910 goto out_free; 911 } 912 } 913 914 machine_copy_boot_config(ms, config); 915 /* Strings live in ms->boot_config. */ 916 free(config); 917 return; 918 919 out_free: 920 qapi_free_BootConfiguration(config); 921 } 922 923 static void machine_class_init(ObjectClass *oc, void *data) 924 { 925 MachineClass *mc = MACHINE_CLASS(oc); 926 927 /* Default 128 MB as guest ram size */ 928 mc->default_ram_size = 128 * MiB; 929 mc->rom_file_has_mr = true; 930 931 /* numa node memory size aligned on 8MB by default. 932 * On Linux, each node's border has to be 8MB aligned 933 */ 934 mc->numa_mem_align_shift = 23; 935 936 object_class_property_add_str(oc, "kernel", 937 machine_get_kernel, machine_set_kernel); 938 object_class_property_set_description(oc, "kernel", 939 "Linux kernel image file"); 940 941 object_class_property_add_str(oc, "initrd", 942 machine_get_initrd, machine_set_initrd); 943 object_class_property_set_description(oc, "initrd", 944 "Linux initial ramdisk file"); 945 946 object_class_property_add_str(oc, "append", 947 machine_get_append, machine_set_append); 948 object_class_property_set_description(oc, "append", 949 "Linux kernel command line"); 950 951 object_class_property_add_str(oc, "dtb", 952 machine_get_dtb, machine_set_dtb); 953 object_class_property_set_description(oc, "dtb", 954 "Linux kernel device tree file"); 955 956 object_class_property_add_str(oc, "dumpdtb", 957 machine_get_dumpdtb, machine_set_dumpdtb); 958 object_class_property_set_description(oc, "dumpdtb", 959 "Dump current dtb to a file and quit"); 960 961 object_class_property_add(oc, "boot", "BootConfiguration", 962 machine_get_boot, machine_set_boot, 963 NULL, NULL); 964 object_class_property_set_description(oc, "boot", 965 "Boot configuration"); 966 967 object_class_property_add(oc, "smp", "SMPConfiguration", 968 machine_get_smp, machine_set_smp, 969 NULL, NULL); 970 object_class_property_set_description(oc, "smp", 971 "CPU topology"); 972 973 object_class_property_add(oc, "phandle-start", "int", 974 machine_get_phandle_start, machine_set_phandle_start, 975 NULL, NULL); 976 object_class_property_set_description(oc, "phandle-start", 977 "The first phandle ID we may generate dynamically"); 978 979 object_class_property_add_str(oc, "dt-compatible", 980 machine_get_dt_compatible, machine_set_dt_compatible); 981 object_class_property_set_description(oc, "dt-compatible", 982 "Overrides the \"compatible\" property of the dt root node"); 983 984 object_class_property_add_bool(oc, "dump-guest-core", 985 machine_get_dump_guest_core, machine_set_dump_guest_core); 986 object_class_property_set_description(oc, "dump-guest-core", 987 "Include guest memory in a core dump"); 988 989 object_class_property_add_bool(oc, "mem-merge", 990 machine_get_mem_merge, machine_set_mem_merge); 991 object_class_property_set_description(oc, "mem-merge", 992 "Enable/disable memory merge support"); 993 994 object_class_property_add_bool(oc, "usb", 995 machine_get_usb, machine_set_usb); 996 object_class_property_set_description(oc, "usb", 997 "Set on/off to enable/disable usb"); 998 999 object_class_property_add_bool(oc, "graphics", 1000 machine_get_graphics, machine_set_graphics); 1001 object_class_property_set_description(oc, "graphics", 1002 "Set on/off to enable/disable graphics emulation"); 1003 1004 object_class_property_add_str(oc, "firmware", 1005 machine_get_firmware, machine_set_firmware); 1006 object_class_property_set_description(oc, "firmware", 1007 "Firmware image"); 1008 1009 object_class_property_add_bool(oc, "suppress-vmdesc", 1010 machine_get_suppress_vmdesc, machine_set_suppress_vmdesc); 1011 object_class_property_set_description(oc, "suppress-vmdesc", 1012 "Set on to disable self-describing migration"); 1013 1014 object_class_property_add_link(oc, "confidential-guest-support", 1015 TYPE_CONFIDENTIAL_GUEST_SUPPORT, 1016 offsetof(MachineState, cgs), 1017 machine_check_confidential_guest_support, 1018 OBJ_PROP_LINK_STRONG); 1019 object_class_property_set_description(oc, "confidential-guest-support", 1020 "Set confidential guest scheme to support"); 1021 1022 /* For compatibility */ 1023 object_class_property_add_str(oc, "memory-encryption", 1024 machine_get_memory_encryption, machine_set_memory_encryption); 1025 object_class_property_set_description(oc, "memory-encryption", 1026 "Set memory encryption object to use"); 1027 1028 object_class_property_add_link(oc, "memory-backend", TYPE_MEMORY_BACKEND, 1029 offsetof(MachineState, memdev), object_property_allow_set_link, 1030 OBJ_PROP_LINK_STRONG); 1031 object_class_property_set_description(oc, "memory-backend", 1032 "Set RAM backend" 1033 "Valid value is ID of hostmem based backend"); 1034 1035 object_class_property_add(oc, "memory", "MemorySizeConfiguration", 1036 machine_get_mem, machine_set_mem, 1037 NULL, NULL); 1038 object_class_property_set_description(oc, "memory", 1039 "Memory size configuration"); 1040 } 1041 1042 static void machine_class_base_init(ObjectClass *oc, void *data) 1043 { 1044 MachineClass *mc = MACHINE_CLASS(oc); 1045 mc->max_cpus = mc->max_cpus ?: 1; 1046 mc->min_cpus = mc->min_cpus ?: 1; 1047 mc->default_cpus = mc->default_cpus ?: 1; 1048 1049 if (!object_class_is_abstract(oc)) { 1050 const char *cname = object_class_get_name(oc); 1051 assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); 1052 mc->name = g_strndup(cname, 1053 strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); 1054 mc->compat_props = g_ptr_array_new(); 1055 } 1056 } 1057 1058 static void machine_initfn(Object *obj) 1059 { 1060 MachineState *ms = MACHINE(obj); 1061 MachineClass *mc = MACHINE_GET_CLASS(obj); 1062 1063 container_get(obj, "/peripheral"); 1064 container_get(obj, "/peripheral-anon"); 1065 1066 ms->dump_guest_core = true; 1067 ms->mem_merge = true; 1068 ms->enable_graphics = true; 1069 ms->kernel_cmdline = g_strdup(""); 1070 ms->ram_size = mc->default_ram_size; 1071 ms->maxram_size = mc->default_ram_size; 1072 1073 if (mc->nvdimm_supported) { 1074 Object *obj = OBJECT(ms); 1075 1076 ms->nvdimms_state = g_new0(NVDIMMState, 1); 1077 object_property_add_bool(obj, "nvdimm", 1078 machine_get_nvdimm, machine_set_nvdimm); 1079 object_property_set_description(obj, "nvdimm", 1080 "Set on/off to enable/disable " 1081 "NVDIMM instantiation"); 1082 1083 object_property_add_str(obj, "nvdimm-persistence", 1084 machine_get_nvdimm_persistence, 1085 machine_set_nvdimm_persistence); 1086 object_property_set_description(obj, "nvdimm-persistence", 1087 "Set NVDIMM persistence" 1088 "Valid values are cpu, mem-ctrl"); 1089 } 1090 1091 if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { 1092 ms->numa_state = g_new0(NumaState, 1); 1093 object_property_add_bool(obj, "hmat", 1094 machine_get_hmat, machine_set_hmat); 1095 object_property_set_description(obj, "hmat", 1096 "Set on/off to enable/disable " 1097 "ACPI Heterogeneous Memory Attribute " 1098 "Table (HMAT)"); 1099 } 1100 1101 /* default to mc->default_cpus */ 1102 ms->smp.cpus = mc->default_cpus; 1103 ms->smp.max_cpus = mc->default_cpus; 1104 ms->smp.sockets = 1; 1105 ms->smp.dies = 1; 1106 ms->smp.clusters = 1; 1107 ms->smp.cores = 1; 1108 ms->smp.threads = 1; 1109 1110 machine_copy_boot_config(ms, &(BootConfiguration){ 0 }); 1111 } 1112 1113 static void machine_finalize(Object *obj) 1114 { 1115 MachineState *ms = MACHINE(obj); 1116 1117 machine_free_boot_config(ms); 1118 g_free(ms->kernel_filename); 1119 g_free(ms->initrd_filename); 1120 g_free(ms->kernel_cmdline); 1121 g_free(ms->dtb); 1122 g_free(ms->dumpdtb); 1123 g_free(ms->dt_compatible); 1124 g_free(ms->firmware); 1125 g_free(ms->device_memory); 1126 g_free(ms->nvdimms_state); 1127 g_free(ms->numa_state); 1128 } 1129 1130 bool machine_usb(MachineState *machine) 1131 { 1132 return machine->usb; 1133 } 1134 1135 int machine_phandle_start(MachineState *machine) 1136 { 1137 return machine->phandle_start; 1138 } 1139 1140 bool machine_dump_guest_core(MachineState *machine) 1141 { 1142 return machine->dump_guest_core; 1143 } 1144 1145 bool machine_mem_merge(MachineState *machine) 1146 { 1147 return machine->mem_merge; 1148 } 1149 1150 static char *cpu_slot_to_string(const CPUArchId *cpu) 1151 { 1152 GString *s = g_string_new(NULL); 1153 if (cpu->props.has_socket_id) { 1154 g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); 1155 } 1156 if (cpu->props.has_die_id) { 1157 if (s->len) { 1158 g_string_append_printf(s, ", "); 1159 } 1160 g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id); 1161 } 1162 if (cpu->props.has_cluster_id) { 1163 if (s->len) { 1164 g_string_append_printf(s, ", "); 1165 } 1166 g_string_append_printf(s, "cluster-id: %"PRId64, cpu->props.cluster_id); 1167 } 1168 if (cpu->props.has_core_id) { 1169 if (s->len) { 1170 g_string_append_printf(s, ", "); 1171 } 1172 g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); 1173 } 1174 if (cpu->props.has_thread_id) { 1175 if (s->len) { 1176 g_string_append_printf(s, ", "); 1177 } 1178 g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); 1179 } 1180 return g_string_free(s, false); 1181 } 1182 1183 static void numa_validate_initiator(NumaState *numa_state) 1184 { 1185 int i; 1186 NodeInfo *numa_info = numa_state->nodes; 1187 1188 for (i = 0; i < numa_state->num_nodes; i++) { 1189 if (numa_info[i].initiator == MAX_NODES) { 1190 continue; 1191 } 1192 1193 if (!numa_info[numa_info[i].initiator].present) { 1194 error_report("NUMA node %" PRIu16 " is missing, use " 1195 "'-numa node' option to declare it first", 1196 numa_info[i].initiator); 1197 exit(1); 1198 } 1199 1200 if (!numa_info[numa_info[i].initiator].has_cpu) { 1201 error_report("The initiator of NUMA node %d is invalid", i); 1202 exit(1); 1203 } 1204 } 1205 } 1206 1207 static void machine_numa_finish_cpu_init(MachineState *machine) 1208 { 1209 int i; 1210 bool default_mapping; 1211 GString *s = g_string_new(NULL); 1212 MachineClass *mc = MACHINE_GET_CLASS(machine); 1213 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); 1214 1215 assert(machine->numa_state->num_nodes); 1216 for (i = 0; i < possible_cpus->len; i++) { 1217 if (possible_cpus->cpus[i].props.has_node_id) { 1218 break; 1219 } 1220 } 1221 default_mapping = (i == possible_cpus->len); 1222 1223 for (i = 0; i < possible_cpus->len; i++) { 1224 const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; 1225 1226 if (!cpu_slot->props.has_node_id) { 1227 /* fetch default mapping from board and enable it */ 1228 CpuInstanceProperties props = cpu_slot->props; 1229 1230 props.node_id = mc->get_default_cpu_node_id(machine, i); 1231 if (!default_mapping) { 1232 /* record slots with not set mapping, 1233 * TODO: make it hard error in future */ 1234 char *cpu_str = cpu_slot_to_string(cpu_slot); 1235 g_string_append_printf(s, "%sCPU %d [%s]", 1236 s->len ? ", " : "", i, cpu_str); 1237 g_free(cpu_str); 1238 1239 /* non mapped cpus used to fallback to node 0 */ 1240 props.node_id = 0; 1241 } 1242 1243 props.has_node_id = true; 1244 machine_set_cpu_numa_node(machine, &props, &error_fatal); 1245 } 1246 } 1247 1248 if (machine->numa_state->hmat_enabled) { 1249 numa_validate_initiator(machine->numa_state); 1250 } 1251 1252 if (s->len && !qtest_enabled()) { 1253 warn_report("CPU(s) not present in any NUMA nodes: %s", 1254 s->str); 1255 warn_report("All CPU(s) up to maxcpus should be described " 1256 "in NUMA config, ability to start up with partial NUMA " 1257 "mappings is obsoleted and will be removed in future"); 1258 } 1259 g_string_free(s, true); 1260 } 1261 1262 MemoryRegion *machine_consume_memdev(MachineState *machine, 1263 HostMemoryBackend *backend) 1264 { 1265 MemoryRegion *ret = host_memory_backend_get_memory(backend); 1266 1267 if (host_memory_backend_is_mapped(backend)) { 1268 error_report("memory backend %s can't be used multiple times.", 1269 object_get_canonical_path_component(OBJECT(backend))); 1270 exit(EXIT_FAILURE); 1271 } 1272 host_memory_backend_set_mapped(backend, true); 1273 vmstate_register_ram_global(ret); 1274 return ret; 1275 } 1276 1277 static bool create_default_memdev(MachineState *ms, const char *path, Error **errp) 1278 { 1279 Object *obj; 1280 MachineClass *mc = MACHINE_GET_CLASS(ms); 1281 bool r = false; 1282 1283 obj = object_new(path ? TYPE_MEMORY_BACKEND_FILE : TYPE_MEMORY_BACKEND_RAM); 1284 if (path) { 1285 if (!object_property_set_str(obj, "mem-path", path, errp)) { 1286 goto out; 1287 } 1288 } 1289 if (!object_property_set_int(obj, "size", ms->ram_size, errp)) { 1290 goto out; 1291 } 1292 object_property_add_child(object_get_objects_root(), mc->default_ram_id, 1293 obj); 1294 /* Ensure backend's memory region name is equal to mc->default_ram_id */ 1295 if (!object_property_set_bool(obj, "x-use-canonical-path-for-ramblock-id", 1296 false, errp)) { 1297 goto out; 1298 } 1299 if (!user_creatable_complete(USER_CREATABLE(obj), errp)) { 1300 goto out; 1301 } 1302 r = object_property_set_link(OBJECT(ms), "memory-backend", obj, errp); 1303 1304 out: 1305 object_unref(obj); 1306 return r; 1307 } 1308 1309 1310 void machine_run_board_init(MachineState *machine, const char *mem_path, Error **errp) 1311 { 1312 MachineClass *machine_class = MACHINE_GET_CLASS(machine); 1313 ObjectClass *oc = object_class_by_name(machine->cpu_type); 1314 CPUClass *cc; 1315 1316 /* This checkpoint is required by replay to separate prior clock 1317 reading from the other reads, because timer polling functions query 1318 clock values from the log. */ 1319 replay_checkpoint(CHECKPOINT_INIT); 1320 1321 if (!xen_enabled()) { 1322 /* On 32-bit hosts, QEMU is limited by virtual address space */ 1323 if (machine->ram_size > (2047 << 20) && HOST_LONG_BITS == 32) { 1324 error_setg(errp, "at most 2047 MB RAM can be simulated"); 1325 return; 1326 } 1327 } 1328 1329 if (machine->memdev) { 1330 ram_addr_t backend_size = object_property_get_uint(OBJECT(machine->memdev), 1331 "size", &error_abort); 1332 if (backend_size != machine->ram_size) { 1333 error_setg(errp, "Machine memory size does not match the size of the memory backend"); 1334 return; 1335 } 1336 } else if (machine_class->default_ram_id && machine->ram_size && 1337 numa_uses_legacy_mem()) { 1338 if (!create_default_memdev(current_machine, mem_path, errp)) { 1339 return; 1340 } 1341 } 1342 1343 if (machine->numa_state) { 1344 numa_complete_configuration(machine); 1345 if (machine->numa_state->num_nodes) { 1346 machine_numa_finish_cpu_init(machine); 1347 } 1348 } 1349 1350 if (!machine->ram && machine->memdev) { 1351 machine->ram = machine_consume_memdev(machine, machine->memdev); 1352 } 1353 1354 /* If the machine supports the valid_cpu_types check and the user 1355 * specified a CPU with -cpu check here that the user CPU is supported. 1356 */ 1357 if (machine_class->valid_cpu_types && machine->cpu_type) { 1358 int i; 1359 1360 for (i = 0; machine_class->valid_cpu_types[i]; i++) { 1361 if (object_class_dynamic_cast(oc, 1362 machine_class->valid_cpu_types[i])) { 1363 /* The user specificed CPU is in the valid field, we are 1364 * good to go. 1365 */ 1366 break; 1367 } 1368 } 1369 1370 if (!machine_class->valid_cpu_types[i]) { 1371 /* The user specified CPU is not valid */ 1372 error_report("Invalid CPU type: %s", machine->cpu_type); 1373 error_printf("The valid types are: %s", 1374 machine_class->valid_cpu_types[0]); 1375 for (i = 1; machine_class->valid_cpu_types[i]; i++) { 1376 error_printf(", %s", machine_class->valid_cpu_types[i]); 1377 } 1378 error_printf("\n"); 1379 1380 exit(1); 1381 } 1382 } 1383 1384 /* Check if CPU type is deprecated and warn if so */ 1385 cc = CPU_CLASS(oc); 1386 if (cc && cc->deprecation_note) { 1387 warn_report("CPU model %s is deprecated -- %s", machine->cpu_type, 1388 cc->deprecation_note); 1389 } 1390 1391 if (machine->cgs) { 1392 /* 1393 * With confidential guests, the host can't see the real 1394 * contents of RAM, so there's no point in it trying to merge 1395 * areas. 1396 */ 1397 machine_set_mem_merge(OBJECT(machine), false, &error_abort); 1398 1399 /* 1400 * Virtio devices can't count on directly accessing guest 1401 * memory, so they need iommu_platform=on to use normal DMA 1402 * mechanisms. That requires also disabling legacy virtio 1403 * support for those virtio pci devices which allow it. 1404 */ 1405 object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy", 1406 "on", true); 1407 object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform", 1408 "on", false); 1409 } 1410 1411 accel_init_interfaces(ACCEL_GET_CLASS(machine->accelerator)); 1412 machine_class->init(machine); 1413 phase_advance(PHASE_MACHINE_INITIALIZED); 1414 } 1415 1416 static NotifierList machine_init_done_notifiers = 1417 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers); 1418 1419 void qemu_add_machine_init_done_notifier(Notifier *notify) 1420 { 1421 notifier_list_add(&machine_init_done_notifiers, notify); 1422 if (phase_check(PHASE_MACHINE_READY)) { 1423 notify->notify(notify, NULL); 1424 } 1425 } 1426 1427 void qemu_remove_machine_init_done_notifier(Notifier *notify) 1428 { 1429 notifier_remove(notify); 1430 } 1431 1432 void qdev_machine_creation_done(void) 1433 { 1434 cpu_synchronize_all_post_init(); 1435 1436 if (current_machine->boot_config.once) { 1437 qemu_boot_set(current_machine->boot_config.once, &error_fatal); 1438 qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_config.order)); 1439 } 1440 1441 /* 1442 * ok, initial machine setup is done, starting from now we can 1443 * only create hotpluggable devices 1444 */ 1445 phase_advance(PHASE_MACHINE_READY); 1446 qdev_assert_realized_properly(); 1447 1448 /* TODO: once all bus devices are qdevified, this should be done 1449 * when bus is created by qdev.c */ 1450 /* 1451 * TODO: If we had a main 'reset container' that the whole system 1452 * lived in, we could reset that using the multi-phase reset 1453 * APIs. For the moment, we just reset the sysbus, which will cause 1454 * all devices hanging off it (and all their child buses, recursively) 1455 * to be reset. Note that this will *not* reset any Device objects 1456 * which are not attached to some part of the qbus tree! 1457 */ 1458 qemu_register_reset(resettable_cold_reset_fn, sysbus_get_default()); 1459 1460 notifier_list_notify(&machine_init_done_notifiers, NULL); 1461 1462 if (rom_check_and_register_reset() != 0) { 1463 exit(1); 1464 } 1465 1466 replay_start(); 1467 1468 /* This checkpoint is required by replay to separate prior clock 1469 reading from the other reads, because timer polling functions query 1470 clock values from the log. */ 1471 replay_checkpoint(CHECKPOINT_RESET); 1472 qemu_system_reset(SHUTDOWN_CAUSE_NONE); 1473 register_global_state(); 1474 } 1475 1476 static const TypeInfo machine_info = { 1477 .name = TYPE_MACHINE, 1478 .parent = TYPE_OBJECT, 1479 .abstract = true, 1480 .class_size = sizeof(MachineClass), 1481 .class_init = machine_class_init, 1482 .class_base_init = machine_class_base_init, 1483 .instance_size = sizeof(MachineState), 1484 .instance_init = machine_initfn, 1485 .instance_finalize = machine_finalize, 1486 }; 1487 1488 static void machine_register_types(void) 1489 { 1490 type_register_static(&machine_info); 1491 } 1492 1493 type_init(machine_register_types) 1494