1 /* 2 * QEMU Machine 3 * 4 * Copyright (C) 2014 Red Hat Inc 5 * 6 * Authors: 7 * Marcel Apfelbaum <marcel.a@redhat.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or later. 10 * See the COPYING file in the top-level directory. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "qemu/option.h" 15 #include "qapi/qmp/qerror.h" 16 #include "sysemu/replay.h" 17 #include "qemu/units.h" 18 #include "hw/boards.h" 19 #include "hw/loader.h" 20 #include "qapi/error.h" 21 #include "qapi/qapi-visit-common.h" 22 #include "qapi/qapi-visit-machine.h" 23 #include "qapi/visitor.h" 24 #include "hw/sysbus.h" 25 #include "sysemu/cpus.h" 26 #include "sysemu/sysemu.h" 27 #include "sysemu/reset.h" 28 #include "sysemu/runstate.h" 29 #include "sysemu/numa.h" 30 #include "qemu/error-report.h" 31 #include "sysemu/qtest.h" 32 #include "hw/pci/pci.h" 33 #include "hw/mem/nvdimm.h" 34 #include "migration/global_state.h" 35 #include "migration/vmstate.h" 36 #include "exec/confidential-guest-support.h" 37 #include "hw/virtio/virtio.h" 38 #include "hw/virtio/virtio-pci.h" 39 40 GlobalProperty hw_compat_7_0[] = {}; 41 const size_t hw_compat_7_0_len = G_N_ELEMENTS(hw_compat_7_0); 42 43 GlobalProperty hw_compat_6_2[] = { 44 { "PIIX4_PM", "x-not-migrate-acpi-index", "on"}, 45 }; 46 const size_t hw_compat_6_2_len = G_N_ELEMENTS(hw_compat_6_2); 47 48 GlobalProperty hw_compat_6_1[] = { 49 { "vhost-user-vsock-device", "seqpacket", "off" }, 50 { "nvme-ns", "shared", "off" }, 51 }; 52 const size_t hw_compat_6_1_len = G_N_ELEMENTS(hw_compat_6_1); 53 54 GlobalProperty hw_compat_6_0[] = { 55 { "gpex-pcihost", "allow-unmapped-accesses", "false" }, 56 { "i8042", "extended-state", "false"}, 57 { "nvme-ns", "eui64-default", "off"}, 58 { "e1000", "init-vet", "off" }, 59 { "e1000e", "init-vet", "off" }, 60 { "vhost-vsock-device", "seqpacket", "off" }, 61 }; 62 const size_t hw_compat_6_0_len = G_N_ELEMENTS(hw_compat_6_0); 63 64 GlobalProperty hw_compat_5_2[] = { 65 { "ICH9-LPC", "smm-compat", "on"}, 66 { "PIIX4_PM", "smm-compat", "on"}, 67 { "virtio-blk-device", "report-discard-granularity", "off" }, 68 { "virtio-net-pci-base", "vectors", "3"}, 69 }; 70 const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2); 71 72 GlobalProperty hw_compat_5_1[] = { 73 { "vhost-scsi", "num_queues", "1"}, 74 { "vhost-user-blk", "num-queues", "1"}, 75 { "vhost-user-scsi", "num_queues", "1"}, 76 { "virtio-blk-device", "num-queues", "1"}, 77 { "virtio-scsi-device", "num_queues", "1"}, 78 { "nvme", "use-intel-id", "on"}, 79 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */ 80 { "pl011", "migrate-clk", "off" }, 81 { "virtio-pci", "x-ats-page-aligned", "off"}, 82 }; 83 const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1); 84 85 GlobalProperty hw_compat_5_0[] = { 86 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" }, 87 { "virtio-balloon-device", "page-poison", "false" }, 88 { "vmport", "x-read-set-eax", "off" }, 89 { "vmport", "x-signal-unsupported-cmd", "off" }, 90 { "vmport", "x-report-vmx-type", "off" }, 91 { "vmport", "x-cmds-v2", "off" }, 92 { "virtio-device", "x-disable-legacy-check", "true" }, 93 }; 94 const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0); 95 96 GlobalProperty hw_compat_4_2[] = { 97 { "virtio-blk-device", "queue-size", "128"}, 98 { "virtio-scsi-device", "virtqueue_size", "128"}, 99 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" }, 100 { "virtio-blk-device", "seg-max-adjust", "off"}, 101 { "virtio-scsi-device", "seg_max_adjust", "off"}, 102 { "vhost-blk-device", "seg_max_adjust", "off"}, 103 { "usb-host", "suppress-remote-wake", "off" }, 104 { "usb-redir", "suppress-remote-wake", "off" }, 105 { "qxl", "revision", "4" }, 106 { "qxl-vga", "revision", "4" }, 107 { "fw_cfg", "acpi-mr-restore", "false" }, 108 { "virtio-device", "use-disabled-flag", "false" }, 109 }; 110 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2); 111 112 GlobalProperty hw_compat_4_1[] = { 113 { "virtio-pci", "x-pcie-flr-init", "off" }, 114 }; 115 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1); 116 117 GlobalProperty hw_compat_4_0[] = { 118 { "VGA", "edid", "false" }, 119 { "secondary-vga", "edid", "false" }, 120 { "bochs-display", "edid", "false" }, 121 { "virtio-vga", "edid", "false" }, 122 { "virtio-gpu-device", "edid", "false" }, 123 { "virtio-device", "use-started", "false" }, 124 { "virtio-balloon-device", "qemu-4-0-config-size", "true" }, 125 { "pl031", "migrate-tick-offset", "false" }, 126 }; 127 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0); 128 129 GlobalProperty hw_compat_3_1[] = { 130 { "pcie-root-port", "x-speed", "2_5" }, 131 { "pcie-root-port", "x-width", "1" }, 132 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, 133 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, 134 { "tpm-crb", "ppi", "false" }, 135 { "tpm-tis", "ppi", "false" }, 136 { "usb-kbd", "serial", "42" }, 137 { "usb-mouse", "serial", "42" }, 138 { "usb-tablet", "serial", "42" }, 139 { "virtio-blk-device", "discard", "false" }, 140 { "virtio-blk-device", "write-zeroes", "false" }, 141 { "virtio-balloon-device", "qemu-4-0-config-size", "false" }, 142 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */ 143 }; 144 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); 145 146 GlobalProperty hw_compat_3_0[] = {}; 147 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0); 148 149 GlobalProperty hw_compat_2_12[] = { 150 { "migration", "decompress-error-check", "off" }, 151 { "hda-audio", "use-timer", "false" }, 152 { "cirrus-vga", "global-vmstate", "true" }, 153 { "VGA", "global-vmstate", "true" }, 154 { "vmware-svga", "global-vmstate", "true" }, 155 { "qxl-vga", "global-vmstate", "true" }, 156 }; 157 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12); 158 159 GlobalProperty hw_compat_2_11[] = { 160 { "hpet", "hpet-offset-saved", "false" }, 161 { "virtio-blk-pci", "vectors", "2" }, 162 { "vhost-user-blk-pci", "vectors", "2" }, 163 { "e1000", "migrate_tso_props", "off" }, 164 }; 165 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11); 166 167 GlobalProperty hw_compat_2_10[] = { 168 { "virtio-mouse-device", "wheel-axis", "false" }, 169 { "virtio-tablet-device", "wheel-axis", "false" }, 170 }; 171 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10); 172 173 GlobalProperty hw_compat_2_9[] = { 174 { "pci-bridge", "shpc", "off" }, 175 { "intel-iommu", "pt", "off" }, 176 { "virtio-net-device", "x-mtu-bypass-backend", "off" }, 177 { "pcie-root-port", "x-migrate-msix", "false" }, 178 }; 179 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9); 180 181 GlobalProperty hw_compat_2_8[] = { 182 { "fw_cfg_mem", "x-file-slots", "0x10" }, 183 { "fw_cfg_io", "x-file-slots", "0x10" }, 184 { "pflash_cfi01", "old-multiple-chip-handling", "on" }, 185 { "pci-bridge", "shpc", "on" }, 186 { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" }, 187 { "virtio-pci", "x-pcie-deverr-init", "off" }, 188 { "virtio-pci", "x-pcie-lnkctl-init", "off" }, 189 { "virtio-pci", "x-pcie-pm-init", "off" }, 190 { "cirrus-vga", "vgamem_mb", "8" }, 191 { "isa-cirrus-vga", "vgamem_mb", "8" }, 192 }; 193 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8); 194 195 GlobalProperty hw_compat_2_7[] = { 196 { "virtio-pci", "page-per-vq", "on" }, 197 { "virtio-serial-device", "emergency-write", "off" }, 198 { "ioapic", "version", "0x11" }, 199 { "intel-iommu", "x-buggy-eim", "true" }, 200 { "virtio-pci", "x-ignore-backend-features", "on" }, 201 }; 202 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7); 203 204 GlobalProperty hw_compat_2_6[] = { 205 { "virtio-mmio", "format_transport_address", "off" }, 206 /* Optional because not all virtio-pci devices support legacy mode */ 207 { "virtio-pci", "disable-modern", "on", .optional = true }, 208 { "virtio-pci", "disable-legacy", "off", .optional = true }, 209 }; 210 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6); 211 212 GlobalProperty hw_compat_2_5[] = { 213 { "isa-fdc", "fallback", "144" }, 214 { "pvscsi", "x-old-pci-configuration", "on" }, 215 { "pvscsi", "x-disable-pcie", "on" }, 216 { "vmxnet3", "x-old-msi-offsets", "on" }, 217 { "vmxnet3", "x-disable-pcie", "on" }, 218 }; 219 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5); 220 221 GlobalProperty hw_compat_2_4[] = { 222 /* Optional because the 'scsi' property is Linux-only */ 223 { "virtio-blk-device", "scsi", "true", .optional = true }, 224 { "e1000", "extra_mac_registers", "off" }, 225 { "virtio-pci", "x-disable-pcie", "on" }, 226 { "virtio-pci", "migrate-extra", "off" }, 227 { "fw_cfg_mem", "dma_enabled", "off" }, 228 { "fw_cfg_io", "dma_enabled", "off" } 229 }; 230 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4); 231 232 GlobalProperty hw_compat_2_3[] = { 233 { "virtio-blk-pci", "any_layout", "off" }, 234 { "virtio-balloon-pci", "any_layout", "off" }, 235 { "virtio-serial-pci", "any_layout", "off" }, 236 { "virtio-9p-pci", "any_layout", "off" }, 237 { "virtio-rng-pci", "any_layout", "off" }, 238 { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" }, 239 { "migration", "send-configuration", "off" }, 240 { "migration", "send-section-footer", "off" }, 241 { "migration", "store-global-state", "off" }, 242 }; 243 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3); 244 245 GlobalProperty hw_compat_2_2[] = {}; 246 const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2); 247 248 GlobalProperty hw_compat_2_1[] = { 249 { "intel-hda", "old_msi_addr", "on" }, 250 { "VGA", "qemu-extended-regs", "off" }, 251 { "secondary-vga", "qemu-extended-regs", "off" }, 252 { "virtio-scsi-pci", "any_layout", "off" }, 253 { "usb-mouse", "usb_version", "1" }, 254 { "usb-kbd", "usb_version", "1" }, 255 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" }, 256 }; 257 const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1); 258 259 MachineState *current_machine; 260 261 static char *machine_get_kernel(Object *obj, Error **errp) 262 { 263 MachineState *ms = MACHINE(obj); 264 265 return g_strdup(ms->kernel_filename); 266 } 267 268 static void machine_set_kernel(Object *obj, const char *value, Error **errp) 269 { 270 MachineState *ms = MACHINE(obj); 271 272 g_free(ms->kernel_filename); 273 ms->kernel_filename = g_strdup(value); 274 } 275 276 static char *machine_get_initrd(Object *obj, Error **errp) 277 { 278 MachineState *ms = MACHINE(obj); 279 280 return g_strdup(ms->initrd_filename); 281 } 282 283 static void machine_set_initrd(Object *obj, const char *value, Error **errp) 284 { 285 MachineState *ms = MACHINE(obj); 286 287 g_free(ms->initrd_filename); 288 ms->initrd_filename = g_strdup(value); 289 } 290 291 static char *machine_get_append(Object *obj, Error **errp) 292 { 293 MachineState *ms = MACHINE(obj); 294 295 return g_strdup(ms->kernel_cmdline); 296 } 297 298 static void machine_set_append(Object *obj, const char *value, Error **errp) 299 { 300 MachineState *ms = MACHINE(obj); 301 302 g_free(ms->kernel_cmdline); 303 ms->kernel_cmdline = g_strdup(value); 304 } 305 306 static char *machine_get_dtb(Object *obj, Error **errp) 307 { 308 MachineState *ms = MACHINE(obj); 309 310 return g_strdup(ms->dtb); 311 } 312 313 static void machine_set_dtb(Object *obj, const char *value, Error **errp) 314 { 315 MachineState *ms = MACHINE(obj); 316 317 g_free(ms->dtb); 318 ms->dtb = g_strdup(value); 319 } 320 321 static char *machine_get_dumpdtb(Object *obj, Error **errp) 322 { 323 MachineState *ms = MACHINE(obj); 324 325 return g_strdup(ms->dumpdtb); 326 } 327 328 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) 329 { 330 MachineState *ms = MACHINE(obj); 331 332 g_free(ms->dumpdtb); 333 ms->dumpdtb = g_strdup(value); 334 } 335 336 static void machine_get_phandle_start(Object *obj, Visitor *v, 337 const char *name, void *opaque, 338 Error **errp) 339 { 340 MachineState *ms = MACHINE(obj); 341 int64_t value = ms->phandle_start; 342 343 visit_type_int(v, name, &value, errp); 344 } 345 346 static void machine_set_phandle_start(Object *obj, Visitor *v, 347 const char *name, void *opaque, 348 Error **errp) 349 { 350 MachineState *ms = MACHINE(obj); 351 int64_t value; 352 353 if (!visit_type_int(v, name, &value, errp)) { 354 return; 355 } 356 357 ms->phandle_start = value; 358 } 359 360 static char *machine_get_dt_compatible(Object *obj, Error **errp) 361 { 362 MachineState *ms = MACHINE(obj); 363 364 return g_strdup(ms->dt_compatible); 365 } 366 367 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) 368 { 369 MachineState *ms = MACHINE(obj); 370 371 g_free(ms->dt_compatible); 372 ms->dt_compatible = g_strdup(value); 373 } 374 375 static bool machine_get_dump_guest_core(Object *obj, Error **errp) 376 { 377 MachineState *ms = MACHINE(obj); 378 379 return ms->dump_guest_core; 380 } 381 382 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) 383 { 384 MachineState *ms = MACHINE(obj); 385 386 ms->dump_guest_core = value; 387 } 388 389 static bool machine_get_mem_merge(Object *obj, Error **errp) 390 { 391 MachineState *ms = MACHINE(obj); 392 393 return ms->mem_merge; 394 } 395 396 static void machine_set_mem_merge(Object *obj, bool value, Error **errp) 397 { 398 MachineState *ms = MACHINE(obj); 399 400 ms->mem_merge = value; 401 } 402 403 static bool machine_get_usb(Object *obj, Error **errp) 404 { 405 MachineState *ms = MACHINE(obj); 406 407 return ms->usb; 408 } 409 410 static void machine_set_usb(Object *obj, bool value, Error **errp) 411 { 412 MachineState *ms = MACHINE(obj); 413 414 ms->usb = value; 415 ms->usb_disabled = !value; 416 } 417 418 static bool machine_get_graphics(Object *obj, Error **errp) 419 { 420 MachineState *ms = MACHINE(obj); 421 422 return ms->enable_graphics; 423 } 424 425 static void machine_set_graphics(Object *obj, bool value, Error **errp) 426 { 427 MachineState *ms = MACHINE(obj); 428 429 ms->enable_graphics = value; 430 } 431 432 static char *machine_get_firmware(Object *obj, Error **errp) 433 { 434 MachineState *ms = MACHINE(obj); 435 436 return g_strdup(ms->firmware); 437 } 438 439 static void machine_set_firmware(Object *obj, const char *value, Error **errp) 440 { 441 MachineState *ms = MACHINE(obj); 442 443 g_free(ms->firmware); 444 ms->firmware = g_strdup(value); 445 } 446 447 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) 448 { 449 MachineState *ms = MACHINE(obj); 450 451 ms->suppress_vmdesc = value; 452 } 453 454 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) 455 { 456 MachineState *ms = MACHINE(obj); 457 458 return ms->suppress_vmdesc; 459 } 460 461 static char *machine_get_memory_encryption(Object *obj, Error **errp) 462 { 463 MachineState *ms = MACHINE(obj); 464 465 if (ms->cgs) { 466 return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs))); 467 } 468 469 return NULL; 470 } 471 472 static void machine_set_memory_encryption(Object *obj, const char *value, 473 Error **errp) 474 { 475 Object *cgs = 476 object_resolve_path_component(object_get_objects_root(), value); 477 478 if (!cgs) { 479 error_setg(errp, "No such memory encryption object '%s'", value); 480 return; 481 } 482 483 object_property_set_link(obj, "confidential-guest-support", cgs, errp); 484 } 485 486 static void machine_check_confidential_guest_support(const Object *obj, 487 const char *name, 488 Object *new_target, 489 Error **errp) 490 { 491 /* 492 * So far the only constraint is that the target has the 493 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked 494 * by the QOM core 495 */ 496 } 497 498 static bool machine_get_nvdimm(Object *obj, Error **errp) 499 { 500 MachineState *ms = MACHINE(obj); 501 502 return ms->nvdimms_state->is_enabled; 503 } 504 505 static void machine_set_nvdimm(Object *obj, bool value, Error **errp) 506 { 507 MachineState *ms = MACHINE(obj); 508 509 ms->nvdimms_state->is_enabled = value; 510 } 511 512 static bool machine_get_hmat(Object *obj, Error **errp) 513 { 514 MachineState *ms = MACHINE(obj); 515 516 return ms->numa_state->hmat_enabled; 517 } 518 519 static void machine_set_hmat(Object *obj, bool value, Error **errp) 520 { 521 MachineState *ms = MACHINE(obj); 522 523 ms->numa_state->hmat_enabled = value; 524 } 525 526 static void machine_get_mem(Object *obj, Visitor *v, const char *name, 527 void *opaque, Error **errp) 528 { 529 MachineState *ms = MACHINE(obj); 530 MemorySizeConfiguration mem = { 531 .has_size = true, 532 .size = ms->ram_size, 533 .has_max_size = !!ms->ram_slots, 534 .max_size = ms->maxram_size, 535 .has_slots = !!ms->ram_slots, 536 .slots = ms->ram_slots, 537 }; 538 MemorySizeConfiguration *p_mem = &mem; 539 540 visit_type_MemorySizeConfiguration(v, name, &p_mem, &error_abort); 541 } 542 543 static void machine_set_mem(Object *obj, Visitor *v, const char *name, 544 void *opaque, Error **errp) 545 { 546 MachineState *ms = MACHINE(obj); 547 MachineClass *mc = MACHINE_GET_CLASS(obj); 548 MemorySizeConfiguration *mem; 549 550 ERRP_GUARD(); 551 552 if (!visit_type_MemorySizeConfiguration(v, name, &mem, errp)) { 553 return; 554 } 555 556 if (!mem->has_size) { 557 mem->has_size = true; 558 mem->size = mc->default_ram_size; 559 } 560 mem->size = QEMU_ALIGN_UP(mem->size, 8192); 561 if (mc->fixup_ram_size) { 562 mem->size = mc->fixup_ram_size(mem->size); 563 } 564 if ((ram_addr_t)mem->size != mem->size) { 565 error_setg(errp, "ram size too large"); 566 goto out_free; 567 } 568 569 if (mem->has_max_size) { 570 if (mem->max_size < mem->size) { 571 error_setg(errp, "invalid value of maxmem: " 572 "maximum memory size (0x%" PRIx64 ") must be at least " 573 "the initial memory size (0x%" PRIx64 ")", 574 mem->max_size, mem->size); 575 goto out_free; 576 } 577 if (mem->has_slots && mem->slots && mem->max_size == mem->size) { 578 error_setg(errp, "invalid value of maxmem: " 579 "memory slots were specified but maximum memory size " 580 "(0x%" PRIx64 ") is equal to the initial memory size " 581 "(0x%" PRIx64 ")", mem->max_size, mem->size); 582 goto out_free; 583 } 584 ms->maxram_size = mem->max_size; 585 } else { 586 if (mem->has_slots) { 587 error_setg(errp, "slots specified but no max-size"); 588 goto out_free; 589 } 590 ms->maxram_size = mem->size; 591 } 592 ms->ram_size = mem->size; 593 ms->ram_slots = mem->has_slots ? mem->slots : 0; 594 out_free: 595 qapi_free_MemorySizeConfiguration(mem); 596 } 597 598 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) 599 { 600 MachineState *ms = MACHINE(obj); 601 602 return g_strdup(ms->nvdimms_state->persistence_string); 603 } 604 605 static void machine_set_nvdimm_persistence(Object *obj, const char *value, 606 Error **errp) 607 { 608 MachineState *ms = MACHINE(obj); 609 NVDIMMState *nvdimms_state = ms->nvdimms_state; 610 611 if (strcmp(value, "cpu") == 0) { 612 nvdimms_state->persistence = 3; 613 } else if (strcmp(value, "mem-ctrl") == 0) { 614 nvdimms_state->persistence = 2; 615 } else { 616 error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", 617 value); 618 return; 619 } 620 621 g_free(nvdimms_state->persistence_string); 622 nvdimms_state->persistence_string = g_strdup(value); 623 } 624 625 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) 626 { 627 QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type)); 628 } 629 630 bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev) 631 { 632 Object *obj = OBJECT(dev); 633 634 if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) { 635 return false; 636 } 637 638 return device_type_is_dynamic_sysbus(mc, object_get_typename(obj)); 639 } 640 641 bool device_type_is_dynamic_sysbus(MachineClass *mc, const char *type) 642 { 643 bool allowed = false; 644 strList *wl; 645 ObjectClass *klass = object_class_by_name(type); 646 647 for (wl = mc->allowed_dynamic_sysbus_devices; 648 !allowed && wl; 649 wl = wl->next) { 650 allowed |= !!object_class_dynamic_cast(klass, wl->value); 651 } 652 653 return allowed; 654 } 655 656 static char *machine_get_memdev(Object *obj, Error **errp) 657 { 658 MachineState *ms = MACHINE(obj); 659 660 return g_strdup(ms->ram_memdev_id); 661 } 662 663 static void machine_set_memdev(Object *obj, const char *value, Error **errp) 664 { 665 MachineState *ms = MACHINE(obj); 666 667 g_free(ms->ram_memdev_id); 668 ms->ram_memdev_id = g_strdup(value); 669 } 670 671 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) 672 { 673 int i; 674 HotpluggableCPUList *head = NULL; 675 MachineClass *mc = MACHINE_GET_CLASS(machine); 676 677 /* force board to initialize possible_cpus if it hasn't been done yet */ 678 mc->possible_cpu_arch_ids(machine); 679 680 for (i = 0; i < machine->possible_cpus->len; i++) { 681 Object *cpu; 682 HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); 683 684 cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); 685 cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; 686 cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, 687 sizeof(*cpu_item->props)); 688 689 cpu = machine->possible_cpus->cpus[i].cpu; 690 if (cpu) { 691 cpu_item->has_qom_path = true; 692 cpu_item->qom_path = object_get_canonical_path(cpu); 693 } 694 QAPI_LIST_PREPEND(head, cpu_item); 695 } 696 return head; 697 } 698 699 /** 700 * machine_set_cpu_numa_node: 701 * @machine: machine object to modify 702 * @props: specifies which cpu objects to assign to 703 * numa node specified by @props.node_id 704 * @errp: if an error occurs, a pointer to an area to store the error 705 * 706 * Associate NUMA node specified by @props.node_id with cpu slots that 707 * match socket/core/thread-ids specified by @props. It's recommended to use 708 * query-hotpluggable-cpus.props values to specify affected cpu slots, 709 * which would lead to exact 1:1 mapping of cpu slots to NUMA node. 710 * 711 * However for CLI convenience it's possible to pass in subset of properties, 712 * which would affect all cpu slots that match it. 713 * Ex for pc machine: 714 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ 715 * -numa cpu,node-id=0,socket_id=0 \ 716 * -numa cpu,node-id=1,socket_id=1 717 * will assign all child cores of socket 0 to node 0 and 718 * of socket 1 to node 1. 719 * 720 * On attempt of reassigning (already assigned) cpu slot to another NUMA node, 721 * return error. 722 * Empty subset is disallowed and function will return with error in this case. 723 */ 724 void machine_set_cpu_numa_node(MachineState *machine, 725 const CpuInstanceProperties *props, Error **errp) 726 { 727 MachineClass *mc = MACHINE_GET_CLASS(machine); 728 NodeInfo *numa_info = machine->numa_state->nodes; 729 bool match = false; 730 int i; 731 732 if (!mc->possible_cpu_arch_ids) { 733 error_setg(errp, "mapping of CPUs to NUMA node is not supported"); 734 return; 735 } 736 737 /* disabling node mapping is not supported, forbid it */ 738 assert(props->has_node_id); 739 740 /* force board to initialize possible_cpus if it hasn't been done yet */ 741 mc->possible_cpu_arch_ids(machine); 742 743 for (i = 0; i < machine->possible_cpus->len; i++) { 744 CPUArchId *slot = &machine->possible_cpus->cpus[i]; 745 746 /* reject unsupported by board properties */ 747 if (props->has_thread_id && !slot->props.has_thread_id) { 748 error_setg(errp, "thread-id is not supported"); 749 return; 750 } 751 752 if (props->has_core_id && !slot->props.has_core_id) { 753 error_setg(errp, "core-id is not supported"); 754 return; 755 } 756 757 if (props->has_cluster_id && !slot->props.has_cluster_id) { 758 error_setg(errp, "cluster-id is not supported"); 759 return; 760 } 761 762 if (props->has_socket_id && !slot->props.has_socket_id) { 763 error_setg(errp, "socket-id is not supported"); 764 return; 765 } 766 767 if (props->has_die_id && !slot->props.has_die_id) { 768 error_setg(errp, "die-id is not supported"); 769 return; 770 } 771 772 /* skip slots with explicit mismatch */ 773 if (props->has_thread_id && props->thread_id != slot->props.thread_id) { 774 continue; 775 } 776 777 if (props->has_core_id && props->core_id != slot->props.core_id) { 778 continue; 779 } 780 781 if (props->has_cluster_id && 782 props->cluster_id != slot->props.cluster_id) { 783 continue; 784 } 785 786 if (props->has_die_id && props->die_id != slot->props.die_id) { 787 continue; 788 } 789 790 if (props->has_socket_id && props->socket_id != slot->props.socket_id) { 791 continue; 792 } 793 794 /* reject assignment if slot is already assigned, for compatibility 795 * of legacy cpu_index mapping with SPAPR core based mapping do not 796 * error out if cpu thread and matched core have the same node-id */ 797 if (slot->props.has_node_id && 798 slot->props.node_id != props->node_id) { 799 error_setg(errp, "CPU is already assigned to node-id: %" PRId64, 800 slot->props.node_id); 801 return; 802 } 803 804 /* assign slot to node as it's matched '-numa cpu' key */ 805 match = true; 806 slot->props.node_id = props->node_id; 807 slot->props.has_node_id = props->has_node_id; 808 809 if (machine->numa_state->hmat_enabled) { 810 if ((numa_info[props->node_id].initiator < MAX_NODES) && 811 (props->node_id != numa_info[props->node_id].initiator)) { 812 error_setg(errp, "The initiator of CPU NUMA node %" PRId64 813 " should be itself (got %" PRIu16 ")", 814 props->node_id, numa_info[props->node_id].initiator); 815 return; 816 } 817 numa_info[props->node_id].has_cpu = true; 818 numa_info[props->node_id].initiator = props->node_id; 819 } 820 } 821 822 if (!match) { 823 error_setg(errp, "no match found"); 824 } 825 } 826 827 static void machine_get_smp(Object *obj, Visitor *v, const char *name, 828 void *opaque, Error **errp) 829 { 830 MachineState *ms = MACHINE(obj); 831 SMPConfiguration *config = &(SMPConfiguration){ 832 .has_cpus = true, .cpus = ms->smp.cpus, 833 .has_sockets = true, .sockets = ms->smp.sockets, 834 .has_dies = true, .dies = ms->smp.dies, 835 .has_clusters = true, .clusters = ms->smp.clusters, 836 .has_cores = true, .cores = ms->smp.cores, 837 .has_threads = true, .threads = ms->smp.threads, 838 .has_maxcpus = true, .maxcpus = ms->smp.max_cpus, 839 }; 840 841 if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) { 842 return; 843 } 844 } 845 846 static void machine_set_smp(Object *obj, Visitor *v, const char *name, 847 void *opaque, Error **errp) 848 { 849 MachineState *ms = MACHINE(obj); 850 g_autoptr(SMPConfiguration) config = NULL; 851 852 if (!visit_type_SMPConfiguration(v, name, &config, errp)) { 853 return; 854 } 855 856 machine_parse_smp_config(ms, config, errp); 857 } 858 859 static void machine_get_boot(Object *obj, Visitor *v, const char *name, 860 void *opaque, Error **errp) 861 { 862 MachineState *ms = MACHINE(obj); 863 BootConfiguration *config = &ms->boot_config; 864 visit_type_BootConfiguration(v, name, &config, &error_abort); 865 } 866 867 static void machine_free_boot_config(MachineState *ms) 868 { 869 g_free(ms->boot_config.order); 870 g_free(ms->boot_config.once); 871 g_free(ms->boot_config.splash); 872 } 873 874 static void machine_copy_boot_config(MachineState *ms, BootConfiguration *config) 875 { 876 MachineClass *machine_class = MACHINE_GET_CLASS(ms); 877 878 machine_free_boot_config(ms); 879 ms->boot_config = *config; 880 if (!config->has_order) { 881 ms->boot_config.has_order = true; 882 ms->boot_config.order = g_strdup(machine_class->default_boot_order); 883 } 884 } 885 886 static void machine_set_boot(Object *obj, Visitor *v, const char *name, 887 void *opaque, Error **errp) 888 { 889 ERRP_GUARD(); 890 MachineState *ms = MACHINE(obj); 891 BootConfiguration *config = NULL; 892 893 if (!visit_type_BootConfiguration(v, name, &config, errp)) { 894 return; 895 } 896 if (config->has_order) { 897 validate_bootdevices(config->order, errp); 898 if (*errp) { 899 goto out_free; 900 } 901 } 902 if (config->has_once) { 903 validate_bootdevices(config->once, errp); 904 if (*errp) { 905 goto out_free; 906 } 907 } 908 909 machine_copy_boot_config(ms, config); 910 /* Strings live in ms->boot_config. */ 911 free(config); 912 return; 913 914 out_free: 915 qapi_free_BootConfiguration(config); 916 } 917 918 static void machine_class_init(ObjectClass *oc, void *data) 919 { 920 MachineClass *mc = MACHINE_CLASS(oc); 921 922 /* Default 128 MB as guest ram size */ 923 mc->default_ram_size = 128 * MiB; 924 mc->rom_file_has_mr = true; 925 926 /* numa node memory size aligned on 8MB by default. 927 * On Linux, each node's border has to be 8MB aligned 928 */ 929 mc->numa_mem_align_shift = 23; 930 931 object_class_property_add_str(oc, "kernel", 932 machine_get_kernel, machine_set_kernel); 933 object_class_property_set_description(oc, "kernel", 934 "Linux kernel image file"); 935 936 object_class_property_add_str(oc, "initrd", 937 machine_get_initrd, machine_set_initrd); 938 object_class_property_set_description(oc, "initrd", 939 "Linux initial ramdisk file"); 940 941 object_class_property_add_str(oc, "append", 942 machine_get_append, machine_set_append); 943 object_class_property_set_description(oc, "append", 944 "Linux kernel command line"); 945 946 object_class_property_add_str(oc, "dtb", 947 machine_get_dtb, machine_set_dtb); 948 object_class_property_set_description(oc, "dtb", 949 "Linux kernel device tree file"); 950 951 object_class_property_add_str(oc, "dumpdtb", 952 machine_get_dumpdtb, machine_set_dumpdtb); 953 object_class_property_set_description(oc, "dumpdtb", 954 "Dump current dtb to a file and quit"); 955 956 object_class_property_add(oc, "boot", "BootConfiguration", 957 machine_get_boot, machine_set_boot, 958 NULL, NULL); 959 object_class_property_set_description(oc, "boot", 960 "Boot configuration"); 961 962 object_class_property_add(oc, "smp", "SMPConfiguration", 963 machine_get_smp, machine_set_smp, 964 NULL, NULL); 965 object_class_property_set_description(oc, "smp", 966 "CPU topology"); 967 968 object_class_property_add(oc, "phandle-start", "int", 969 machine_get_phandle_start, machine_set_phandle_start, 970 NULL, NULL); 971 object_class_property_set_description(oc, "phandle-start", 972 "The first phandle ID we may generate dynamically"); 973 974 object_class_property_add_str(oc, "dt-compatible", 975 machine_get_dt_compatible, machine_set_dt_compatible); 976 object_class_property_set_description(oc, "dt-compatible", 977 "Overrides the \"compatible\" property of the dt root node"); 978 979 object_class_property_add_bool(oc, "dump-guest-core", 980 machine_get_dump_guest_core, machine_set_dump_guest_core); 981 object_class_property_set_description(oc, "dump-guest-core", 982 "Include guest memory in a core dump"); 983 984 object_class_property_add_bool(oc, "mem-merge", 985 machine_get_mem_merge, machine_set_mem_merge); 986 object_class_property_set_description(oc, "mem-merge", 987 "Enable/disable memory merge support"); 988 989 object_class_property_add_bool(oc, "usb", 990 machine_get_usb, machine_set_usb); 991 object_class_property_set_description(oc, "usb", 992 "Set on/off to enable/disable usb"); 993 994 object_class_property_add_bool(oc, "graphics", 995 machine_get_graphics, machine_set_graphics); 996 object_class_property_set_description(oc, "graphics", 997 "Set on/off to enable/disable graphics emulation"); 998 999 object_class_property_add_str(oc, "firmware", 1000 machine_get_firmware, machine_set_firmware); 1001 object_class_property_set_description(oc, "firmware", 1002 "Firmware image"); 1003 1004 object_class_property_add_bool(oc, "suppress-vmdesc", 1005 machine_get_suppress_vmdesc, machine_set_suppress_vmdesc); 1006 object_class_property_set_description(oc, "suppress-vmdesc", 1007 "Set on to disable self-describing migration"); 1008 1009 object_class_property_add_link(oc, "confidential-guest-support", 1010 TYPE_CONFIDENTIAL_GUEST_SUPPORT, 1011 offsetof(MachineState, cgs), 1012 machine_check_confidential_guest_support, 1013 OBJ_PROP_LINK_STRONG); 1014 object_class_property_set_description(oc, "confidential-guest-support", 1015 "Set confidential guest scheme to support"); 1016 1017 /* For compatibility */ 1018 object_class_property_add_str(oc, "memory-encryption", 1019 machine_get_memory_encryption, machine_set_memory_encryption); 1020 object_class_property_set_description(oc, "memory-encryption", 1021 "Set memory encryption object to use"); 1022 1023 object_class_property_add_str(oc, "memory-backend", 1024 machine_get_memdev, machine_set_memdev); 1025 object_class_property_set_description(oc, "memory-backend", 1026 "Set RAM backend" 1027 "Valid value is ID of hostmem based backend"); 1028 1029 object_class_property_add(oc, "memory", "MemorySizeConfiguration", 1030 machine_get_mem, machine_set_mem, 1031 NULL, NULL); 1032 object_class_property_set_description(oc, "memory", 1033 "Memory size configuration"); 1034 } 1035 1036 static void machine_class_base_init(ObjectClass *oc, void *data) 1037 { 1038 MachineClass *mc = MACHINE_CLASS(oc); 1039 mc->max_cpus = mc->max_cpus ?: 1; 1040 mc->min_cpus = mc->min_cpus ?: 1; 1041 mc->default_cpus = mc->default_cpus ?: 1; 1042 1043 if (!object_class_is_abstract(oc)) { 1044 const char *cname = object_class_get_name(oc); 1045 assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); 1046 mc->name = g_strndup(cname, 1047 strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); 1048 mc->compat_props = g_ptr_array_new(); 1049 } 1050 } 1051 1052 static void machine_initfn(Object *obj) 1053 { 1054 MachineState *ms = MACHINE(obj); 1055 MachineClass *mc = MACHINE_GET_CLASS(obj); 1056 1057 container_get(obj, "/peripheral"); 1058 container_get(obj, "/peripheral-anon"); 1059 1060 ms->dump_guest_core = true; 1061 ms->mem_merge = true; 1062 ms->enable_graphics = true; 1063 ms->kernel_cmdline = g_strdup(""); 1064 ms->ram_size = mc->default_ram_size; 1065 ms->maxram_size = mc->default_ram_size; 1066 1067 if (mc->nvdimm_supported) { 1068 Object *obj = OBJECT(ms); 1069 1070 ms->nvdimms_state = g_new0(NVDIMMState, 1); 1071 object_property_add_bool(obj, "nvdimm", 1072 machine_get_nvdimm, machine_set_nvdimm); 1073 object_property_set_description(obj, "nvdimm", 1074 "Set on/off to enable/disable " 1075 "NVDIMM instantiation"); 1076 1077 object_property_add_str(obj, "nvdimm-persistence", 1078 machine_get_nvdimm_persistence, 1079 machine_set_nvdimm_persistence); 1080 object_property_set_description(obj, "nvdimm-persistence", 1081 "Set NVDIMM persistence" 1082 "Valid values are cpu, mem-ctrl"); 1083 } 1084 1085 if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { 1086 ms->numa_state = g_new0(NumaState, 1); 1087 object_property_add_bool(obj, "hmat", 1088 machine_get_hmat, machine_set_hmat); 1089 object_property_set_description(obj, "hmat", 1090 "Set on/off to enable/disable " 1091 "ACPI Heterogeneous Memory Attribute " 1092 "Table (HMAT)"); 1093 } 1094 1095 /* default to mc->default_cpus */ 1096 ms->smp.cpus = mc->default_cpus; 1097 ms->smp.max_cpus = mc->default_cpus; 1098 ms->smp.sockets = 1; 1099 ms->smp.dies = 1; 1100 ms->smp.clusters = 1; 1101 ms->smp.cores = 1; 1102 ms->smp.threads = 1; 1103 1104 machine_copy_boot_config(ms, &(BootConfiguration){ 0 }); 1105 } 1106 1107 static void machine_finalize(Object *obj) 1108 { 1109 MachineState *ms = MACHINE(obj); 1110 1111 machine_free_boot_config(ms); 1112 g_free(ms->kernel_filename); 1113 g_free(ms->initrd_filename); 1114 g_free(ms->kernel_cmdline); 1115 g_free(ms->dtb); 1116 g_free(ms->dumpdtb); 1117 g_free(ms->dt_compatible); 1118 g_free(ms->firmware); 1119 g_free(ms->device_memory); 1120 g_free(ms->nvdimms_state); 1121 g_free(ms->numa_state); 1122 } 1123 1124 bool machine_usb(MachineState *machine) 1125 { 1126 return machine->usb; 1127 } 1128 1129 int machine_phandle_start(MachineState *machine) 1130 { 1131 return machine->phandle_start; 1132 } 1133 1134 bool machine_dump_guest_core(MachineState *machine) 1135 { 1136 return machine->dump_guest_core; 1137 } 1138 1139 bool machine_mem_merge(MachineState *machine) 1140 { 1141 return machine->mem_merge; 1142 } 1143 1144 static char *cpu_slot_to_string(const CPUArchId *cpu) 1145 { 1146 GString *s = g_string_new(NULL); 1147 if (cpu->props.has_socket_id) { 1148 g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); 1149 } 1150 if (cpu->props.has_die_id) { 1151 if (s->len) { 1152 g_string_append_printf(s, ", "); 1153 } 1154 g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id); 1155 } 1156 if (cpu->props.has_cluster_id) { 1157 if (s->len) { 1158 g_string_append_printf(s, ", "); 1159 } 1160 g_string_append_printf(s, "cluster-id: %"PRId64, cpu->props.cluster_id); 1161 } 1162 if (cpu->props.has_core_id) { 1163 if (s->len) { 1164 g_string_append_printf(s, ", "); 1165 } 1166 g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); 1167 } 1168 if (cpu->props.has_thread_id) { 1169 if (s->len) { 1170 g_string_append_printf(s, ", "); 1171 } 1172 g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); 1173 } 1174 return g_string_free(s, false); 1175 } 1176 1177 static void numa_validate_initiator(NumaState *numa_state) 1178 { 1179 int i; 1180 NodeInfo *numa_info = numa_state->nodes; 1181 1182 for (i = 0; i < numa_state->num_nodes; i++) { 1183 if (numa_info[i].initiator == MAX_NODES) { 1184 error_report("The initiator of NUMA node %d is missing, use " 1185 "'-numa node,initiator' option to declare it", i); 1186 exit(1); 1187 } 1188 1189 if (!numa_info[numa_info[i].initiator].present) { 1190 error_report("NUMA node %" PRIu16 " is missing, use " 1191 "'-numa node' option to declare it first", 1192 numa_info[i].initiator); 1193 exit(1); 1194 } 1195 1196 if (!numa_info[numa_info[i].initiator].has_cpu) { 1197 error_report("The initiator of NUMA node %d is invalid", i); 1198 exit(1); 1199 } 1200 } 1201 } 1202 1203 static void machine_numa_finish_cpu_init(MachineState *machine) 1204 { 1205 int i; 1206 bool default_mapping; 1207 GString *s = g_string_new(NULL); 1208 MachineClass *mc = MACHINE_GET_CLASS(machine); 1209 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); 1210 1211 assert(machine->numa_state->num_nodes); 1212 for (i = 0; i < possible_cpus->len; i++) { 1213 if (possible_cpus->cpus[i].props.has_node_id) { 1214 break; 1215 } 1216 } 1217 default_mapping = (i == possible_cpus->len); 1218 1219 for (i = 0; i < possible_cpus->len; i++) { 1220 const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; 1221 1222 if (!cpu_slot->props.has_node_id) { 1223 /* fetch default mapping from board and enable it */ 1224 CpuInstanceProperties props = cpu_slot->props; 1225 1226 props.node_id = mc->get_default_cpu_node_id(machine, i); 1227 if (!default_mapping) { 1228 /* record slots with not set mapping, 1229 * TODO: make it hard error in future */ 1230 char *cpu_str = cpu_slot_to_string(cpu_slot); 1231 g_string_append_printf(s, "%sCPU %d [%s]", 1232 s->len ? ", " : "", i, cpu_str); 1233 g_free(cpu_str); 1234 1235 /* non mapped cpus used to fallback to node 0 */ 1236 props.node_id = 0; 1237 } 1238 1239 props.has_node_id = true; 1240 machine_set_cpu_numa_node(machine, &props, &error_fatal); 1241 } 1242 } 1243 1244 if (machine->numa_state->hmat_enabled) { 1245 numa_validate_initiator(machine->numa_state); 1246 } 1247 1248 if (s->len && !qtest_enabled()) { 1249 warn_report("CPU(s) not present in any NUMA nodes: %s", 1250 s->str); 1251 warn_report("All CPU(s) up to maxcpus should be described " 1252 "in NUMA config, ability to start up with partial NUMA " 1253 "mappings is obsoleted and will be removed in future"); 1254 } 1255 g_string_free(s, true); 1256 } 1257 1258 MemoryRegion *machine_consume_memdev(MachineState *machine, 1259 HostMemoryBackend *backend) 1260 { 1261 MemoryRegion *ret = host_memory_backend_get_memory(backend); 1262 1263 if (host_memory_backend_is_mapped(backend)) { 1264 error_report("memory backend %s can't be used multiple times.", 1265 object_get_canonical_path_component(OBJECT(backend))); 1266 exit(EXIT_FAILURE); 1267 } 1268 host_memory_backend_set_mapped(backend, true); 1269 vmstate_register_ram_global(ret); 1270 return ret; 1271 } 1272 1273 void machine_run_board_init(MachineState *machine) 1274 { 1275 MachineClass *machine_class = MACHINE_GET_CLASS(machine); 1276 ObjectClass *oc = object_class_by_name(machine->cpu_type); 1277 CPUClass *cc; 1278 1279 /* This checkpoint is required by replay to separate prior clock 1280 reading from the other reads, because timer polling functions query 1281 clock values from the log. */ 1282 replay_checkpoint(CHECKPOINT_INIT); 1283 1284 if (machine->ram_memdev_id) { 1285 Object *o; 1286 o = object_resolve_path_type(machine->ram_memdev_id, 1287 TYPE_MEMORY_BACKEND, NULL); 1288 machine->ram = machine_consume_memdev(machine, MEMORY_BACKEND(o)); 1289 } 1290 1291 if (machine->numa_state) { 1292 numa_complete_configuration(machine); 1293 if (machine->numa_state->num_nodes) { 1294 machine_numa_finish_cpu_init(machine); 1295 } 1296 } 1297 1298 /* If the machine supports the valid_cpu_types check and the user 1299 * specified a CPU with -cpu check here that the user CPU is supported. 1300 */ 1301 if (machine_class->valid_cpu_types && machine->cpu_type) { 1302 int i; 1303 1304 for (i = 0; machine_class->valid_cpu_types[i]; i++) { 1305 if (object_class_dynamic_cast(oc, 1306 machine_class->valid_cpu_types[i])) { 1307 /* The user specificed CPU is in the valid field, we are 1308 * good to go. 1309 */ 1310 break; 1311 } 1312 } 1313 1314 if (!machine_class->valid_cpu_types[i]) { 1315 /* The user specified CPU is not valid */ 1316 error_report("Invalid CPU type: %s", machine->cpu_type); 1317 error_printf("The valid types are: %s", 1318 machine_class->valid_cpu_types[0]); 1319 for (i = 1; machine_class->valid_cpu_types[i]; i++) { 1320 error_printf(", %s", machine_class->valid_cpu_types[i]); 1321 } 1322 error_printf("\n"); 1323 1324 exit(1); 1325 } 1326 } 1327 1328 /* Check if CPU type is deprecated and warn if so */ 1329 cc = CPU_CLASS(oc); 1330 if (cc && cc->deprecation_note) { 1331 warn_report("CPU model %s is deprecated -- %s", machine->cpu_type, 1332 cc->deprecation_note); 1333 } 1334 1335 if (machine->cgs) { 1336 /* 1337 * With confidential guests, the host can't see the real 1338 * contents of RAM, so there's no point in it trying to merge 1339 * areas. 1340 */ 1341 machine_set_mem_merge(OBJECT(machine), false, &error_abort); 1342 1343 /* 1344 * Virtio devices can't count on directly accessing guest 1345 * memory, so they need iommu_platform=on to use normal DMA 1346 * mechanisms. That requires also disabling legacy virtio 1347 * support for those virtio pci devices which allow it. 1348 */ 1349 object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy", 1350 "on", true); 1351 object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform", 1352 "on", false); 1353 } 1354 1355 accel_init_interfaces(ACCEL_GET_CLASS(machine->accelerator)); 1356 machine_class->init(machine); 1357 phase_advance(PHASE_MACHINE_INITIALIZED); 1358 } 1359 1360 static NotifierList machine_init_done_notifiers = 1361 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers); 1362 1363 void qemu_add_machine_init_done_notifier(Notifier *notify) 1364 { 1365 notifier_list_add(&machine_init_done_notifiers, notify); 1366 if (phase_check(PHASE_MACHINE_READY)) { 1367 notify->notify(notify, NULL); 1368 } 1369 } 1370 1371 void qemu_remove_machine_init_done_notifier(Notifier *notify) 1372 { 1373 notifier_remove(notify); 1374 } 1375 1376 void qdev_machine_creation_done(void) 1377 { 1378 cpu_synchronize_all_post_init(); 1379 1380 if (current_machine->boot_config.has_once) { 1381 qemu_boot_set(current_machine->boot_config.once, &error_fatal); 1382 qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_config.order)); 1383 } 1384 1385 /* 1386 * ok, initial machine setup is done, starting from now we can 1387 * only create hotpluggable devices 1388 */ 1389 phase_advance(PHASE_MACHINE_READY); 1390 qdev_assert_realized_properly(); 1391 1392 /* TODO: once all bus devices are qdevified, this should be done 1393 * when bus is created by qdev.c */ 1394 /* 1395 * TODO: If we had a main 'reset container' that the whole system 1396 * lived in, we could reset that using the multi-phase reset 1397 * APIs. For the moment, we just reset the sysbus, which will cause 1398 * all devices hanging off it (and all their child buses, recursively) 1399 * to be reset. Note that this will *not* reset any Device objects 1400 * which are not attached to some part of the qbus tree! 1401 */ 1402 qemu_register_reset(resettable_cold_reset_fn, sysbus_get_default()); 1403 1404 notifier_list_notify(&machine_init_done_notifiers, NULL); 1405 1406 if (rom_check_and_register_reset() != 0) { 1407 exit(1); 1408 } 1409 1410 replay_start(); 1411 1412 /* This checkpoint is required by replay to separate prior clock 1413 reading from the other reads, because timer polling functions query 1414 clock values from the log. */ 1415 replay_checkpoint(CHECKPOINT_RESET); 1416 qemu_system_reset(SHUTDOWN_CAUSE_NONE); 1417 register_global_state(); 1418 } 1419 1420 static const TypeInfo machine_info = { 1421 .name = TYPE_MACHINE, 1422 .parent = TYPE_OBJECT, 1423 .abstract = true, 1424 .class_size = sizeof(MachineClass), 1425 .class_init = machine_class_init, 1426 .class_base_init = machine_class_base_init, 1427 .instance_size = sizeof(MachineState), 1428 .instance_init = machine_initfn, 1429 .instance_finalize = machine_finalize, 1430 }; 1431 1432 static void machine_register_types(void) 1433 { 1434 type_register_static(&machine_info); 1435 } 1436 1437 type_init(machine_register_types) 1438