xref: /openbmc/qemu/hw/core/machine.c (revision a0258e4afa10a8e9dba4901b7a8202dac24c72e2)
1 /*
2  * QEMU Machine
3  *
4  * Copyright (C) 2014 Red Hat Inc
5  *
6  * Authors:
7  *   Marcel Apfelbaum <marcel.a@redhat.com>
8  *
9  * This work is licensed under the terms of the GNU GPL, version 2 or later.
10  * See the COPYING file in the top-level directory.
11  */
12 
13 #include "qemu/osdep.h"
14 #include "qemu/option.h"
15 #include "qapi/qmp/qerror.h"
16 #include "sysemu/replay.h"
17 #include "qemu/units.h"
18 #include "hw/boards.h"
19 #include "qapi/error.h"
20 #include "qapi/qapi-visit-common.h"
21 #include "qapi/visitor.h"
22 #include "hw/sysbus.h"
23 #include "sysemu/sysemu.h"
24 #include "sysemu/numa.h"
25 #include "qemu/error-report.h"
26 #include "sysemu/qtest.h"
27 #include "hw/pci/pci.h"
28 #include "hw/mem/nvdimm.h"
29 #include "migration/vmstate.h"
30 
31 GlobalProperty hw_compat_4_2[] = {
32     { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
33     { "virtio-blk-device", "seg-max-adjust", "off"},
34     { "virtio-scsi-device", "seg_max_adjust", "off"},
35     { "vhost-blk-device", "seg_max_adjust", "off"},
36     { "usb-host", "suppress-remote-wake", "off" },
37     { "usb-redir", "suppress-remote-wake", "off" },
38     { "qxl", "revision", "4" },
39     { "qxl-vga", "revision", "4" },
40 };
41 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2);
42 
43 GlobalProperty hw_compat_4_1[] = {
44     { "virtio-pci", "x-pcie-flr-init", "off" },
45     { "virtio-device", "use-disabled-flag", "false" },
46 };
47 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1);
48 
49 GlobalProperty hw_compat_4_0[] = {
50     { "VGA",            "edid", "false" },
51     { "secondary-vga",  "edid", "false" },
52     { "bochs-display",  "edid", "false" },
53     { "virtio-vga",     "edid", "false" },
54     { "virtio-gpu",     "edid", "false" },
55     { "virtio-device", "use-started", "false" },
56     { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
57     { "pl031", "migrate-tick-offset", "false" },
58 };
59 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0);
60 
61 GlobalProperty hw_compat_3_1[] = {
62     { "pcie-root-port", "x-speed", "2_5" },
63     { "pcie-root-port", "x-width", "1" },
64     { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
65     { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
66     { "tpm-crb", "ppi", "false" },
67     { "tpm-tis", "ppi", "false" },
68     { "usb-kbd", "serial", "42" },
69     { "usb-mouse", "serial", "42" },
70     { "usb-tablet", "serial", "42" },
71     { "virtio-blk-device", "discard", "false" },
72     { "virtio-blk-device", "write-zeroes", "false" },
73     { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
74     { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
75 };
76 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1);
77 
78 GlobalProperty hw_compat_3_0[] = {};
79 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0);
80 
81 GlobalProperty hw_compat_2_12[] = {
82     { "migration", "decompress-error-check", "off" },
83     { "hda-audio", "use-timer", "false" },
84     { "cirrus-vga", "global-vmstate", "true" },
85     { "VGA", "global-vmstate", "true" },
86     { "vmware-svga", "global-vmstate", "true" },
87     { "qxl-vga", "global-vmstate", "true" },
88 };
89 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12);
90 
91 GlobalProperty hw_compat_2_11[] = {
92     { "hpet", "hpet-offset-saved", "false" },
93     { "virtio-blk-pci", "vectors", "2" },
94     { "vhost-user-blk-pci", "vectors", "2" },
95     { "e1000", "migrate_tso_props", "off" },
96 };
97 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11);
98 
99 GlobalProperty hw_compat_2_10[] = {
100     { "virtio-mouse-device", "wheel-axis", "false" },
101     { "virtio-tablet-device", "wheel-axis", "false" },
102 };
103 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10);
104 
105 GlobalProperty hw_compat_2_9[] = {
106     { "pci-bridge", "shpc", "off" },
107     { "intel-iommu", "pt", "off" },
108     { "virtio-net-device", "x-mtu-bypass-backend", "off" },
109     { "pcie-root-port", "x-migrate-msix", "false" },
110 };
111 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9);
112 
113 GlobalProperty hw_compat_2_8[] = {
114     { "fw_cfg_mem", "x-file-slots", "0x10" },
115     { "fw_cfg_io", "x-file-slots", "0x10" },
116     { "pflash_cfi01", "old-multiple-chip-handling", "on" },
117     { "pci-bridge", "shpc", "on" },
118     { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" },
119     { "virtio-pci", "x-pcie-deverr-init", "off" },
120     { "virtio-pci", "x-pcie-lnkctl-init", "off" },
121     { "virtio-pci", "x-pcie-pm-init", "off" },
122     { "cirrus-vga", "vgamem_mb", "8" },
123     { "isa-cirrus-vga", "vgamem_mb", "8" },
124 };
125 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8);
126 
127 GlobalProperty hw_compat_2_7[] = {
128     { "virtio-pci", "page-per-vq", "on" },
129     { "virtio-serial-device", "emergency-write", "off" },
130     { "ioapic", "version", "0x11" },
131     { "intel-iommu", "x-buggy-eim", "true" },
132     { "virtio-pci", "x-ignore-backend-features", "on" },
133 };
134 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7);
135 
136 GlobalProperty hw_compat_2_6[] = {
137     { "virtio-mmio", "format_transport_address", "off" },
138     /* Optional because not all virtio-pci devices support legacy mode */
139     { "virtio-pci", "disable-modern", "on",  .optional = true },
140     { "virtio-pci", "disable-legacy", "off", .optional = true },
141 };
142 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6);
143 
144 GlobalProperty hw_compat_2_5[] = {
145     { "isa-fdc", "fallback", "144" },
146     { "pvscsi", "x-old-pci-configuration", "on" },
147     { "pvscsi", "x-disable-pcie", "on" },
148     { "vmxnet3", "x-old-msi-offsets", "on" },
149     { "vmxnet3", "x-disable-pcie", "on" },
150 };
151 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5);
152 
153 GlobalProperty hw_compat_2_4[] = {
154     /* Optional because the 'scsi' property is Linux-only */
155     { "virtio-blk-device", "scsi", "true", .optional = true },
156     { "e1000", "extra_mac_registers", "off" },
157     { "virtio-pci", "x-disable-pcie", "on" },
158     { "virtio-pci", "migrate-extra", "off" },
159     { "fw_cfg_mem", "dma_enabled", "off" },
160     { "fw_cfg_io", "dma_enabled", "off" }
161 };
162 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4);
163 
164 GlobalProperty hw_compat_2_3[] = {
165     { "virtio-blk-pci", "any_layout", "off" },
166     { "virtio-balloon-pci", "any_layout", "off" },
167     { "virtio-serial-pci", "any_layout", "off" },
168     { "virtio-9p-pci", "any_layout", "off" },
169     { "virtio-rng-pci", "any_layout", "off" },
170     { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" },
171     { "migration", "send-configuration", "off" },
172     { "migration", "send-section-footer", "off" },
173     { "migration", "store-global-state", "off" },
174 };
175 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3);
176 
177 GlobalProperty hw_compat_2_2[] = {};
178 const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2);
179 
180 GlobalProperty hw_compat_2_1[] = {
181     { "intel-hda", "old_msi_addr", "on" },
182     { "VGA", "qemu-extended-regs", "off" },
183     { "secondary-vga", "qemu-extended-regs", "off" },
184     { "virtio-scsi-pci", "any_layout", "off" },
185     { "usb-mouse", "usb_version", "1" },
186     { "usb-kbd", "usb_version", "1" },
187     { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
188 };
189 const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1);
190 
191 static char *machine_get_kernel(Object *obj, Error **errp)
192 {
193     MachineState *ms = MACHINE(obj);
194 
195     return g_strdup(ms->kernel_filename);
196 }
197 
198 static void machine_set_kernel(Object *obj, const char *value, Error **errp)
199 {
200     MachineState *ms = MACHINE(obj);
201 
202     g_free(ms->kernel_filename);
203     ms->kernel_filename = g_strdup(value);
204 }
205 
206 static char *machine_get_initrd(Object *obj, Error **errp)
207 {
208     MachineState *ms = MACHINE(obj);
209 
210     return g_strdup(ms->initrd_filename);
211 }
212 
213 static void machine_set_initrd(Object *obj, const char *value, Error **errp)
214 {
215     MachineState *ms = MACHINE(obj);
216 
217     g_free(ms->initrd_filename);
218     ms->initrd_filename = g_strdup(value);
219 }
220 
221 static char *machine_get_append(Object *obj, Error **errp)
222 {
223     MachineState *ms = MACHINE(obj);
224 
225     return g_strdup(ms->kernel_cmdline);
226 }
227 
228 static void machine_set_append(Object *obj, const char *value, Error **errp)
229 {
230     MachineState *ms = MACHINE(obj);
231 
232     g_free(ms->kernel_cmdline);
233     ms->kernel_cmdline = g_strdup(value);
234 }
235 
236 static char *machine_get_dtb(Object *obj, Error **errp)
237 {
238     MachineState *ms = MACHINE(obj);
239 
240     return g_strdup(ms->dtb);
241 }
242 
243 static void machine_set_dtb(Object *obj, const char *value, Error **errp)
244 {
245     MachineState *ms = MACHINE(obj);
246 
247     g_free(ms->dtb);
248     ms->dtb = g_strdup(value);
249 }
250 
251 static char *machine_get_dumpdtb(Object *obj, Error **errp)
252 {
253     MachineState *ms = MACHINE(obj);
254 
255     return g_strdup(ms->dumpdtb);
256 }
257 
258 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp)
259 {
260     MachineState *ms = MACHINE(obj);
261 
262     g_free(ms->dumpdtb);
263     ms->dumpdtb = g_strdup(value);
264 }
265 
266 static void machine_get_phandle_start(Object *obj, Visitor *v,
267                                       const char *name, void *opaque,
268                                       Error **errp)
269 {
270     MachineState *ms = MACHINE(obj);
271     int64_t value = ms->phandle_start;
272 
273     visit_type_int(v, name, &value, errp);
274 }
275 
276 static void machine_set_phandle_start(Object *obj, Visitor *v,
277                                       const char *name, void *opaque,
278                                       Error **errp)
279 {
280     MachineState *ms = MACHINE(obj);
281     Error *error = NULL;
282     int64_t value;
283 
284     visit_type_int(v, name, &value, &error);
285     if (error) {
286         error_propagate(errp, error);
287         return;
288     }
289 
290     ms->phandle_start = value;
291 }
292 
293 static char *machine_get_dt_compatible(Object *obj, Error **errp)
294 {
295     MachineState *ms = MACHINE(obj);
296 
297     return g_strdup(ms->dt_compatible);
298 }
299 
300 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp)
301 {
302     MachineState *ms = MACHINE(obj);
303 
304     g_free(ms->dt_compatible);
305     ms->dt_compatible = g_strdup(value);
306 }
307 
308 static bool machine_get_dump_guest_core(Object *obj, Error **errp)
309 {
310     MachineState *ms = MACHINE(obj);
311 
312     return ms->dump_guest_core;
313 }
314 
315 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp)
316 {
317     MachineState *ms = MACHINE(obj);
318 
319     ms->dump_guest_core = value;
320 }
321 
322 static bool machine_get_mem_merge(Object *obj, Error **errp)
323 {
324     MachineState *ms = MACHINE(obj);
325 
326     return ms->mem_merge;
327 }
328 
329 static void machine_set_mem_merge(Object *obj, bool value, Error **errp)
330 {
331     MachineState *ms = MACHINE(obj);
332 
333     ms->mem_merge = value;
334 }
335 
336 static bool machine_get_usb(Object *obj, Error **errp)
337 {
338     MachineState *ms = MACHINE(obj);
339 
340     return ms->usb;
341 }
342 
343 static void machine_set_usb(Object *obj, bool value, Error **errp)
344 {
345     MachineState *ms = MACHINE(obj);
346 
347     ms->usb = value;
348     ms->usb_disabled = !value;
349 }
350 
351 static bool machine_get_graphics(Object *obj, Error **errp)
352 {
353     MachineState *ms = MACHINE(obj);
354 
355     return ms->enable_graphics;
356 }
357 
358 static void machine_set_graphics(Object *obj, bool value, Error **errp)
359 {
360     MachineState *ms = MACHINE(obj);
361 
362     ms->enable_graphics = value;
363 }
364 
365 static char *machine_get_firmware(Object *obj, Error **errp)
366 {
367     MachineState *ms = MACHINE(obj);
368 
369     return g_strdup(ms->firmware);
370 }
371 
372 static void machine_set_firmware(Object *obj, const char *value, Error **errp)
373 {
374     MachineState *ms = MACHINE(obj);
375 
376     g_free(ms->firmware);
377     ms->firmware = g_strdup(value);
378 }
379 
380 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp)
381 {
382     MachineState *ms = MACHINE(obj);
383 
384     ms->suppress_vmdesc = value;
385 }
386 
387 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp)
388 {
389     MachineState *ms = MACHINE(obj);
390 
391     return ms->suppress_vmdesc;
392 }
393 
394 static void machine_set_enforce_config_section(Object *obj, bool value,
395                                              Error **errp)
396 {
397     MachineState *ms = MACHINE(obj);
398 
399     warn_report("enforce-config-section is deprecated, please use "
400                 "-global migration.send-configuration=on|off instead");
401 
402     ms->enforce_config_section = value;
403 }
404 
405 static bool machine_get_enforce_config_section(Object *obj, Error **errp)
406 {
407     MachineState *ms = MACHINE(obj);
408 
409     return ms->enforce_config_section;
410 }
411 
412 static char *machine_get_memory_encryption(Object *obj, Error **errp)
413 {
414     MachineState *ms = MACHINE(obj);
415 
416     return g_strdup(ms->memory_encryption);
417 }
418 
419 static void machine_set_memory_encryption(Object *obj, const char *value,
420                                         Error **errp)
421 {
422     MachineState *ms = MACHINE(obj);
423 
424     g_free(ms->memory_encryption);
425     ms->memory_encryption = g_strdup(value);
426 }
427 
428 static bool machine_get_nvdimm(Object *obj, Error **errp)
429 {
430     MachineState *ms = MACHINE(obj);
431 
432     return ms->nvdimms_state->is_enabled;
433 }
434 
435 static void machine_set_nvdimm(Object *obj, bool value, Error **errp)
436 {
437     MachineState *ms = MACHINE(obj);
438 
439     ms->nvdimms_state->is_enabled = value;
440 }
441 
442 static bool machine_get_hmat(Object *obj, Error **errp)
443 {
444     MachineState *ms = MACHINE(obj);
445 
446     return ms->numa_state->hmat_enabled;
447 }
448 
449 static void machine_set_hmat(Object *obj, bool value, Error **errp)
450 {
451     MachineState *ms = MACHINE(obj);
452 
453     ms->numa_state->hmat_enabled = value;
454 }
455 
456 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp)
457 {
458     MachineState *ms = MACHINE(obj);
459 
460     return g_strdup(ms->nvdimms_state->persistence_string);
461 }
462 
463 static void machine_set_nvdimm_persistence(Object *obj, const char *value,
464                                            Error **errp)
465 {
466     MachineState *ms = MACHINE(obj);
467     NVDIMMState *nvdimms_state = ms->nvdimms_state;
468 
469     if (strcmp(value, "cpu") == 0) {
470         nvdimms_state->persistence = 3;
471     } else if (strcmp(value, "mem-ctrl") == 0) {
472         nvdimms_state->persistence = 2;
473     } else {
474         error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option",
475                    value);
476         return;
477     }
478 
479     g_free(nvdimms_state->persistence_string);
480     nvdimms_state->persistence_string = g_strdup(value);
481 }
482 
483 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type)
484 {
485     strList *item = g_new0(strList, 1);
486 
487     item->value = g_strdup(type);
488     item->next = mc->allowed_dynamic_sysbus_devices;
489     mc->allowed_dynamic_sysbus_devices = item;
490 }
491 
492 static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque)
493 {
494     MachineState *machine = opaque;
495     MachineClass *mc = MACHINE_GET_CLASS(machine);
496     bool allowed = false;
497     strList *wl;
498 
499     for (wl = mc->allowed_dynamic_sysbus_devices;
500          !allowed && wl;
501          wl = wl->next) {
502         allowed |= !!object_dynamic_cast(OBJECT(sbdev), wl->value);
503     }
504 
505     if (!allowed) {
506         error_report("Option '-device %s' cannot be handled by this machine",
507                      object_class_get_name(object_get_class(OBJECT(sbdev))));
508         exit(1);
509     }
510 }
511 
512 static char *machine_get_memdev(Object *obj, Error **errp)
513 {
514     MachineState *ms = MACHINE(obj);
515 
516     return g_strdup(ms->ram_memdev_id);
517 }
518 
519 static void machine_set_memdev(Object *obj, const char *value, Error **errp)
520 {
521     MachineState *ms = MACHINE(obj);
522 
523     g_free(ms->ram_memdev_id);
524     ms->ram_memdev_id = g_strdup(value);
525 }
526 
527 
528 static void machine_init_notify(Notifier *notifier, void *data)
529 {
530     MachineState *machine = MACHINE(qdev_get_machine());
531 
532     /*
533      * Loop through all dynamically created sysbus devices and check if they are
534      * all allowed.  If a device is not allowed, error out.
535      */
536     foreach_dynamic_sysbus_device(validate_sysbus_device, machine);
537 }
538 
539 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine)
540 {
541     int i;
542     HotpluggableCPUList *head = NULL;
543     MachineClass *mc = MACHINE_GET_CLASS(machine);
544 
545     /* force board to initialize possible_cpus if it hasn't been done yet */
546     mc->possible_cpu_arch_ids(machine);
547 
548     for (i = 0; i < machine->possible_cpus->len; i++) {
549         Object *cpu;
550         HotpluggableCPUList *list_item = g_new0(typeof(*list_item), 1);
551         HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1);
552 
553         cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type);
554         cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count;
555         cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props,
556                                    sizeof(*cpu_item->props));
557 
558         cpu = machine->possible_cpus->cpus[i].cpu;
559         if (cpu) {
560             cpu_item->has_qom_path = true;
561             cpu_item->qom_path = object_get_canonical_path(cpu);
562         }
563         list_item->value = cpu_item;
564         list_item->next = head;
565         head = list_item;
566     }
567     return head;
568 }
569 
570 /**
571  * machine_set_cpu_numa_node:
572  * @machine: machine object to modify
573  * @props: specifies which cpu objects to assign to
574  *         numa node specified by @props.node_id
575  * @errp: if an error occurs, a pointer to an area to store the error
576  *
577  * Associate NUMA node specified by @props.node_id with cpu slots that
578  * match socket/core/thread-ids specified by @props. It's recommended to use
579  * query-hotpluggable-cpus.props values to specify affected cpu slots,
580  * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
581  *
582  * However for CLI convenience it's possible to pass in subset of properties,
583  * which would affect all cpu slots that match it.
584  * Ex for pc machine:
585  *    -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
586  *    -numa cpu,node-id=0,socket_id=0 \
587  *    -numa cpu,node-id=1,socket_id=1
588  * will assign all child cores of socket 0 to node 0 and
589  * of socket 1 to node 1.
590  *
591  * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
592  * return error.
593  * Empty subset is disallowed and function will return with error in this case.
594  */
595 void machine_set_cpu_numa_node(MachineState *machine,
596                                const CpuInstanceProperties *props, Error **errp)
597 {
598     MachineClass *mc = MACHINE_GET_CLASS(machine);
599     NodeInfo *numa_info = machine->numa_state->nodes;
600     bool match = false;
601     int i;
602 
603     if (!mc->possible_cpu_arch_ids) {
604         error_setg(errp, "mapping of CPUs to NUMA node is not supported");
605         return;
606     }
607 
608     /* disabling node mapping is not supported, forbid it */
609     assert(props->has_node_id);
610 
611     /* force board to initialize possible_cpus if it hasn't been done yet */
612     mc->possible_cpu_arch_ids(machine);
613 
614     for (i = 0; i < machine->possible_cpus->len; i++) {
615         CPUArchId *slot = &machine->possible_cpus->cpus[i];
616 
617         /* reject unsupported by board properties */
618         if (props->has_thread_id && !slot->props.has_thread_id) {
619             error_setg(errp, "thread-id is not supported");
620             return;
621         }
622 
623         if (props->has_core_id && !slot->props.has_core_id) {
624             error_setg(errp, "core-id is not supported");
625             return;
626         }
627 
628         if (props->has_socket_id && !slot->props.has_socket_id) {
629             error_setg(errp, "socket-id is not supported");
630             return;
631         }
632 
633         if (props->has_die_id && !slot->props.has_die_id) {
634             error_setg(errp, "die-id is not supported");
635             return;
636         }
637 
638         /* skip slots with explicit mismatch */
639         if (props->has_thread_id && props->thread_id != slot->props.thread_id) {
640                 continue;
641         }
642 
643         if (props->has_core_id && props->core_id != slot->props.core_id) {
644                 continue;
645         }
646 
647         if (props->has_die_id && props->die_id != slot->props.die_id) {
648                 continue;
649         }
650 
651         if (props->has_socket_id && props->socket_id != slot->props.socket_id) {
652                 continue;
653         }
654 
655         /* reject assignment if slot is already assigned, for compatibility
656          * of legacy cpu_index mapping with SPAPR core based mapping do not
657          * error out if cpu thread and matched core have the same node-id */
658         if (slot->props.has_node_id &&
659             slot->props.node_id != props->node_id) {
660             error_setg(errp, "CPU is already assigned to node-id: %" PRId64,
661                        slot->props.node_id);
662             return;
663         }
664 
665         /* assign slot to node as it's matched '-numa cpu' key */
666         match = true;
667         slot->props.node_id = props->node_id;
668         slot->props.has_node_id = props->has_node_id;
669 
670         if (machine->numa_state->hmat_enabled) {
671             if ((numa_info[props->node_id].initiator < MAX_NODES) &&
672                 (props->node_id != numa_info[props->node_id].initiator)) {
673                 error_setg(errp, "The initiator of CPU NUMA node %" PRId64
674                         " should be itself", props->node_id);
675                 return;
676             }
677             numa_info[props->node_id].has_cpu = true;
678             numa_info[props->node_id].initiator = props->node_id;
679         }
680     }
681 
682     if (!match) {
683         error_setg(errp, "no match found");
684     }
685 }
686 
687 static void smp_parse(MachineState *ms, QemuOpts *opts)
688 {
689     if (opts) {
690         unsigned cpus    = qemu_opt_get_number(opts, "cpus", 0);
691         unsigned sockets = qemu_opt_get_number(opts, "sockets", 0);
692         unsigned cores   = qemu_opt_get_number(opts, "cores", 0);
693         unsigned threads = qemu_opt_get_number(opts, "threads", 0);
694 
695         /* compute missing values, prefer sockets over cores over threads */
696         if (cpus == 0 || sockets == 0) {
697             cores = cores > 0 ? cores : 1;
698             threads = threads > 0 ? threads : 1;
699             if (cpus == 0) {
700                 sockets = sockets > 0 ? sockets : 1;
701                 cpus = cores * threads * sockets;
702             } else {
703                 ms->smp.max_cpus =
704                         qemu_opt_get_number(opts, "maxcpus", cpus);
705                 sockets = ms->smp.max_cpus / (cores * threads);
706             }
707         } else if (cores == 0) {
708             threads = threads > 0 ? threads : 1;
709             cores = cpus / (sockets * threads);
710             cores = cores > 0 ? cores : 1;
711         } else if (threads == 0) {
712             threads = cpus / (cores * sockets);
713             threads = threads > 0 ? threads : 1;
714         } else if (sockets * cores * threads < cpus) {
715             error_report("cpu topology: "
716                          "sockets (%u) * cores (%u) * threads (%u) < "
717                          "smp_cpus (%u)",
718                          sockets, cores, threads, cpus);
719             exit(1);
720         }
721 
722         ms->smp.max_cpus =
723                 qemu_opt_get_number(opts, "maxcpus", cpus);
724 
725         if (ms->smp.max_cpus < cpus) {
726             error_report("maxcpus must be equal to or greater than smp");
727             exit(1);
728         }
729 
730         if (sockets * cores * threads > ms->smp.max_cpus) {
731             error_report("cpu topology: "
732                          "sockets (%u) * cores (%u) * threads (%u) > "
733                          "maxcpus (%u)",
734                          sockets, cores, threads,
735                          ms->smp.max_cpus);
736             exit(1);
737         }
738 
739         if (sockets * cores * threads != ms->smp.max_cpus) {
740             warn_report("Invalid CPU topology deprecated: "
741                         "sockets (%u) * cores (%u) * threads (%u) "
742                         "!= maxcpus (%u)",
743                         sockets, cores, threads,
744                         ms->smp.max_cpus);
745         }
746 
747         ms->smp.cpus = cpus;
748         ms->smp.cores = cores;
749         ms->smp.threads = threads;
750     }
751 
752     if (ms->smp.cpus > 1) {
753         Error *blocker = NULL;
754         error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp");
755         replay_add_blocker(blocker);
756     }
757 }
758 
759 static void machine_class_init(ObjectClass *oc, void *data)
760 {
761     MachineClass *mc = MACHINE_CLASS(oc);
762 
763     /* Default 128 MB as guest ram size */
764     mc->default_ram_size = 128 * MiB;
765     mc->rom_file_has_mr = true;
766     mc->smp_parse = smp_parse;
767 
768     /* numa node memory size aligned on 8MB by default.
769      * On Linux, each node's border has to be 8MB aligned
770      */
771     mc->numa_mem_align_shift = 23;
772     mc->numa_auto_assign_ram = numa_default_auto_assign_ram;
773 
774     object_class_property_add_str(oc, "kernel",
775         machine_get_kernel, machine_set_kernel, &error_abort);
776     object_class_property_set_description(oc, "kernel",
777         "Linux kernel image file", &error_abort);
778 
779     object_class_property_add_str(oc, "initrd",
780         machine_get_initrd, machine_set_initrd, &error_abort);
781     object_class_property_set_description(oc, "initrd",
782         "Linux initial ramdisk file", &error_abort);
783 
784     object_class_property_add_str(oc, "append",
785         machine_get_append, machine_set_append, &error_abort);
786     object_class_property_set_description(oc, "append",
787         "Linux kernel command line", &error_abort);
788 
789     object_class_property_add_str(oc, "dtb",
790         machine_get_dtb, machine_set_dtb, &error_abort);
791     object_class_property_set_description(oc, "dtb",
792         "Linux kernel device tree file", &error_abort);
793 
794     object_class_property_add_str(oc, "dumpdtb",
795         machine_get_dumpdtb, machine_set_dumpdtb, &error_abort);
796     object_class_property_set_description(oc, "dumpdtb",
797         "Dump current dtb to a file and quit", &error_abort);
798 
799     object_class_property_add(oc, "phandle-start", "int",
800         machine_get_phandle_start, machine_set_phandle_start,
801         NULL, NULL, &error_abort);
802     object_class_property_set_description(oc, "phandle-start",
803             "The first phandle ID we may generate dynamically", &error_abort);
804 
805     object_class_property_add_str(oc, "dt-compatible",
806         machine_get_dt_compatible, machine_set_dt_compatible, &error_abort);
807     object_class_property_set_description(oc, "dt-compatible",
808         "Overrides the \"compatible\" property of the dt root node",
809         &error_abort);
810 
811     object_class_property_add_bool(oc, "dump-guest-core",
812         machine_get_dump_guest_core, machine_set_dump_guest_core, &error_abort);
813     object_class_property_set_description(oc, "dump-guest-core",
814         "Include guest memory in a core dump", &error_abort);
815 
816     object_class_property_add_bool(oc, "mem-merge",
817         machine_get_mem_merge, machine_set_mem_merge, &error_abort);
818     object_class_property_set_description(oc, "mem-merge",
819         "Enable/disable memory merge support", &error_abort);
820 
821     object_class_property_add_bool(oc, "usb",
822         machine_get_usb, machine_set_usb, &error_abort);
823     object_class_property_set_description(oc, "usb",
824         "Set on/off to enable/disable usb", &error_abort);
825 
826     object_class_property_add_bool(oc, "graphics",
827         machine_get_graphics, machine_set_graphics, &error_abort);
828     object_class_property_set_description(oc, "graphics",
829         "Set on/off to enable/disable graphics emulation", &error_abort);
830 
831     object_class_property_add_str(oc, "firmware",
832         machine_get_firmware, machine_set_firmware,
833         &error_abort);
834     object_class_property_set_description(oc, "firmware",
835         "Firmware image", &error_abort);
836 
837     object_class_property_add_bool(oc, "suppress-vmdesc",
838         machine_get_suppress_vmdesc, machine_set_suppress_vmdesc,
839         &error_abort);
840     object_class_property_set_description(oc, "suppress-vmdesc",
841         "Set on to disable self-describing migration", &error_abort);
842 
843     object_class_property_add_bool(oc, "enforce-config-section",
844         machine_get_enforce_config_section, machine_set_enforce_config_section,
845         &error_abort);
846     object_class_property_set_description(oc, "enforce-config-section",
847         "Set on to enforce configuration section migration", &error_abort);
848 
849     object_class_property_add_str(oc, "memory-encryption",
850         machine_get_memory_encryption, machine_set_memory_encryption,
851         &error_abort);
852     object_class_property_set_description(oc, "memory-encryption",
853         "Set memory encryption object to use", &error_abort);
854 }
855 
856 static void machine_class_base_init(ObjectClass *oc, void *data)
857 {
858     if (!object_class_is_abstract(oc)) {
859         MachineClass *mc = MACHINE_CLASS(oc);
860         const char *cname = object_class_get_name(oc);
861         assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX));
862         mc->name = g_strndup(cname,
863                             strlen(cname) - strlen(TYPE_MACHINE_SUFFIX));
864         mc->compat_props = g_ptr_array_new();
865     }
866 }
867 
868 static void machine_initfn(Object *obj)
869 {
870     MachineState *ms = MACHINE(obj);
871     MachineClass *mc = MACHINE_GET_CLASS(obj);
872 
873     ms->dump_guest_core = true;
874     ms->mem_merge = true;
875     ms->enable_graphics = true;
876 
877     if (mc->nvdimm_supported) {
878         Object *obj = OBJECT(ms);
879 
880         ms->nvdimms_state = g_new0(NVDIMMState, 1);
881         object_property_add_bool(obj, "nvdimm",
882                                  machine_get_nvdimm, machine_set_nvdimm,
883                                  &error_abort);
884         object_property_set_description(obj, "nvdimm",
885                                         "Set on/off to enable/disable "
886                                         "NVDIMM instantiation", NULL);
887 
888         object_property_add_str(obj, "nvdimm-persistence",
889                                 machine_get_nvdimm_persistence,
890                                 machine_set_nvdimm_persistence,
891                                 &error_abort);
892         object_property_set_description(obj, "nvdimm-persistence",
893                                         "Set NVDIMM persistence"
894                                         "Valid values are cpu, mem-ctrl",
895                                         NULL);
896     }
897 
898     if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) {
899         ms->numa_state = g_new0(NumaState, 1);
900         object_property_add_bool(obj, "hmat",
901                                  machine_get_hmat, machine_set_hmat,
902                                  &error_abort);
903         object_property_set_description(obj, "hmat",
904                                         "Set on/off to enable/disable "
905                                         "ACPI Heterogeneous Memory Attribute "
906                                         "Table (HMAT)", NULL);
907     }
908 
909     object_property_add_str(obj, "memory-backend",
910                             machine_get_memdev, machine_set_memdev,
911                             &error_abort);
912     object_property_set_description(obj, "memory-backend",
913                                     "Set RAM backend"
914                                     "Valid value is ID of hostmem based backend",
915                                      &error_abort);
916 
917     /* Register notifier when init is done for sysbus sanity checks */
918     ms->sysbus_notifier.notify = machine_init_notify;
919     qemu_add_machine_init_done_notifier(&ms->sysbus_notifier);
920 }
921 
922 static void machine_finalize(Object *obj)
923 {
924     MachineState *ms = MACHINE(obj);
925 
926     g_free(ms->kernel_filename);
927     g_free(ms->initrd_filename);
928     g_free(ms->kernel_cmdline);
929     g_free(ms->dtb);
930     g_free(ms->dumpdtb);
931     g_free(ms->dt_compatible);
932     g_free(ms->firmware);
933     g_free(ms->device_memory);
934     g_free(ms->nvdimms_state);
935     g_free(ms->numa_state);
936 }
937 
938 bool machine_usb(MachineState *machine)
939 {
940     return machine->usb;
941 }
942 
943 int machine_phandle_start(MachineState *machine)
944 {
945     return machine->phandle_start;
946 }
947 
948 bool machine_dump_guest_core(MachineState *machine)
949 {
950     return machine->dump_guest_core;
951 }
952 
953 bool machine_mem_merge(MachineState *machine)
954 {
955     return machine->mem_merge;
956 }
957 
958 static char *cpu_slot_to_string(const CPUArchId *cpu)
959 {
960     GString *s = g_string_new(NULL);
961     if (cpu->props.has_socket_id) {
962         g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id);
963     }
964     if (cpu->props.has_die_id) {
965         g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id);
966     }
967     if (cpu->props.has_core_id) {
968         if (s->len) {
969             g_string_append_printf(s, ", ");
970         }
971         g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id);
972     }
973     if (cpu->props.has_thread_id) {
974         if (s->len) {
975             g_string_append_printf(s, ", ");
976         }
977         g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id);
978     }
979     return g_string_free(s, false);
980 }
981 
982 static void numa_validate_initiator(NumaState *numa_state)
983 {
984     int i;
985     NodeInfo *numa_info = numa_state->nodes;
986 
987     for (i = 0; i < numa_state->num_nodes; i++) {
988         if (numa_info[i].initiator == MAX_NODES) {
989             error_report("The initiator of NUMA node %d is missing, use "
990                          "'-numa node,initiator' option to declare it", i);
991             exit(1);
992         }
993 
994         if (!numa_info[numa_info[i].initiator].present) {
995             error_report("NUMA node %" PRIu16 " is missing, use "
996                          "'-numa node' option to declare it first",
997                          numa_info[i].initiator);
998             exit(1);
999         }
1000 
1001         if (!numa_info[numa_info[i].initiator].has_cpu) {
1002             error_report("The initiator of NUMA node %d is invalid", i);
1003             exit(1);
1004         }
1005     }
1006 }
1007 
1008 static void machine_numa_finish_cpu_init(MachineState *machine)
1009 {
1010     int i;
1011     bool default_mapping;
1012     GString *s = g_string_new(NULL);
1013     MachineClass *mc = MACHINE_GET_CLASS(machine);
1014     const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine);
1015 
1016     assert(machine->numa_state->num_nodes);
1017     for (i = 0; i < possible_cpus->len; i++) {
1018         if (possible_cpus->cpus[i].props.has_node_id) {
1019             break;
1020         }
1021     }
1022     default_mapping = (i == possible_cpus->len);
1023 
1024     for (i = 0; i < possible_cpus->len; i++) {
1025         const CPUArchId *cpu_slot = &possible_cpus->cpus[i];
1026 
1027         if (!cpu_slot->props.has_node_id) {
1028             /* fetch default mapping from board and enable it */
1029             CpuInstanceProperties props = cpu_slot->props;
1030 
1031             props.node_id = mc->get_default_cpu_node_id(machine, i);
1032             if (!default_mapping) {
1033                 /* record slots with not set mapping,
1034                  * TODO: make it hard error in future */
1035                 char *cpu_str = cpu_slot_to_string(cpu_slot);
1036                 g_string_append_printf(s, "%sCPU %d [%s]",
1037                                        s->len ? ", " : "", i, cpu_str);
1038                 g_free(cpu_str);
1039 
1040                 /* non mapped cpus used to fallback to node 0 */
1041                 props.node_id = 0;
1042             }
1043 
1044             props.has_node_id = true;
1045             machine_set_cpu_numa_node(machine, &props, &error_fatal);
1046         }
1047     }
1048 
1049     if (machine->numa_state->hmat_enabled) {
1050         numa_validate_initiator(machine->numa_state);
1051     }
1052 
1053     if (s->len && !qtest_enabled()) {
1054         warn_report("CPU(s) not present in any NUMA nodes: %s",
1055                     s->str);
1056         warn_report("All CPU(s) up to maxcpus should be described "
1057                     "in NUMA config, ability to start up with partial NUMA "
1058                     "mappings is obsoleted and will be removed in future");
1059     }
1060     g_string_free(s, true);
1061 }
1062 
1063 MemoryRegion *machine_consume_memdev(MachineState *machine,
1064                                      HostMemoryBackend *backend)
1065 {
1066     MemoryRegion *ret = host_memory_backend_get_memory(backend);
1067 
1068     if (memory_region_is_mapped(ret)) {
1069         char *path = object_get_canonical_path_component(OBJECT(backend));
1070         error_report("memory backend %s can't be used multiple times.", path);
1071         g_free(path);
1072         exit(EXIT_FAILURE);
1073     }
1074     host_memory_backend_set_mapped(backend, true);
1075     vmstate_register_ram_global(ret);
1076     return ret;
1077 }
1078 
1079 void machine_run_board_init(MachineState *machine)
1080 {
1081     MachineClass *machine_class = MACHINE_GET_CLASS(machine);
1082 
1083     if (machine->ram_memdev_id) {
1084         Object *o;
1085         o = object_resolve_path_type(machine->ram_memdev_id,
1086                                      TYPE_MEMORY_BACKEND, NULL);
1087         machine->ram = machine_consume_memdev(machine, MEMORY_BACKEND(o));
1088     }
1089 
1090     if (machine->numa_state) {
1091         numa_complete_configuration(machine);
1092         if (machine->numa_state->num_nodes) {
1093             machine_numa_finish_cpu_init(machine);
1094         }
1095     }
1096 
1097     /* If the machine supports the valid_cpu_types check and the user
1098      * specified a CPU with -cpu check here that the user CPU is supported.
1099      */
1100     if (machine_class->valid_cpu_types && machine->cpu_type) {
1101         ObjectClass *class = object_class_by_name(machine->cpu_type);
1102         int i;
1103 
1104         for (i = 0; machine_class->valid_cpu_types[i]; i++) {
1105             if (object_class_dynamic_cast(class,
1106                                           machine_class->valid_cpu_types[i])) {
1107                 /* The user specificed CPU is in the valid field, we are
1108                  * good to go.
1109                  */
1110                 break;
1111             }
1112         }
1113 
1114         if (!machine_class->valid_cpu_types[i]) {
1115             /* The user specified CPU is not valid */
1116             error_report("Invalid CPU type: %s", machine->cpu_type);
1117             error_printf("The valid types are: %s",
1118                          machine_class->valid_cpu_types[0]);
1119             for (i = 1; machine_class->valid_cpu_types[i]; i++) {
1120                 error_printf(", %s", machine_class->valid_cpu_types[i]);
1121             }
1122             error_printf("\n");
1123 
1124             exit(1);
1125         }
1126     }
1127 
1128     machine_class->init(machine);
1129 }
1130 
1131 static const TypeInfo machine_info = {
1132     .name = TYPE_MACHINE,
1133     .parent = TYPE_OBJECT,
1134     .abstract = true,
1135     .class_size = sizeof(MachineClass),
1136     .class_init    = machine_class_init,
1137     .class_base_init = machine_class_base_init,
1138     .instance_size = sizeof(MachineState),
1139     .instance_init = machine_initfn,
1140     .instance_finalize = machine_finalize,
1141 };
1142 
1143 static void machine_register_types(void)
1144 {
1145     type_register_static(&machine_info);
1146 }
1147 
1148 type_init(machine_register_types)
1149