1 /* 2 * QEMU Machine 3 * 4 * Copyright (C) 2014 Red Hat Inc 5 * 6 * Authors: 7 * Marcel Apfelbaum <marcel.a@redhat.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or later. 10 * See the COPYING file in the top-level directory. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "qemu/accel.h" 15 #include "sysemu/replay.h" 16 #include "hw/boards.h" 17 #include "hw/loader.h" 18 #include "qapi/error.h" 19 #include "qapi/qapi-visit-machine.h" 20 #include "qemu/madvise.h" 21 #include "qom/object_interfaces.h" 22 #include "sysemu/cpus.h" 23 #include "sysemu/sysemu.h" 24 #include "sysemu/reset.h" 25 #include "sysemu/runstate.h" 26 #include "sysemu/xen.h" 27 #include "sysemu/qtest.h" 28 #include "hw/pci/pci_bridge.h" 29 #include "hw/mem/nvdimm.h" 30 #include "migration/global_state.h" 31 #include "exec/confidential-guest-support.h" 32 #include "hw/virtio/virtio-pci.h" 33 #include "hw/virtio/virtio-net.h" 34 #include "hw/virtio/virtio-iommu.h" 35 #include "audio/audio.h" 36 37 GlobalProperty hw_compat_9_1[] = { 38 { TYPE_PCI_DEVICE, "x-pcie-ext-tag", "false" }, 39 }; 40 const size_t hw_compat_9_1_len = G_N_ELEMENTS(hw_compat_9_1); 41 42 GlobalProperty hw_compat_9_0[] = { 43 {"arm-cpu", "backcompat-cntfrq", "true" }, 44 { "scsi-hd", "migrate-emulated-scsi-request", "false" }, 45 { "scsi-cd", "migrate-emulated-scsi-request", "false" }, 46 {"vfio-pci", "skip-vsc-check", "false" }, 47 { "virtio-pci", "x-pcie-pm-no-soft-reset", "off" }, 48 {"sd-card", "spec_version", "2" }, 49 }; 50 const size_t hw_compat_9_0_len = G_N_ELEMENTS(hw_compat_9_0); 51 52 GlobalProperty hw_compat_8_2[] = { 53 { "migration", "zero-page-detection", "legacy"}, 54 { TYPE_VIRTIO_IOMMU_PCI, "granule", "4k" }, 55 { TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "64" }, 56 { "virtio-gpu-device", "x-scanout-vmstate-version", "1" }, 57 }; 58 const size_t hw_compat_8_2_len = G_N_ELEMENTS(hw_compat_8_2); 59 60 GlobalProperty hw_compat_8_1[] = { 61 { TYPE_PCI_BRIDGE, "x-pci-express-writeable-slt-bug", "true" }, 62 { "ramfb", "x-migrate", "off" }, 63 { "vfio-pci-nohotplug", "x-ramfb-migrate", "off" }, 64 { "igb", "x-pcie-flr-init", "off" }, 65 { TYPE_VIRTIO_NET, "host_uso", "off"}, 66 { TYPE_VIRTIO_NET, "guest_uso4", "off"}, 67 { TYPE_VIRTIO_NET, "guest_uso6", "off"}, 68 }; 69 const size_t hw_compat_8_1_len = G_N_ELEMENTS(hw_compat_8_1); 70 71 GlobalProperty hw_compat_8_0[] = { 72 { "migration", "multifd-flush-after-each-section", "on"}, 73 { TYPE_PCI_DEVICE, "x-pcie-ari-nextfn-1", "on" }, 74 }; 75 const size_t hw_compat_8_0_len = G_N_ELEMENTS(hw_compat_8_0); 76 77 GlobalProperty hw_compat_7_2[] = { 78 { "e1000e", "migrate-timadj", "off" }, 79 { "virtio-mem", "x-early-migration", "false" }, 80 { "migration", "x-preempt-pre-7-2", "true" }, 81 { TYPE_PCI_DEVICE, "x-pcie-err-unc-mask", "off" }, 82 }; 83 const size_t hw_compat_7_2_len = G_N_ELEMENTS(hw_compat_7_2); 84 85 GlobalProperty hw_compat_7_1[] = { 86 { "virtio-device", "queue_reset", "false" }, 87 { "virtio-rng-pci", "vectors", "0" }, 88 { "virtio-rng-pci-transitional", "vectors", "0" }, 89 { "virtio-rng-pci-non-transitional", "vectors", "0" }, 90 }; 91 const size_t hw_compat_7_1_len = G_N_ELEMENTS(hw_compat_7_1); 92 93 GlobalProperty hw_compat_7_0[] = { 94 { "arm-gicv3-common", "force-8-bit-prio", "on" }, 95 { "nvme-ns", "eui64-default", "on"}, 96 }; 97 const size_t hw_compat_7_0_len = G_N_ELEMENTS(hw_compat_7_0); 98 99 GlobalProperty hw_compat_6_2[] = { 100 { "PIIX4_PM", "x-not-migrate-acpi-index", "on"}, 101 }; 102 const size_t hw_compat_6_2_len = G_N_ELEMENTS(hw_compat_6_2); 103 104 GlobalProperty hw_compat_6_1[] = { 105 { "vhost-user-vsock-device", "seqpacket", "off" }, 106 { "nvme-ns", "shared", "off" }, 107 }; 108 const size_t hw_compat_6_1_len = G_N_ELEMENTS(hw_compat_6_1); 109 110 GlobalProperty hw_compat_6_0[] = { 111 { "gpex-pcihost", "allow-unmapped-accesses", "false" }, 112 { "i8042", "extended-state", "false"}, 113 { "nvme-ns", "eui64-default", "off"}, 114 { "e1000", "init-vet", "off" }, 115 { "e1000e", "init-vet", "off" }, 116 { "vhost-vsock-device", "seqpacket", "off" }, 117 }; 118 const size_t hw_compat_6_0_len = G_N_ELEMENTS(hw_compat_6_0); 119 120 GlobalProperty hw_compat_5_2[] = { 121 { "ICH9-LPC", "smm-compat", "on"}, 122 { "PIIX4_PM", "smm-compat", "on"}, 123 { "virtio-blk-device", "report-discard-granularity", "off" }, 124 { "virtio-net-pci-base", "vectors", "3"}, 125 { "nvme", "msix-exclusive-bar", "on"}, 126 }; 127 const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2); 128 129 GlobalProperty hw_compat_5_1[] = { 130 { "vhost-scsi", "num_queues", "1"}, 131 { "vhost-user-blk", "num-queues", "1"}, 132 { "vhost-user-scsi", "num_queues", "1"}, 133 { "virtio-blk-device", "num-queues", "1"}, 134 { "virtio-scsi-device", "num_queues", "1"}, 135 { "nvme", "use-intel-id", "on"}, 136 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */ 137 { "pl011", "migrate-clk", "off" }, 138 { "virtio-pci", "x-ats-page-aligned", "off"}, 139 }; 140 const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1); 141 142 GlobalProperty hw_compat_5_0[] = { 143 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" }, 144 { "virtio-balloon-device", "page-poison", "false" }, 145 { "vmport", "x-read-set-eax", "off" }, 146 { "vmport", "x-signal-unsupported-cmd", "off" }, 147 { "vmport", "x-report-vmx-type", "off" }, 148 { "vmport", "x-cmds-v2", "off" }, 149 { "virtio-device", "x-disable-legacy-check", "true" }, 150 }; 151 const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0); 152 153 GlobalProperty hw_compat_4_2[] = { 154 { "virtio-blk-device", "queue-size", "128"}, 155 { "virtio-scsi-device", "virtqueue_size", "128"}, 156 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" }, 157 { "virtio-blk-device", "seg-max-adjust", "off"}, 158 { "virtio-scsi-device", "seg_max_adjust", "off"}, 159 { "vhost-blk-device", "seg_max_adjust", "off"}, 160 { "usb-host", "suppress-remote-wake", "off" }, 161 { "usb-redir", "suppress-remote-wake", "off" }, 162 { "qxl", "revision", "4" }, 163 { "qxl-vga", "revision", "4" }, 164 { "fw_cfg", "acpi-mr-restore", "false" }, 165 { "virtio-device", "use-disabled-flag", "false" }, 166 }; 167 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2); 168 169 GlobalProperty hw_compat_4_1[] = { 170 { "virtio-pci", "x-pcie-flr-init", "off" }, 171 }; 172 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1); 173 174 GlobalProperty hw_compat_4_0[] = { 175 { "VGA", "edid", "false" }, 176 { "secondary-vga", "edid", "false" }, 177 { "bochs-display", "edid", "false" }, 178 { "virtio-vga", "edid", "false" }, 179 { "virtio-gpu-device", "edid", "false" }, 180 { "virtio-device", "use-started", "false" }, 181 { "virtio-balloon-device", "qemu-4-0-config-size", "true" }, 182 { "pl031", "migrate-tick-offset", "false" }, 183 }; 184 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0); 185 186 GlobalProperty hw_compat_3_1[] = { 187 { "pcie-root-port", "x-speed", "2_5" }, 188 { "pcie-root-port", "x-width", "1" }, 189 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, 190 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, 191 { "tpm-crb", "ppi", "false" }, 192 { "tpm-tis", "ppi", "false" }, 193 { "usb-kbd", "serial", "42" }, 194 { "usb-mouse", "serial", "42" }, 195 { "usb-tablet", "serial", "42" }, 196 { "virtio-blk-device", "discard", "false" }, 197 { "virtio-blk-device", "write-zeroes", "false" }, 198 { "virtio-balloon-device", "qemu-4-0-config-size", "false" }, 199 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */ 200 }; 201 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); 202 203 GlobalProperty hw_compat_3_0[] = {}; 204 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0); 205 206 GlobalProperty hw_compat_2_12[] = { 207 { "hda-audio", "use-timer", "false" }, 208 { "cirrus-vga", "global-vmstate", "true" }, 209 { "VGA", "global-vmstate", "true" }, 210 { "vmware-svga", "global-vmstate", "true" }, 211 { "qxl-vga", "global-vmstate", "true" }, 212 }; 213 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12); 214 215 GlobalProperty hw_compat_2_11[] = { 216 { "hpet", "hpet-offset-saved", "false" }, 217 { "virtio-blk-pci", "vectors", "2" }, 218 { "vhost-user-blk-pci", "vectors", "2" }, 219 { "e1000", "migrate_tso_props", "off" }, 220 }; 221 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11); 222 223 GlobalProperty hw_compat_2_10[] = { 224 { "virtio-mouse-device", "wheel-axis", "false" }, 225 { "virtio-tablet-device", "wheel-axis", "false" }, 226 }; 227 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10); 228 229 GlobalProperty hw_compat_2_9[] = { 230 { "pci-bridge", "shpc", "off" }, 231 { "intel-iommu", "pt", "off" }, 232 { "virtio-net-device", "x-mtu-bypass-backend", "off" }, 233 { "pcie-root-port", "x-migrate-msix", "false" }, 234 }; 235 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9); 236 237 GlobalProperty hw_compat_2_8[] = { 238 { "fw_cfg_mem", "x-file-slots", "0x10" }, 239 { "fw_cfg_io", "x-file-slots", "0x10" }, 240 { "pflash_cfi01", "old-multiple-chip-handling", "on" }, 241 { "pci-bridge", "shpc", "on" }, 242 { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" }, 243 { "virtio-pci", "x-pcie-deverr-init", "off" }, 244 { "virtio-pci", "x-pcie-lnkctl-init", "off" }, 245 { "virtio-pci", "x-pcie-pm-init", "off" }, 246 { "cirrus-vga", "vgamem_mb", "8" }, 247 { "isa-cirrus-vga", "vgamem_mb", "8" }, 248 }; 249 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8); 250 251 GlobalProperty hw_compat_2_7[] = { 252 { "virtio-pci", "page-per-vq", "on" }, 253 { "virtio-serial-device", "emergency-write", "off" }, 254 { "ioapic", "version", "0x11" }, 255 { "intel-iommu", "x-buggy-eim", "true" }, 256 { "virtio-pci", "x-ignore-backend-features", "on" }, 257 }; 258 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7); 259 260 GlobalProperty hw_compat_2_6[] = { 261 { "virtio-mmio", "format_transport_address", "off" }, 262 /* Optional because not all virtio-pci devices support legacy mode */ 263 { "virtio-pci", "disable-modern", "on", .optional = true }, 264 { "virtio-pci", "disable-legacy", "off", .optional = true }, 265 }; 266 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6); 267 268 GlobalProperty hw_compat_2_5[] = { 269 { "isa-fdc", "fallback", "144" }, 270 { "pvscsi", "x-old-pci-configuration", "on" }, 271 { "pvscsi", "x-disable-pcie", "on" }, 272 { "vmxnet3", "x-old-msi-offsets", "on" }, 273 { "vmxnet3", "x-disable-pcie", "on" }, 274 }; 275 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5); 276 277 GlobalProperty hw_compat_2_4[] = { 278 { "e1000", "extra_mac_registers", "off" }, 279 { "virtio-pci", "x-disable-pcie", "on" }, 280 { "virtio-pci", "migrate-extra", "off" }, 281 { "fw_cfg_mem", "dma_enabled", "off" }, 282 { "fw_cfg_io", "dma_enabled", "off" } 283 }; 284 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4); 285 286 MachineState *current_machine; 287 288 static char *machine_get_kernel(Object *obj, Error **errp) 289 { 290 MachineState *ms = MACHINE(obj); 291 292 return g_strdup(ms->kernel_filename); 293 } 294 295 static void machine_set_kernel(Object *obj, const char *value, Error **errp) 296 { 297 MachineState *ms = MACHINE(obj); 298 299 g_free(ms->kernel_filename); 300 ms->kernel_filename = g_strdup(value); 301 } 302 303 static char *machine_get_initrd(Object *obj, Error **errp) 304 { 305 MachineState *ms = MACHINE(obj); 306 307 return g_strdup(ms->initrd_filename); 308 } 309 310 static void machine_set_initrd(Object *obj, const char *value, Error **errp) 311 { 312 MachineState *ms = MACHINE(obj); 313 314 g_free(ms->initrd_filename); 315 ms->initrd_filename = g_strdup(value); 316 } 317 318 static char *machine_get_append(Object *obj, Error **errp) 319 { 320 MachineState *ms = MACHINE(obj); 321 322 return g_strdup(ms->kernel_cmdline); 323 } 324 325 static void machine_set_append(Object *obj, const char *value, Error **errp) 326 { 327 MachineState *ms = MACHINE(obj); 328 329 g_free(ms->kernel_cmdline); 330 ms->kernel_cmdline = g_strdup(value); 331 } 332 333 static char *machine_get_dtb(Object *obj, Error **errp) 334 { 335 MachineState *ms = MACHINE(obj); 336 337 return g_strdup(ms->dtb); 338 } 339 340 static void machine_set_dtb(Object *obj, const char *value, Error **errp) 341 { 342 MachineState *ms = MACHINE(obj); 343 344 g_free(ms->dtb); 345 ms->dtb = g_strdup(value); 346 } 347 348 static char *machine_get_dumpdtb(Object *obj, Error **errp) 349 { 350 MachineState *ms = MACHINE(obj); 351 352 return g_strdup(ms->dumpdtb); 353 } 354 355 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) 356 { 357 MachineState *ms = MACHINE(obj); 358 359 g_free(ms->dumpdtb); 360 ms->dumpdtb = g_strdup(value); 361 } 362 363 static void machine_get_phandle_start(Object *obj, Visitor *v, 364 const char *name, void *opaque, 365 Error **errp) 366 { 367 MachineState *ms = MACHINE(obj); 368 int64_t value = ms->phandle_start; 369 370 visit_type_int(v, name, &value, errp); 371 } 372 373 static void machine_set_phandle_start(Object *obj, Visitor *v, 374 const char *name, void *opaque, 375 Error **errp) 376 { 377 MachineState *ms = MACHINE(obj); 378 int64_t value; 379 380 if (!visit_type_int(v, name, &value, errp)) { 381 return; 382 } 383 384 ms->phandle_start = value; 385 } 386 387 static char *machine_get_dt_compatible(Object *obj, Error **errp) 388 { 389 MachineState *ms = MACHINE(obj); 390 391 return g_strdup(ms->dt_compatible); 392 } 393 394 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) 395 { 396 MachineState *ms = MACHINE(obj); 397 398 g_free(ms->dt_compatible); 399 ms->dt_compatible = g_strdup(value); 400 } 401 402 static bool machine_get_dump_guest_core(Object *obj, Error **errp) 403 { 404 MachineState *ms = MACHINE(obj); 405 406 return ms->dump_guest_core; 407 } 408 409 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) 410 { 411 MachineState *ms = MACHINE(obj); 412 413 if (!value && QEMU_MADV_DONTDUMP == QEMU_MADV_INVALID) { 414 error_setg(errp, "Dumping guest memory cannot be disabled on this host"); 415 return; 416 } 417 ms->dump_guest_core = value; 418 } 419 420 static bool machine_get_mem_merge(Object *obj, Error **errp) 421 { 422 MachineState *ms = MACHINE(obj); 423 424 return ms->mem_merge; 425 } 426 427 static void machine_set_mem_merge(Object *obj, bool value, Error **errp) 428 { 429 MachineState *ms = MACHINE(obj); 430 431 if (value && QEMU_MADV_MERGEABLE == QEMU_MADV_INVALID) { 432 error_setg(errp, "Memory merging is not supported on this host"); 433 return; 434 } 435 ms->mem_merge = value; 436 } 437 438 static bool machine_get_usb(Object *obj, Error **errp) 439 { 440 MachineState *ms = MACHINE(obj); 441 442 return ms->usb; 443 } 444 445 static void machine_set_usb(Object *obj, bool value, Error **errp) 446 { 447 MachineState *ms = MACHINE(obj); 448 449 ms->usb = value; 450 ms->usb_disabled = !value; 451 } 452 453 static bool machine_get_graphics(Object *obj, Error **errp) 454 { 455 MachineState *ms = MACHINE(obj); 456 457 return ms->enable_graphics; 458 } 459 460 static void machine_set_graphics(Object *obj, bool value, Error **errp) 461 { 462 MachineState *ms = MACHINE(obj); 463 464 ms->enable_graphics = value; 465 } 466 467 static char *machine_get_firmware(Object *obj, Error **errp) 468 { 469 MachineState *ms = MACHINE(obj); 470 471 return g_strdup(ms->firmware); 472 } 473 474 static void machine_set_firmware(Object *obj, const char *value, Error **errp) 475 { 476 MachineState *ms = MACHINE(obj); 477 478 g_free(ms->firmware); 479 ms->firmware = g_strdup(value); 480 } 481 482 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) 483 { 484 MachineState *ms = MACHINE(obj); 485 486 ms->suppress_vmdesc = value; 487 } 488 489 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) 490 { 491 MachineState *ms = MACHINE(obj); 492 493 return ms->suppress_vmdesc; 494 } 495 496 static char *machine_get_memory_encryption(Object *obj, Error **errp) 497 { 498 MachineState *ms = MACHINE(obj); 499 500 if (ms->cgs) { 501 return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs))); 502 } 503 504 return NULL; 505 } 506 507 static void machine_set_memory_encryption(Object *obj, const char *value, 508 Error **errp) 509 { 510 Object *cgs = 511 object_resolve_path_component(object_get_objects_root(), value); 512 513 if (!cgs) { 514 error_setg(errp, "No such memory encryption object '%s'", value); 515 return; 516 } 517 518 object_property_set_link(obj, "confidential-guest-support", cgs, errp); 519 } 520 521 static void machine_check_confidential_guest_support(const Object *obj, 522 const char *name, 523 Object *new_target, 524 Error **errp) 525 { 526 /* 527 * So far the only constraint is that the target has the 528 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked 529 * by the QOM core 530 */ 531 } 532 533 static bool machine_get_nvdimm(Object *obj, Error **errp) 534 { 535 MachineState *ms = MACHINE(obj); 536 537 return ms->nvdimms_state->is_enabled; 538 } 539 540 static void machine_set_nvdimm(Object *obj, bool value, Error **errp) 541 { 542 MachineState *ms = MACHINE(obj); 543 544 ms->nvdimms_state->is_enabled = value; 545 } 546 547 static bool machine_get_hmat(Object *obj, Error **errp) 548 { 549 MachineState *ms = MACHINE(obj); 550 551 return ms->numa_state->hmat_enabled; 552 } 553 554 static void machine_set_hmat(Object *obj, bool value, Error **errp) 555 { 556 MachineState *ms = MACHINE(obj); 557 558 ms->numa_state->hmat_enabled = value; 559 } 560 561 static void machine_get_mem(Object *obj, Visitor *v, const char *name, 562 void *opaque, Error **errp) 563 { 564 MachineState *ms = MACHINE(obj); 565 MemorySizeConfiguration mem = { 566 .has_size = true, 567 .size = ms->ram_size, 568 .has_max_size = !!ms->ram_slots, 569 .max_size = ms->maxram_size, 570 .has_slots = !!ms->ram_slots, 571 .slots = ms->ram_slots, 572 }; 573 MemorySizeConfiguration *p_mem = &mem; 574 575 visit_type_MemorySizeConfiguration(v, name, &p_mem, &error_abort); 576 } 577 578 static void machine_set_mem(Object *obj, Visitor *v, const char *name, 579 void *opaque, Error **errp) 580 { 581 ERRP_GUARD(); 582 MachineState *ms = MACHINE(obj); 583 MachineClass *mc = MACHINE_GET_CLASS(obj); 584 MemorySizeConfiguration *mem; 585 586 if (!visit_type_MemorySizeConfiguration(v, name, &mem, errp)) { 587 return; 588 } 589 590 if (!mem->has_size) { 591 mem->has_size = true; 592 mem->size = mc->default_ram_size; 593 } 594 mem->size = QEMU_ALIGN_UP(mem->size, 8192); 595 if (mc->fixup_ram_size) { 596 mem->size = mc->fixup_ram_size(mem->size); 597 } 598 if ((ram_addr_t)mem->size != mem->size) { 599 error_setg(errp, "ram size too large"); 600 goto out_free; 601 } 602 603 if (mem->has_max_size) { 604 if (mem->max_size < mem->size) { 605 error_setg(errp, "invalid value of maxmem: " 606 "maximum memory size (0x%" PRIx64 ") must be at least " 607 "the initial memory size (0x%" PRIx64 ")", 608 mem->max_size, mem->size); 609 goto out_free; 610 } 611 if (mem->has_slots && mem->slots && mem->max_size == mem->size) { 612 error_setg(errp, "invalid value of maxmem: " 613 "memory slots were specified but maximum memory size " 614 "(0x%" PRIx64 ") is equal to the initial memory size " 615 "(0x%" PRIx64 ")", mem->max_size, mem->size); 616 goto out_free; 617 } 618 ms->maxram_size = mem->max_size; 619 } else { 620 if (mem->has_slots) { 621 error_setg(errp, "slots specified but no max-size"); 622 goto out_free; 623 } 624 ms->maxram_size = mem->size; 625 } 626 ms->ram_size = mem->size; 627 ms->ram_slots = mem->has_slots ? mem->slots : 0; 628 out_free: 629 qapi_free_MemorySizeConfiguration(mem); 630 } 631 632 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) 633 { 634 MachineState *ms = MACHINE(obj); 635 636 return g_strdup(ms->nvdimms_state->persistence_string); 637 } 638 639 static void machine_set_nvdimm_persistence(Object *obj, const char *value, 640 Error **errp) 641 { 642 MachineState *ms = MACHINE(obj); 643 NVDIMMState *nvdimms_state = ms->nvdimms_state; 644 645 if (strcmp(value, "cpu") == 0) { 646 nvdimms_state->persistence = 3; 647 } else if (strcmp(value, "mem-ctrl") == 0) { 648 nvdimms_state->persistence = 2; 649 } else { 650 error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", 651 value); 652 return; 653 } 654 655 g_free(nvdimms_state->persistence_string); 656 nvdimms_state->persistence_string = g_strdup(value); 657 } 658 659 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) 660 { 661 QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type)); 662 } 663 664 bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev) 665 { 666 Object *obj = OBJECT(dev); 667 668 if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) { 669 return false; 670 } 671 672 return device_type_is_dynamic_sysbus(mc, object_get_typename(obj)); 673 } 674 675 bool device_type_is_dynamic_sysbus(MachineClass *mc, const char *type) 676 { 677 bool allowed = false; 678 strList *wl; 679 ObjectClass *klass = object_class_by_name(type); 680 681 for (wl = mc->allowed_dynamic_sysbus_devices; 682 !allowed && wl; 683 wl = wl->next) { 684 allowed |= !!object_class_dynamic_cast(klass, wl->value); 685 } 686 687 return allowed; 688 } 689 690 static char *machine_get_audiodev(Object *obj, Error **errp) 691 { 692 MachineState *ms = MACHINE(obj); 693 694 return g_strdup(ms->audiodev); 695 } 696 697 static void machine_set_audiodev(Object *obj, const char *value, 698 Error **errp) 699 { 700 MachineState *ms = MACHINE(obj); 701 702 if (!audio_state_by_name(value, errp)) { 703 return; 704 } 705 706 g_free(ms->audiodev); 707 ms->audiodev = g_strdup(value); 708 } 709 710 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) 711 { 712 int i; 713 HotpluggableCPUList *head = NULL; 714 MachineClass *mc = MACHINE_GET_CLASS(machine); 715 716 /* force board to initialize possible_cpus if it hasn't been done yet */ 717 mc->possible_cpu_arch_ids(machine); 718 719 for (i = 0; i < machine->possible_cpus->len; i++) { 720 CPUState *cpu; 721 HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); 722 723 cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); 724 cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; 725 cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, 726 sizeof(*cpu_item->props)); 727 728 cpu = machine->possible_cpus->cpus[i].cpu; 729 if (cpu) { 730 cpu_item->qom_path = object_get_canonical_path(OBJECT(cpu)); 731 } 732 QAPI_LIST_PREPEND(head, cpu_item); 733 } 734 return head; 735 } 736 737 /** 738 * machine_set_cpu_numa_node: 739 * @machine: machine object to modify 740 * @props: specifies which cpu objects to assign to 741 * numa node specified by @props.node_id 742 * @errp: if an error occurs, a pointer to an area to store the error 743 * 744 * Associate NUMA node specified by @props.node_id with cpu slots that 745 * match socket/core/thread-ids specified by @props. It's recommended to use 746 * query-hotpluggable-cpus.props values to specify affected cpu slots, 747 * which would lead to exact 1:1 mapping of cpu slots to NUMA node. 748 * 749 * However for CLI convenience it's possible to pass in subset of properties, 750 * which would affect all cpu slots that match it. 751 * Ex for pc machine: 752 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ 753 * -numa cpu,node-id=0,socket_id=0 \ 754 * -numa cpu,node-id=1,socket_id=1 755 * will assign all child cores of socket 0 to node 0 and 756 * of socket 1 to node 1. 757 * 758 * On attempt of reassigning (already assigned) cpu slot to another NUMA node, 759 * return error. 760 * Empty subset is disallowed and function will return with error in this case. 761 */ 762 void machine_set_cpu_numa_node(MachineState *machine, 763 const CpuInstanceProperties *props, Error **errp) 764 { 765 MachineClass *mc = MACHINE_GET_CLASS(machine); 766 NodeInfo *numa_info = machine->numa_state->nodes; 767 bool match = false; 768 int i; 769 770 if (!mc->possible_cpu_arch_ids) { 771 error_setg(errp, "mapping of CPUs to NUMA node is not supported"); 772 return; 773 } 774 775 /* disabling node mapping is not supported, forbid it */ 776 assert(props->has_node_id); 777 778 /* force board to initialize possible_cpus if it hasn't been done yet */ 779 mc->possible_cpu_arch_ids(machine); 780 781 for (i = 0; i < machine->possible_cpus->len; i++) { 782 CPUArchId *slot = &machine->possible_cpus->cpus[i]; 783 784 /* reject unsupported by board properties */ 785 if (props->has_thread_id && !slot->props.has_thread_id) { 786 error_setg(errp, "thread-id is not supported"); 787 return; 788 } 789 790 if (props->has_core_id && !slot->props.has_core_id) { 791 error_setg(errp, "core-id is not supported"); 792 return; 793 } 794 795 if (props->has_module_id && !slot->props.has_module_id) { 796 error_setg(errp, "module-id is not supported"); 797 return; 798 } 799 800 if (props->has_cluster_id && !slot->props.has_cluster_id) { 801 error_setg(errp, "cluster-id is not supported"); 802 return; 803 } 804 805 if (props->has_socket_id && !slot->props.has_socket_id) { 806 error_setg(errp, "socket-id is not supported"); 807 return; 808 } 809 810 if (props->has_die_id && !slot->props.has_die_id) { 811 error_setg(errp, "die-id is not supported"); 812 return; 813 } 814 815 /* skip slots with explicit mismatch */ 816 if (props->has_thread_id && props->thread_id != slot->props.thread_id) { 817 continue; 818 } 819 820 if (props->has_core_id && props->core_id != slot->props.core_id) { 821 continue; 822 } 823 824 if (props->has_module_id && 825 props->module_id != slot->props.module_id) { 826 continue; 827 } 828 829 if (props->has_cluster_id && 830 props->cluster_id != slot->props.cluster_id) { 831 continue; 832 } 833 834 if (props->has_die_id && props->die_id != slot->props.die_id) { 835 continue; 836 } 837 838 if (props->has_socket_id && props->socket_id != slot->props.socket_id) { 839 continue; 840 } 841 842 /* reject assignment if slot is already assigned, for compatibility 843 * of legacy cpu_index mapping with SPAPR core based mapping do not 844 * error out if cpu thread and matched core have the same node-id */ 845 if (slot->props.has_node_id && 846 slot->props.node_id != props->node_id) { 847 error_setg(errp, "CPU is already assigned to node-id: %" PRId64, 848 slot->props.node_id); 849 return; 850 } 851 852 /* assign slot to node as it's matched '-numa cpu' key */ 853 match = true; 854 slot->props.node_id = props->node_id; 855 slot->props.has_node_id = props->has_node_id; 856 857 if (machine->numa_state->hmat_enabled) { 858 if ((numa_info[props->node_id].initiator < MAX_NODES) && 859 (props->node_id != numa_info[props->node_id].initiator)) { 860 error_setg(errp, "The initiator of CPU NUMA node %" PRId64 861 " should be itself (got %" PRIu16 ")", 862 props->node_id, numa_info[props->node_id].initiator); 863 return; 864 } 865 numa_info[props->node_id].has_cpu = true; 866 numa_info[props->node_id].initiator = props->node_id; 867 } 868 } 869 870 if (!match) { 871 error_setg(errp, "no match found"); 872 } 873 } 874 875 static void machine_get_smp(Object *obj, Visitor *v, const char *name, 876 void *opaque, Error **errp) 877 { 878 MachineState *ms = MACHINE(obj); 879 SMPConfiguration *config = &(SMPConfiguration){ 880 .has_cpus = true, .cpus = ms->smp.cpus, 881 .has_drawers = true, .drawers = ms->smp.drawers, 882 .has_books = true, .books = ms->smp.books, 883 .has_sockets = true, .sockets = ms->smp.sockets, 884 .has_dies = true, .dies = ms->smp.dies, 885 .has_clusters = true, .clusters = ms->smp.clusters, 886 .has_modules = true, .modules = ms->smp.modules, 887 .has_cores = true, .cores = ms->smp.cores, 888 .has_threads = true, .threads = ms->smp.threads, 889 .has_maxcpus = true, .maxcpus = ms->smp.max_cpus, 890 }; 891 892 if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) { 893 return; 894 } 895 } 896 897 static void machine_set_smp(Object *obj, Visitor *v, const char *name, 898 void *opaque, Error **errp) 899 { 900 MachineState *ms = MACHINE(obj); 901 g_autoptr(SMPConfiguration) config = NULL; 902 903 if (!visit_type_SMPConfiguration(v, name, &config, errp)) { 904 return; 905 } 906 907 machine_parse_smp_config(ms, config, errp); 908 } 909 910 static void machine_get_boot(Object *obj, Visitor *v, const char *name, 911 void *opaque, Error **errp) 912 { 913 MachineState *ms = MACHINE(obj); 914 BootConfiguration *config = &ms->boot_config; 915 visit_type_BootConfiguration(v, name, &config, &error_abort); 916 } 917 918 static void machine_free_boot_config(MachineState *ms) 919 { 920 g_free(ms->boot_config.order); 921 g_free(ms->boot_config.once); 922 g_free(ms->boot_config.splash); 923 } 924 925 static void machine_copy_boot_config(MachineState *ms, BootConfiguration *config) 926 { 927 MachineClass *machine_class = MACHINE_GET_CLASS(ms); 928 929 machine_free_boot_config(ms); 930 ms->boot_config = *config; 931 if (!config->order) { 932 ms->boot_config.order = g_strdup(machine_class->default_boot_order); 933 } 934 } 935 936 static void machine_set_boot(Object *obj, Visitor *v, const char *name, 937 void *opaque, Error **errp) 938 { 939 ERRP_GUARD(); 940 MachineState *ms = MACHINE(obj); 941 BootConfiguration *config = NULL; 942 943 if (!visit_type_BootConfiguration(v, name, &config, errp)) { 944 return; 945 } 946 if (config->order) { 947 validate_bootdevices(config->order, errp); 948 if (*errp) { 949 goto out_free; 950 } 951 } 952 if (config->once) { 953 validate_bootdevices(config->once, errp); 954 if (*errp) { 955 goto out_free; 956 } 957 } 958 959 machine_copy_boot_config(ms, config); 960 /* Strings live in ms->boot_config. */ 961 free(config); 962 return; 963 964 out_free: 965 qapi_free_BootConfiguration(config); 966 } 967 968 void machine_add_audiodev_property(MachineClass *mc) 969 { 970 ObjectClass *oc = OBJECT_CLASS(mc); 971 972 object_class_property_add_str(oc, "audiodev", 973 machine_get_audiodev, 974 machine_set_audiodev); 975 object_class_property_set_description(oc, "audiodev", 976 "Audiodev to use for default machine devices"); 977 } 978 979 static bool create_default_memdev(MachineState *ms, const char *path, 980 Error **errp) 981 { 982 Object *obj; 983 MachineClass *mc = MACHINE_GET_CLASS(ms); 984 bool r = false; 985 986 obj = object_new(path ? TYPE_MEMORY_BACKEND_FILE : TYPE_MEMORY_BACKEND_RAM); 987 if (path) { 988 if (!object_property_set_str(obj, "mem-path", path, errp)) { 989 goto out; 990 } 991 } 992 if (!object_property_set_int(obj, "size", ms->ram_size, errp)) { 993 goto out; 994 } 995 object_property_add_child(object_get_objects_root(), mc->default_ram_id, 996 obj); 997 /* Ensure backend's memory region name is equal to mc->default_ram_id */ 998 if (!object_property_set_bool(obj, "x-use-canonical-path-for-ramblock-id", 999 false, errp)) { 1000 goto out; 1001 } 1002 if (!user_creatable_complete(USER_CREATABLE(obj), errp)) { 1003 goto out; 1004 } 1005 r = object_property_set_link(OBJECT(ms), "memory-backend", obj, errp); 1006 1007 out: 1008 object_unref(obj); 1009 return r; 1010 } 1011 1012 static void machine_class_init(ObjectClass *oc, void *data) 1013 { 1014 MachineClass *mc = MACHINE_CLASS(oc); 1015 1016 /* Default 128 MB as guest ram size */ 1017 mc->default_ram_size = 128 * MiB; 1018 mc->rom_file_has_mr = true; 1019 /* 1020 * SMBIOS 3.1.0 7.18.5 Memory Device — Extended Size 1021 * use max possible value that could be encoded into 1022 * 'Extended Size' field (2047Tb). 1023 */ 1024 mc->smbios_memory_device_size = 2047 * TiB; 1025 1026 /* numa node memory size aligned on 8MB by default. 1027 * On Linux, each node's border has to be 8MB aligned 1028 */ 1029 mc->numa_mem_align_shift = 23; 1030 1031 mc->create_default_memdev = create_default_memdev; 1032 1033 object_class_property_add_str(oc, "kernel", 1034 machine_get_kernel, machine_set_kernel); 1035 object_class_property_set_description(oc, "kernel", 1036 "Linux kernel image file"); 1037 1038 object_class_property_add_str(oc, "initrd", 1039 machine_get_initrd, machine_set_initrd); 1040 object_class_property_set_description(oc, "initrd", 1041 "Linux initial ramdisk file"); 1042 1043 object_class_property_add_str(oc, "append", 1044 machine_get_append, machine_set_append); 1045 object_class_property_set_description(oc, "append", 1046 "Linux kernel command line"); 1047 1048 object_class_property_add_str(oc, "dtb", 1049 machine_get_dtb, machine_set_dtb); 1050 object_class_property_set_description(oc, "dtb", 1051 "Linux kernel device tree file"); 1052 1053 object_class_property_add_str(oc, "dumpdtb", 1054 machine_get_dumpdtb, machine_set_dumpdtb); 1055 object_class_property_set_description(oc, "dumpdtb", 1056 "Dump current dtb to a file and quit"); 1057 1058 object_class_property_add(oc, "boot", "BootConfiguration", 1059 machine_get_boot, machine_set_boot, 1060 NULL, NULL); 1061 object_class_property_set_description(oc, "boot", 1062 "Boot configuration"); 1063 1064 object_class_property_add(oc, "smp", "SMPConfiguration", 1065 machine_get_smp, machine_set_smp, 1066 NULL, NULL); 1067 object_class_property_set_description(oc, "smp", 1068 "CPU topology"); 1069 1070 object_class_property_add(oc, "phandle-start", "int", 1071 machine_get_phandle_start, machine_set_phandle_start, 1072 NULL, NULL); 1073 object_class_property_set_description(oc, "phandle-start", 1074 "The first phandle ID we may generate dynamically"); 1075 1076 object_class_property_add_str(oc, "dt-compatible", 1077 machine_get_dt_compatible, machine_set_dt_compatible); 1078 object_class_property_set_description(oc, "dt-compatible", 1079 "Overrides the \"compatible\" property of the dt root node"); 1080 1081 object_class_property_add_bool(oc, "dump-guest-core", 1082 machine_get_dump_guest_core, machine_set_dump_guest_core); 1083 object_class_property_set_description(oc, "dump-guest-core", 1084 "Include guest memory in a core dump"); 1085 1086 object_class_property_add_bool(oc, "mem-merge", 1087 machine_get_mem_merge, machine_set_mem_merge); 1088 object_class_property_set_description(oc, "mem-merge", 1089 "Enable/disable memory merge support"); 1090 1091 object_class_property_add_bool(oc, "usb", 1092 machine_get_usb, machine_set_usb); 1093 object_class_property_set_description(oc, "usb", 1094 "Set on/off to enable/disable usb"); 1095 1096 object_class_property_add_bool(oc, "graphics", 1097 machine_get_graphics, machine_set_graphics); 1098 object_class_property_set_description(oc, "graphics", 1099 "Set on/off to enable/disable graphics emulation"); 1100 1101 object_class_property_add_str(oc, "firmware", 1102 machine_get_firmware, machine_set_firmware); 1103 object_class_property_set_description(oc, "firmware", 1104 "Firmware image"); 1105 1106 object_class_property_add_bool(oc, "suppress-vmdesc", 1107 machine_get_suppress_vmdesc, machine_set_suppress_vmdesc); 1108 object_class_property_set_description(oc, "suppress-vmdesc", 1109 "Set on to disable self-describing migration"); 1110 1111 object_class_property_add_link(oc, "confidential-guest-support", 1112 TYPE_CONFIDENTIAL_GUEST_SUPPORT, 1113 offsetof(MachineState, cgs), 1114 machine_check_confidential_guest_support, 1115 OBJ_PROP_LINK_STRONG); 1116 object_class_property_set_description(oc, "confidential-guest-support", 1117 "Set confidential guest scheme to support"); 1118 1119 /* For compatibility */ 1120 object_class_property_add_str(oc, "memory-encryption", 1121 machine_get_memory_encryption, machine_set_memory_encryption); 1122 object_class_property_set_description(oc, "memory-encryption", 1123 "Set memory encryption object to use"); 1124 1125 object_class_property_add_link(oc, "memory-backend", TYPE_MEMORY_BACKEND, 1126 offsetof(MachineState, memdev), object_property_allow_set_link, 1127 OBJ_PROP_LINK_STRONG); 1128 object_class_property_set_description(oc, "memory-backend", 1129 "Set RAM backend" 1130 "Valid value is ID of hostmem based backend"); 1131 1132 object_class_property_add(oc, "memory", "MemorySizeConfiguration", 1133 machine_get_mem, machine_set_mem, 1134 NULL, NULL); 1135 object_class_property_set_description(oc, "memory", 1136 "Memory size configuration"); 1137 } 1138 1139 static void machine_class_base_init(ObjectClass *oc, void *data) 1140 { 1141 MachineClass *mc = MACHINE_CLASS(oc); 1142 mc->max_cpus = mc->max_cpus ?: 1; 1143 mc->min_cpus = mc->min_cpus ?: 1; 1144 mc->default_cpus = mc->default_cpus ?: 1; 1145 1146 if (!object_class_is_abstract(oc)) { 1147 const char *cname = object_class_get_name(oc); 1148 assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); 1149 mc->name = g_strndup(cname, 1150 strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); 1151 mc->compat_props = g_ptr_array_new(); 1152 } 1153 } 1154 1155 static void machine_initfn(Object *obj) 1156 { 1157 MachineState *ms = MACHINE(obj); 1158 MachineClass *mc = MACHINE_GET_CLASS(obj); 1159 1160 container_get(obj, "/peripheral"); 1161 container_get(obj, "/peripheral-anon"); 1162 1163 ms->dump_guest_core = true; 1164 ms->mem_merge = (QEMU_MADV_MERGEABLE != QEMU_MADV_INVALID); 1165 ms->enable_graphics = true; 1166 ms->kernel_cmdline = g_strdup(""); 1167 ms->ram_size = mc->default_ram_size; 1168 ms->maxram_size = mc->default_ram_size; 1169 1170 if (mc->nvdimm_supported) { 1171 ms->nvdimms_state = g_new0(NVDIMMState, 1); 1172 object_property_add_bool(obj, "nvdimm", 1173 machine_get_nvdimm, machine_set_nvdimm); 1174 object_property_set_description(obj, "nvdimm", 1175 "Set on/off to enable/disable " 1176 "NVDIMM instantiation"); 1177 1178 object_property_add_str(obj, "nvdimm-persistence", 1179 machine_get_nvdimm_persistence, 1180 machine_set_nvdimm_persistence); 1181 object_property_set_description(obj, "nvdimm-persistence", 1182 "Set NVDIMM persistence" 1183 "Valid values are cpu, mem-ctrl"); 1184 } 1185 1186 if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { 1187 ms->numa_state = g_new0(NumaState, 1); 1188 object_property_add_bool(obj, "hmat", 1189 machine_get_hmat, machine_set_hmat); 1190 object_property_set_description(obj, "hmat", 1191 "Set on/off to enable/disable " 1192 "ACPI Heterogeneous Memory Attribute " 1193 "Table (HMAT)"); 1194 } 1195 1196 /* default to mc->default_cpus */ 1197 ms->smp.cpus = mc->default_cpus; 1198 ms->smp.max_cpus = mc->default_cpus; 1199 ms->smp.drawers = 1; 1200 ms->smp.books = 1; 1201 ms->smp.sockets = 1; 1202 ms->smp.dies = 1; 1203 ms->smp.clusters = 1; 1204 ms->smp.modules = 1; 1205 ms->smp.cores = 1; 1206 ms->smp.threads = 1; 1207 1208 machine_copy_boot_config(ms, &(BootConfiguration){ 0 }); 1209 } 1210 1211 static void machine_finalize(Object *obj) 1212 { 1213 MachineState *ms = MACHINE(obj); 1214 1215 machine_free_boot_config(ms); 1216 g_free(ms->kernel_filename); 1217 g_free(ms->initrd_filename); 1218 g_free(ms->kernel_cmdline); 1219 g_free(ms->dtb); 1220 g_free(ms->dumpdtb); 1221 g_free(ms->dt_compatible); 1222 g_free(ms->firmware); 1223 g_free(ms->device_memory); 1224 g_free(ms->nvdimms_state); 1225 g_free(ms->numa_state); 1226 g_free(ms->audiodev); 1227 } 1228 1229 bool machine_usb(MachineState *machine) 1230 { 1231 return machine->usb; 1232 } 1233 1234 int machine_phandle_start(MachineState *machine) 1235 { 1236 return machine->phandle_start; 1237 } 1238 1239 bool machine_dump_guest_core(MachineState *machine) 1240 { 1241 return machine->dump_guest_core; 1242 } 1243 1244 bool machine_mem_merge(MachineState *machine) 1245 { 1246 return machine->mem_merge; 1247 } 1248 1249 bool machine_require_guest_memfd(MachineState *machine) 1250 { 1251 return machine->cgs && machine->cgs->require_guest_memfd; 1252 } 1253 1254 static char *cpu_slot_to_string(const CPUArchId *cpu) 1255 { 1256 GString *s = g_string_new(NULL); 1257 if (cpu->props.has_socket_id) { 1258 g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); 1259 } 1260 if (cpu->props.has_die_id) { 1261 if (s->len) { 1262 g_string_append_printf(s, ", "); 1263 } 1264 g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id); 1265 } 1266 if (cpu->props.has_cluster_id) { 1267 if (s->len) { 1268 g_string_append_printf(s, ", "); 1269 } 1270 g_string_append_printf(s, "cluster-id: %"PRId64, cpu->props.cluster_id); 1271 } 1272 if (cpu->props.has_module_id) { 1273 if (s->len) { 1274 g_string_append_printf(s, ", "); 1275 } 1276 g_string_append_printf(s, "module-id: %"PRId64, cpu->props.module_id); 1277 } 1278 if (cpu->props.has_core_id) { 1279 if (s->len) { 1280 g_string_append_printf(s, ", "); 1281 } 1282 g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); 1283 } 1284 if (cpu->props.has_thread_id) { 1285 if (s->len) { 1286 g_string_append_printf(s, ", "); 1287 } 1288 g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); 1289 } 1290 return g_string_free(s, false); 1291 } 1292 1293 static void numa_validate_initiator(NumaState *numa_state) 1294 { 1295 int i; 1296 NodeInfo *numa_info = numa_state->nodes; 1297 1298 for (i = 0; i < numa_state->num_nodes; i++) { 1299 if (numa_info[i].initiator == MAX_NODES) { 1300 continue; 1301 } 1302 1303 if (!numa_info[numa_info[i].initiator].present) { 1304 error_report("NUMA node %" PRIu16 " is missing, use " 1305 "'-numa node' option to declare it first", 1306 numa_info[i].initiator); 1307 exit(1); 1308 } 1309 1310 if (!numa_info[numa_info[i].initiator].has_cpu) { 1311 error_report("The initiator of NUMA node %d is invalid", i); 1312 exit(1); 1313 } 1314 } 1315 } 1316 1317 static void machine_numa_finish_cpu_init(MachineState *machine) 1318 { 1319 int i; 1320 bool default_mapping; 1321 GString *s = g_string_new(NULL); 1322 MachineClass *mc = MACHINE_GET_CLASS(machine); 1323 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); 1324 1325 assert(machine->numa_state->num_nodes); 1326 for (i = 0; i < possible_cpus->len; i++) { 1327 if (possible_cpus->cpus[i].props.has_node_id) { 1328 break; 1329 } 1330 } 1331 default_mapping = (i == possible_cpus->len); 1332 1333 for (i = 0; i < possible_cpus->len; i++) { 1334 const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; 1335 1336 if (!cpu_slot->props.has_node_id) { 1337 /* fetch default mapping from board and enable it */ 1338 CpuInstanceProperties props = cpu_slot->props; 1339 1340 props.node_id = mc->get_default_cpu_node_id(machine, i); 1341 if (!default_mapping) { 1342 /* record slots with not set mapping, 1343 * TODO: make it hard error in future */ 1344 char *cpu_str = cpu_slot_to_string(cpu_slot); 1345 g_string_append_printf(s, "%sCPU %d [%s]", 1346 s->len ? ", " : "", i, cpu_str); 1347 g_free(cpu_str); 1348 1349 /* non mapped cpus used to fallback to node 0 */ 1350 props.node_id = 0; 1351 } 1352 1353 props.has_node_id = true; 1354 machine_set_cpu_numa_node(machine, &props, &error_fatal); 1355 } 1356 } 1357 1358 if (machine->numa_state->hmat_enabled) { 1359 numa_validate_initiator(machine->numa_state); 1360 } 1361 1362 if (s->len && !qtest_enabled()) { 1363 warn_report("CPU(s) not present in any NUMA nodes: %s", 1364 s->str); 1365 warn_report("All CPU(s) up to maxcpus should be described " 1366 "in NUMA config, ability to start up with partial NUMA " 1367 "mappings is obsoleted and will be removed in future"); 1368 } 1369 g_string_free(s, true); 1370 } 1371 1372 static void validate_cpu_cluster_to_numa_boundary(MachineState *ms) 1373 { 1374 MachineClass *mc = MACHINE_GET_CLASS(ms); 1375 NumaState *state = ms->numa_state; 1376 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms); 1377 const CPUArchId *cpus = possible_cpus->cpus; 1378 int i, j; 1379 1380 if (qtest_enabled() || state->num_nodes <= 1 || possible_cpus->len <= 1) { 1381 return; 1382 } 1383 1384 /* 1385 * The Linux scheduling domain can't be parsed when the multiple CPUs 1386 * in one cluster have been associated with different NUMA nodes. However, 1387 * it's fine to associate one NUMA node with CPUs in different clusters. 1388 */ 1389 for (i = 0; i < possible_cpus->len; i++) { 1390 for (j = i + 1; j < possible_cpus->len; j++) { 1391 if (cpus[i].props.has_socket_id && 1392 cpus[i].props.has_cluster_id && 1393 cpus[i].props.has_node_id && 1394 cpus[j].props.has_socket_id && 1395 cpus[j].props.has_cluster_id && 1396 cpus[j].props.has_node_id && 1397 cpus[i].props.socket_id == cpus[j].props.socket_id && 1398 cpus[i].props.cluster_id == cpus[j].props.cluster_id && 1399 cpus[i].props.node_id != cpus[j].props.node_id) { 1400 warn_report("CPU-%d and CPU-%d in socket-%" PRId64 "-cluster-%" PRId64 1401 " have been associated with node-%" PRId64 " and node-%" PRId64 1402 " respectively. It can cause OSes like Linux to" 1403 " misbehave", i, j, cpus[i].props.socket_id, 1404 cpus[i].props.cluster_id, cpus[i].props.node_id, 1405 cpus[j].props.node_id); 1406 } 1407 } 1408 } 1409 } 1410 1411 MemoryRegion *machine_consume_memdev(MachineState *machine, 1412 HostMemoryBackend *backend) 1413 { 1414 MemoryRegion *ret = host_memory_backend_get_memory(backend); 1415 1416 if (host_memory_backend_is_mapped(backend)) { 1417 error_report("memory backend %s can't be used multiple times.", 1418 object_get_canonical_path_component(OBJECT(backend))); 1419 exit(EXIT_FAILURE); 1420 } 1421 host_memory_backend_set_mapped(backend, true); 1422 vmstate_register_ram_global(ret); 1423 return ret; 1424 } 1425 1426 const char *machine_class_default_cpu_type(MachineClass *mc) 1427 { 1428 if (mc->valid_cpu_types && !mc->valid_cpu_types[1]) { 1429 /* Only a single CPU type allowed: use it as default. */ 1430 return mc->valid_cpu_types[0]; 1431 } 1432 return mc->default_cpu_type; 1433 } 1434 1435 static bool is_cpu_type_supported(const MachineState *machine, Error **errp) 1436 { 1437 MachineClass *mc = MACHINE_GET_CLASS(machine); 1438 ObjectClass *oc = object_class_by_name(machine->cpu_type); 1439 CPUClass *cc; 1440 int i; 1441 1442 /* 1443 * Check if the user specified CPU type is supported when the valid 1444 * CPU types have been determined. Note that the user specified CPU 1445 * type is provided through '-cpu' option. 1446 */ 1447 if (mc->valid_cpu_types) { 1448 assert(mc->valid_cpu_types[0] != NULL); 1449 for (i = 0; mc->valid_cpu_types[i]; i++) { 1450 if (object_class_dynamic_cast(oc, mc->valid_cpu_types[i])) { 1451 break; 1452 } 1453 } 1454 1455 /* The user specified CPU type isn't valid */ 1456 if (!mc->valid_cpu_types[i]) { 1457 g_autofree char *requested = cpu_model_from_type(machine->cpu_type); 1458 error_setg(errp, "Invalid CPU model: %s", requested); 1459 if (!mc->valid_cpu_types[1]) { 1460 g_autofree char *model = cpu_model_from_type( 1461 mc->valid_cpu_types[0]); 1462 error_append_hint(errp, "The only valid type is: %s\n", model); 1463 } else { 1464 error_append_hint(errp, "The valid models are: "); 1465 for (i = 0; mc->valid_cpu_types[i]; i++) { 1466 g_autofree char *model = cpu_model_from_type( 1467 mc->valid_cpu_types[i]); 1468 error_append_hint(errp, "%s%s", 1469 model, 1470 mc->valid_cpu_types[i + 1] ? ", " : ""); 1471 } 1472 error_append_hint(errp, "\n"); 1473 } 1474 1475 return false; 1476 } 1477 } 1478 1479 /* Check if CPU type is deprecated and warn if so */ 1480 cc = CPU_CLASS(oc); 1481 assert(cc != NULL); 1482 if (cc->deprecation_note) { 1483 warn_report("CPU model %s is deprecated -- %s", 1484 machine->cpu_type, cc->deprecation_note); 1485 } 1486 1487 return true; 1488 } 1489 1490 void machine_run_board_init(MachineState *machine, const char *mem_path, Error **errp) 1491 { 1492 ERRP_GUARD(); 1493 MachineClass *machine_class = MACHINE_GET_CLASS(machine); 1494 1495 /* This checkpoint is required by replay to separate prior clock 1496 reading from the other reads, because timer polling functions query 1497 clock values from the log. */ 1498 replay_checkpoint(CHECKPOINT_INIT); 1499 1500 if (!xen_enabled()) { 1501 /* On 32-bit hosts, QEMU is limited by virtual address space */ 1502 if (machine->ram_size > (2047 << 20) && HOST_LONG_BITS == 32) { 1503 error_setg(errp, "at most 2047 MB RAM can be simulated"); 1504 return; 1505 } 1506 } 1507 1508 if (machine->memdev) { 1509 ram_addr_t backend_size = object_property_get_uint(OBJECT(machine->memdev), 1510 "size", &error_abort); 1511 if (backend_size != machine->ram_size) { 1512 error_setg(errp, "Machine memory size does not match the size of the memory backend"); 1513 return; 1514 } 1515 } else if (machine_class->default_ram_id && machine->ram_size && 1516 numa_uses_legacy_mem()) { 1517 if (object_property_find(object_get_objects_root(), 1518 machine_class->default_ram_id)) { 1519 error_setg(errp, "object's id '%s' is reserved for the default" 1520 " RAM backend, it can't be used for any other purposes", 1521 machine_class->default_ram_id); 1522 error_append_hint(errp, 1523 "Change the object's 'id' to something else or disable" 1524 " automatic creation of the default RAM backend by setting" 1525 " 'memory-backend=%s' with '-machine'.\n", 1526 machine_class->default_ram_id); 1527 return; 1528 } 1529 1530 if (!machine_class->create_default_memdev(current_machine, mem_path, 1531 errp)) { 1532 return; 1533 } 1534 } 1535 1536 if (machine->numa_state) { 1537 numa_complete_configuration(machine); 1538 if (machine->numa_state->num_nodes) { 1539 machine_numa_finish_cpu_init(machine); 1540 if (machine_class->cpu_cluster_has_numa_boundary) { 1541 validate_cpu_cluster_to_numa_boundary(machine); 1542 } 1543 } 1544 } 1545 1546 if (!machine->ram && machine->memdev) { 1547 machine->ram = machine_consume_memdev(machine, machine->memdev); 1548 } 1549 1550 /* Check if the CPU type is supported */ 1551 if (machine->cpu_type && !is_cpu_type_supported(machine, errp)) { 1552 return; 1553 } 1554 1555 if (machine->cgs) { 1556 /* 1557 * With confidential guests, the host can't see the real 1558 * contents of RAM, so there's no point in it trying to merge 1559 * areas. 1560 */ 1561 machine_set_mem_merge(OBJECT(machine), false, &error_abort); 1562 1563 /* 1564 * Virtio devices can't count on directly accessing guest 1565 * memory, so they need iommu_platform=on to use normal DMA 1566 * mechanisms. That requires also disabling legacy virtio 1567 * support for those virtio pci devices which allow it. 1568 */ 1569 object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy", 1570 "on", true); 1571 object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform", 1572 "on", false); 1573 } 1574 1575 accel_init_interfaces(ACCEL_GET_CLASS(machine->accelerator)); 1576 machine_class->init(machine); 1577 phase_advance(PHASE_MACHINE_INITIALIZED); 1578 } 1579 1580 static NotifierList machine_init_done_notifiers = 1581 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers); 1582 1583 void qemu_add_machine_init_done_notifier(Notifier *notify) 1584 { 1585 notifier_list_add(&machine_init_done_notifiers, notify); 1586 if (phase_check(PHASE_MACHINE_READY)) { 1587 notify->notify(notify, NULL); 1588 } 1589 } 1590 1591 void qemu_remove_machine_init_done_notifier(Notifier *notify) 1592 { 1593 notifier_remove(notify); 1594 } 1595 1596 void qdev_machine_creation_done(void) 1597 { 1598 cpu_synchronize_all_post_init(); 1599 1600 if (current_machine->boot_config.once) { 1601 qemu_boot_set(current_machine->boot_config.once, &error_fatal); 1602 qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_config.order)); 1603 } 1604 1605 /* 1606 * ok, initial machine setup is done, starting from now we can 1607 * only create hotpluggable devices 1608 */ 1609 phase_advance(PHASE_MACHINE_READY); 1610 qdev_assert_realized_properly(); 1611 1612 /* TODO: once all bus devices are qdevified, this should be done 1613 * when bus is created by qdev.c */ 1614 /* 1615 * This is where we arrange for the sysbus to be reset when the 1616 * whole simulation is reset. In turn, resetting the sysbus will cause 1617 * all devices hanging off it (and all their child buses, recursively) 1618 * to be reset. Note that this will *not* reset any Device objects 1619 * which are not attached to some part of the qbus tree! 1620 */ 1621 qemu_register_resettable(OBJECT(sysbus_get_default())); 1622 1623 notifier_list_notify(&machine_init_done_notifiers, NULL); 1624 1625 if (rom_check_and_register_reset() != 0) { 1626 exit(1); 1627 } 1628 1629 replay_start(); 1630 1631 /* This checkpoint is required by replay to separate prior clock 1632 reading from the other reads, because timer polling functions query 1633 clock values from the log. */ 1634 replay_checkpoint(CHECKPOINT_RESET); 1635 qemu_system_reset(SHUTDOWN_CAUSE_NONE); 1636 register_global_state(); 1637 } 1638 1639 static const TypeInfo machine_info = { 1640 .name = TYPE_MACHINE, 1641 .parent = TYPE_OBJECT, 1642 .abstract = true, 1643 .class_size = sizeof(MachineClass), 1644 .class_init = machine_class_init, 1645 .class_base_init = machine_class_base_init, 1646 .instance_size = sizeof(MachineState), 1647 .instance_init = machine_initfn, 1648 .instance_finalize = machine_finalize, 1649 }; 1650 1651 static void machine_register_types(void) 1652 { 1653 type_register_static(&machine_info); 1654 } 1655 1656 type_init(machine_register_types) 1657