1 /* 2 * QEMU Machine 3 * 4 * Copyright (C) 2014 Red Hat Inc 5 * 6 * Authors: 7 * Marcel Apfelbaum <marcel.a@redhat.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or later. 10 * See the COPYING file in the top-level directory. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "qemu/option.h" 15 #include "qapi/qmp/qerror.h" 16 #include "sysemu/replay.h" 17 #include "qemu/units.h" 18 #include "hw/boards.h" 19 #include "hw/loader.h" 20 #include "qapi/error.h" 21 #include "qapi/qapi-visit-common.h" 22 #include "qapi/qapi-visit-machine.h" 23 #include "qapi/visitor.h" 24 #include "hw/sysbus.h" 25 #include "sysemu/cpus.h" 26 #include "sysemu/sysemu.h" 27 #include "sysemu/reset.h" 28 #include "sysemu/runstate.h" 29 #include "sysemu/numa.h" 30 #include "qemu/error-report.h" 31 #include "sysemu/qtest.h" 32 #include "hw/pci/pci.h" 33 #include "hw/mem/nvdimm.h" 34 #include "migration/global_state.h" 35 #include "migration/vmstate.h" 36 #include "exec/confidential-guest-support.h" 37 #include "hw/virtio/virtio.h" 38 #include "hw/virtio/virtio-pci.h" 39 40 GlobalProperty hw_compat_7_0[] = {}; 41 const size_t hw_compat_7_0_len = G_N_ELEMENTS(hw_compat_7_0); 42 43 GlobalProperty hw_compat_6_2[] = { 44 { "PIIX4_PM", "x-not-migrate-acpi-index", "on"}, 45 }; 46 const size_t hw_compat_6_2_len = G_N_ELEMENTS(hw_compat_6_2); 47 48 GlobalProperty hw_compat_6_1[] = { 49 { "vhost-user-vsock-device", "seqpacket", "off" }, 50 { "nvme-ns", "shared", "off" }, 51 }; 52 const size_t hw_compat_6_1_len = G_N_ELEMENTS(hw_compat_6_1); 53 54 GlobalProperty hw_compat_6_0[] = { 55 { "gpex-pcihost", "allow-unmapped-accesses", "false" }, 56 { "i8042", "extended-state", "false"}, 57 { "nvme-ns", "eui64-default", "off"}, 58 { "e1000", "init-vet", "off" }, 59 { "e1000e", "init-vet", "off" }, 60 { "vhost-vsock-device", "seqpacket", "off" }, 61 }; 62 const size_t hw_compat_6_0_len = G_N_ELEMENTS(hw_compat_6_0); 63 64 GlobalProperty hw_compat_5_2[] = { 65 { "ICH9-LPC", "smm-compat", "on"}, 66 { "PIIX4_PM", "smm-compat", "on"}, 67 { "virtio-blk-device", "report-discard-granularity", "off" }, 68 { "virtio-net-pci-base", "vectors", "3"}, 69 }; 70 const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2); 71 72 GlobalProperty hw_compat_5_1[] = { 73 { "vhost-scsi", "num_queues", "1"}, 74 { "vhost-user-blk", "num-queues", "1"}, 75 { "vhost-user-scsi", "num_queues", "1"}, 76 { "virtio-blk-device", "num-queues", "1"}, 77 { "virtio-scsi-device", "num_queues", "1"}, 78 { "nvme", "use-intel-id", "on"}, 79 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */ 80 { "pl011", "migrate-clk", "off" }, 81 { "virtio-pci", "x-ats-page-aligned", "off"}, 82 }; 83 const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1); 84 85 GlobalProperty hw_compat_5_0[] = { 86 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" }, 87 { "virtio-balloon-device", "page-poison", "false" }, 88 { "vmport", "x-read-set-eax", "off" }, 89 { "vmport", "x-signal-unsupported-cmd", "off" }, 90 { "vmport", "x-report-vmx-type", "off" }, 91 { "vmport", "x-cmds-v2", "off" }, 92 { "virtio-device", "x-disable-legacy-check", "true" }, 93 }; 94 const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0); 95 96 GlobalProperty hw_compat_4_2[] = { 97 { "virtio-blk-device", "queue-size", "128"}, 98 { "virtio-scsi-device", "virtqueue_size", "128"}, 99 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" }, 100 { "virtio-blk-device", "seg-max-adjust", "off"}, 101 { "virtio-scsi-device", "seg_max_adjust", "off"}, 102 { "vhost-blk-device", "seg_max_adjust", "off"}, 103 { "usb-host", "suppress-remote-wake", "off" }, 104 { "usb-redir", "suppress-remote-wake", "off" }, 105 { "qxl", "revision", "4" }, 106 { "qxl-vga", "revision", "4" }, 107 { "fw_cfg", "acpi-mr-restore", "false" }, 108 { "virtio-device", "use-disabled-flag", "false" }, 109 }; 110 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2); 111 112 GlobalProperty hw_compat_4_1[] = { 113 { "virtio-pci", "x-pcie-flr-init", "off" }, 114 }; 115 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1); 116 117 GlobalProperty hw_compat_4_0[] = { 118 { "VGA", "edid", "false" }, 119 { "secondary-vga", "edid", "false" }, 120 { "bochs-display", "edid", "false" }, 121 { "virtio-vga", "edid", "false" }, 122 { "virtio-gpu-device", "edid", "false" }, 123 { "virtio-device", "use-started", "false" }, 124 { "virtio-balloon-device", "qemu-4-0-config-size", "true" }, 125 { "pl031", "migrate-tick-offset", "false" }, 126 }; 127 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0); 128 129 GlobalProperty hw_compat_3_1[] = { 130 { "pcie-root-port", "x-speed", "2_5" }, 131 { "pcie-root-port", "x-width", "1" }, 132 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, 133 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, 134 { "tpm-crb", "ppi", "false" }, 135 { "tpm-tis", "ppi", "false" }, 136 { "usb-kbd", "serial", "42" }, 137 { "usb-mouse", "serial", "42" }, 138 { "usb-tablet", "serial", "42" }, 139 { "virtio-blk-device", "discard", "false" }, 140 { "virtio-blk-device", "write-zeroes", "false" }, 141 { "virtio-balloon-device", "qemu-4-0-config-size", "false" }, 142 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */ 143 }; 144 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); 145 146 GlobalProperty hw_compat_3_0[] = {}; 147 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0); 148 149 GlobalProperty hw_compat_2_12[] = { 150 { "migration", "decompress-error-check", "off" }, 151 { "hda-audio", "use-timer", "false" }, 152 { "cirrus-vga", "global-vmstate", "true" }, 153 { "VGA", "global-vmstate", "true" }, 154 { "vmware-svga", "global-vmstate", "true" }, 155 { "qxl-vga", "global-vmstate", "true" }, 156 }; 157 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12); 158 159 GlobalProperty hw_compat_2_11[] = { 160 { "hpet", "hpet-offset-saved", "false" }, 161 { "virtio-blk-pci", "vectors", "2" }, 162 { "vhost-user-blk-pci", "vectors", "2" }, 163 { "e1000", "migrate_tso_props", "off" }, 164 }; 165 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11); 166 167 GlobalProperty hw_compat_2_10[] = { 168 { "virtio-mouse-device", "wheel-axis", "false" }, 169 { "virtio-tablet-device", "wheel-axis", "false" }, 170 }; 171 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10); 172 173 GlobalProperty hw_compat_2_9[] = { 174 { "pci-bridge", "shpc", "off" }, 175 { "intel-iommu", "pt", "off" }, 176 { "virtio-net-device", "x-mtu-bypass-backend", "off" }, 177 { "pcie-root-port", "x-migrate-msix", "false" }, 178 }; 179 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9); 180 181 GlobalProperty hw_compat_2_8[] = { 182 { "fw_cfg_mem", "x-file-slots", "0x10" }, 183 { "fw_cfg_io", "x-file-slots", "0x10" }, 184 { "pflash_cfi01", "old-multiple-chip-handling", "on" }, 185 { "pci-bridge", "shpc", "on" }, 186 { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" }, 187 { "virtio-pci", "x-pcie-deverr-init", "off" }, 188 { "virtio-pci", "x-pcie-lnkctl-init", "off" }, 189 { "virtio-pci", "x-pcie-pm-init", "off" }, 190 { "cirrus-vga", "vgamem_mb", "8" }, 191 { "isa-cirrus-vga", "vgamem_mb", "8" }, 192 }; 193 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8); 194 195 GlobalProperty hw_compat_2_7[] = { 196 { "virtio-pci", "page-per-vq", "on" }, 197 { "virtio-serial-device", "emergency-write", "off" }, 198 { "ioapic", "version", "0x11" }, 199 { "intel-iommu", "x-buggy-eim", "true" }, 200 { "virtio-pci", "x-ignore-backend-features", "on" }, 201 }; 202 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7); 203 204 GlobalProperty hw_compat_2_6[] = { 205 { "virtio-mmio", "format_transport_address", "off" }, 206 /* Optional because not all virtio-pci devices support legacy mode */ 207 { "virtio-pci", "disable-modern", "on", .optional = true }, 208 { "virtio-pci", "disable-legacy", "off", .optional = true }, 209 }; 210 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6); 211 212 GlobalProperty hw_compat_2_5[] = { 213 { "isa-fdc", "fallback", "144" }, 214 { "pvscsi", "x-old-pci-configuration", "on" }, 215 { "pvscsi", "x-disable-pcie", "on" }, 216 { "vmxnet3", "x-old-msi-offsets", "on" }, 217 { "vmxnet3", "x-disable-pcie", "on" }, 218 }; 219 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5); 220 221 GlobalProperty hw_compat_2_4[] = { 222 /* Optional because the 'scsi' property is Linux-only */ 223 { "virtio-blk-device", "scsi", "true", .optional = true }, 224 { "e1000", "extra_mac_registers", "off" }, 225 { "virtio-pci", "x-disable-pcie", "on" }, 226 { "virtio-pci", "migrate-extra", "off" }, 227 { "fw_cfg_mem", "dma_enabled", "off" }, 228 { "fw_cfg_io", "dma_enabled", "off" } 229 }; 230 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4); 231 232 GlobalProperty hw_compat_2_3[] = { 233 { "virtio-blk-pci", "any_layout", "off" }, 234 { "virtio-balloon-pci", "any_layout", "off" }, 235 { "virtio-serial-pci", "any_layout", "off" }, 236 { "virtio-9p-pci", "any_layout", "off" }, 237 { "virtio-rng-pci", "any_layout", "off" }, 238 { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" }, 239 { "migration", "send-configuration", "off" }, 240 { "migration", "send-section-footer", "off" }, 241 { "migration", "store-global-state", "off" }, 242 }; 243 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3); 244 245 GlobalProperty hw_compat_2_2[] = {}; 246 const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2); 247 248 GlobalProperty hw_compat_2_1[] = { 249 { "intel-hda", "old_msi_addr", "on" }, 250 { "VGA", "qemu-extended-regs", "off" }, 251 { "secondary-vga", "qemu-extended-regs", "off" }, 252 { "virtio-scsi-pci", "any_layout", "off" }, 253 { "usb-mouse", "usb_version", "1" }, 254 { "usb-kbd", "usb_version", "1" }, 255 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" }, 256 }; 257 const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1); 258 259 MachineState *current_machine; 260 261 static char *machine_get_kernel(Object *obj, Error **errp) 262 { 263 MachineState *ms = MACHINE(obj); 264 265 return g_strdup(ms->kernel_filename); 266 } 267 268 static void machine_set_kernel(Object *obj, const char *value, Error **errp) 269 { 270 MachineState *ms = MACHINE(obj); 271 272 g_free(ms->kernel_filename); 273 ms->kernel_filename = g_strdup(value); 274 } 275 276 static char *machine_get_initrd(Object *obj, Error **errp) 277 { 278 MachineState *ms = MACHINE(obj); 279 280 return g_strdup(ms->initrd_filename); 281 } 282 283 static void machine_set_initrd(Object *obj, const char *value, Error **errp) 284 { 285 MachineState *ms = MACHINE(obj); 286 287 g_free(ms->initrd_filename); 288 ms->initrd_filename = g_strdup(value); 289 } 290 291 static char *machine_get_append(Object *obj, Error **errp) 292 { 293 MachineState *ms = MACHINE(obj); 294 295 return g_strdup(ms->kernel_cmdline); 296 } 297 298 static void machine_set_append(Object *obj, const char *value, Error **errp) 299 { 300 MachineState *ms = MACHINE(obj); 301 302 g_free(ms->kernel_cmdline); 303 ms->kernel_cmdline = g_strdup(value); 304 } 305 306 static char *machine_get_dtb(Object *obj, Error **errp) 307 { 308 MachineState *ms = MACHINE(obj); 309 310 return g_strdup(ms->dtb); 311 } 312 313 static void machine_set_dtb(Object *obj, const char *value, Error **errp) 314 { 315 MachineState *ms = MACHINE(obj); 316 317 g_free(ms->dtb); 318 ms->dtb = g_strdup(value); 319 } 320 321 static char *machine_get_dumpdtb(Object *obj, Error **errp) 322 { 323 MachineState *ms = MACHINE(obj); 324 325 return g_strdup(ms->dumpdtb); 326 } 327 328 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) 329 { 330 MachineState *ms = MACHINE(obj); 331 332 g_free(ms->dumpdtb); 333 ms->dumpdtb = g_strdup(value); 334 } 335 336 static void machine_get_phandle_start(Object *obj, Visitor *v, 337 const char *name, void *opaque, 338 Error **errp) 339 { 340 MachineState *ms = MACHINE(obj); 341 int64_t value = ms->phandle_start; 342 343 visit_type_int(v, name, &value, errp); 344 } 345 346 static void machine_set_phandle_start(Object *obj, Visitor *v, 347 const char *name, void *opaque, 348 Error **errp) 349 { 350 MachineState *ms = MACHINE(obj); 351 int64_t value; 352 353 if (!visit_type_int(v, name, &value, errp)) { 354 return; 355 } 356 357 ms->phandle_start = value; 358 } 359 360 static char *machine_get_dt_compatible(Object *obj, Error **errp) 361 { 362 MachineState *ms = MACHINE(obj); 363 364 return g_strdup(ms->dt_compatible); 365 } 366 367 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) 368 { 369 MachineState *ms = MACHINE(obj); 370 371 g_free(ms->dt_compatible); 372 ms->dt_compatible = g_strdup(value); 373 } 374 375 static bool machine_get_dump_guest_core(Object *obj, Error **errp) 376 { 377 MachineState *ms = MACHINE(obj); 378 379 return ms->dump_guest_core; 380 } 381 382 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) 383 { 384 MachineState *ms = MACHINE(obj); 385 386 ms->dump_guest_core = value; 387 } 388 389 static bool machine_get_mem_merge(Object *obj, Error **errp) 390 { 391 MachineState *ms = MACHINE(obj); 392 393 return ms->mem_merge; 394 } 395 396 static void machine_set_mem_merge(Object *obj, bool value, Error **errp) 397 { 398 MachineState *ms = MACHINE(obj); 399 400 ms->mem_merge = value; 401 } 402 403 static bool machine_get_usb(Object *obj, Error **errp) 404 { 405 MachineState *ms = MACHINE(obj); 406 407 return ms->usb; 408 } 409 410 static void machine_set_usb(Object *obj, bool value, Error **errp) 411 { 412 MachineState *ms = MACHINE(obj); 413 414 ms->usb = value; 415 ms->usb_disabled = !value; 416 } 417 418 static bool machine_get_graphics(Object *obj, Error **errp) 419 { 420 MachineState *ms = MACHINE(obj); 421 422 return ms->enable_graphics; 423 } 424 425 static void machine_set_graphics(Object *obj, bool value, Error **errp) 426 { 427 MachineState *ms = MACHINE(obj); 428 429 ms->enable_graphics = value; 430 } 431 432 static char *machine_get_firmware(Object *obj, Error **errp) 433 { 434 MachineState *ms = MACHINE(obj); 435 436 return g_strdup(ms->firmware); 437 } 438 439 static void machine_set_firmware(Object *obj, const char *value, Error **errp) 440 { 441 MachineState *ms = MACHINE(obj); 442 443 g_free(ms->firmware); 444 ms->firmware = g_strdup(value); 445 } 446 447 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) 448 { 449 MachineState *ms = MACHINE(obj); 450 451 ms->suppress_vmdesc = value; 452 } 453 454 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) 455 { 456 MachineState *ms = MACHINE(obj); 457 458 return ms->suppress_vmdesc; 459 } 460 461 static char *machine_get_memory_encryption(Object *obj, Error **errp) 462 { 463 MachineState *ms = MACHINE(obj); 464 465 if (ms->cgs) { 466 return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs))); 467 } 468 469 return NULL; 470 } 471 472 static void machine_set_memory_encryption(Object *obj, const char *value, 473 Error **errp) 474 { 475 Object *cgs = 476 object_resolve_path_component(object_get_objects_root(), value); 477 478 if (!cgs) { 479 error_setg(errp, "No such memory encryption object '%s'", value); 480 return; 481 } 482 483 object_property_set_link(obj, "confidential-guest-support", cgs, errp); 484 } 485 486 static void machine_check_confidential_guest_support(const Object *obj, 487 const char *name, 488 Object *new_target, 489 Error **errp) 490 { 491 /* 492 * So far the only constraint is that the target has the 493 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked 494 * by the QOM core 495 */ 496 } 497 498 static bool machine_get_nvdimm(Object *obj, Error **errp) 499 { 500 MachineState *ms = MACHINE(obj); 501 502 return ms->nvdimms_state->is_enabled; 503 } 504 505 static void machine_set_nvdimm(Object *obj, bool value, Error **errp) 506 { 507 MachineState *ms = MACHINE(obj); 508 509 ms->nvdimms_state->is_enabled = value; 510 } 511 512 static bool machine_get_hmat(Object *obj, Error **errp) 513 { 514 MachineState *ms = MACHINE(obj); 515 516 return ms->numa_state->hmat_enabled; 517 } 518 519 static void machine_set_hmat(Object *obj, bool value, Error **errp) 520 { 521 MachineState *ms = MACHINE(obj); 522 523 ms->numa_state->hmat_enabled = value; 524 } 525 526 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) 527 { 528 MachineState *ms = MACHINE(obj); 529 530 return g_strdup(ms->nvdimms_state->persistence_string); 531 } 532 533 static void machine_set_nvdimm_persistence(Object *obj, const char *value, 534 Error **errp) 535 { 536 MachineState *ms = MACHINE(obj); 537 NVDIMMState *nvdimms_state = ms->nvdimms_state; 538 539 if (strcmp(value, "cpu") == 0) { 540 nvdimms_state->persistence = 3; 541 } else if (strcmp(value, "mem-ctrl") == 0) { 542 nvdimms_state->persistence = 2; 543 } else { 544 error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", 545 value); 546 return; 547 } 548 549 g_free(nvdimms_state->persistence_string); 550 nvdimms_state->persistence_string = g_strdup(value); 551 } 552 553 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) 554 { 555 QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type)); 556 } 557 558 bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev) 559 { 560 Object *obj = OBJECT(dev); 561 562 if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) { 563 return false; 564 } 565 566 return device_type_is_dynamic_sysbus(mc, object_get_typename(obj)); 567 } 568 569 bool device_type_is_dynamic_sysbus(MachineClass *mc, const char *type) 570 { 571 bool allowed = false; 572 strList *wl; 573 ObjectClass *klass = object_class_by_name(type); 574 575 for (wl = mc->allowed_dynamic_sysbus_devices; 576 !allowed && wl; 577 wl = wl->next) { 578 allowed |= !!object_class_dynamic_cast(klass, wl->value); 579 } 580 581 return allowed; 582 } 583 584 static char *machine_get_memdev(Object *obj, Error **errp) 585 { 586 MachineState *ms = MACHINE(obj); 587 588 return g_strdup(ms->ram_memdev_id); 589 } 590 591 static void machine_set_memdev(Object *obj, const char *value, Error **errp) 592 { 593 MachineState *ms = MACHINE(obj); 594 595 g_free(ms->ram_memdev_id); 596 ms->ram_memdev_id = g_strdup(value); 597 } 598 599 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) 600 { 601 int i; 602 HotpluggableCPUList *head = NULL; 603 MachineClass *mc = MACHINE_GET_CLASS(machine); 604 605 /* force board to initialize possible_cpus if it hasn't been done yet */ 606 mc->possible_cpu_arch_ids(machine); 607 608 for (i = 0; i < machine->possible_cpus->len; i++) { 609 Object *cpu; 610 HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); 611 612 cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); 613 cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; 614 cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, 615 sizeof(*cpu_item->props)); 616 617 cpu = machine->possible_cpus->cpus[i].cpu; 618 if (cpu) { 619 cpu_item->has_qom_path = true; 620 cpu_item->qom_path = object_get_canonical_path(cpu); 621 } 622 QAPI_LIST_PREPEND(head, cpu_item); 623 } 624 return head; 625 } 626 627 /** 628 * machine_set_cpu_numa_node: 629 * @machine: machine object to modify 630 * @props: specifies which cpu objects to assign to 631 * numa node specified by @props.node_id 632 * @errp: if an error occurs, a pointer to an area to store the error 633 * 634 * Associate NUMA node specified by @props.node_id with cpu slots that 635 * match socket/core/thread-ids specified by @props. It's recommended to use 636 * query-hotpluggable-cpus.props values to specify affected cpu slots, 637 * which would lead to exact 1:1 mapping of cpu slots to NUMA node. 638 * 639 * However for CLI convenience it's possible to pass in subset of properties, 640 * which would affect all cpu slots that match it. 641 * Ex for pc machine: 642 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ 643 * -numa cpu,node-id=0,socket_id=0 \ 644 * -numa cpu,node-id=1,socket_id=1 645 * will assign all child cores of socket 0 to node 0 and 646 * of socket 1 to node 1. 647 * 648 * On attempt of reassigning (already assigned) cpu slot to another NUMA node, 649 * return error. 650 * Empty subset is disallowed and function will return with error in this case. 651 */ 652 void machine_set_cpu_numa_node(MachineState *machine, 653 const CpuInstanceProperties *props, Error **errp) 654 { 655 MachineClass *mc = MACHINE_GET_CLASS(machine); 656 NodeInfo *numa_info = machine->numa_state->nodes; 657 bool match = false; 658 int i; 659 660 if (!mc->possible_cpu_arch_ids) { 661 error_setg(errp, "mapping of CPUs to NUMA node is not supported"); 662 return; 663 } 664 665 /* disabling node mapping is not supported, forbid it */ 666 assert(props->has_node_id); 667 668 /* force board to initialize possible_cpus if it hasn't been done yet */ 669 mc->possible_cpu_arch_ids(machine); 670 671 for (i = 0; i < machine->possible_cpus->len; i++) { 672 CPUArchId *slot = &machine->possible_cpus->cpus[i]; 673 674 /* reject unsupported by board properties */ 675 if (props->has_thread_id && !slot->props.has_thread_id) { 676 error_setg(errp, "thread-id is not supported"); 677 return; 678 } 679 680 if (props->has_core_id && !slot->props.has_core_id) { 681 error_setg(errp, "core-id is not supported"); 682 return; 683 } 684 685 if (props->has_cluster_id && !slot->props.has_cluster_id) { 686 error_setg(errp, "cluster-id is not supported"); 687 return; 688 } 689 690 if (props->has_socket_id && !slot->props.has_socket_id) { 691 error_setg(errp, "socket-id is not supported"); 692 return; 693 } 694 695 if (props->has_die_id && !slot->props.has_die_id) { 696 error_setg(errp, "die-id is not supported"); 697 return; 698 } 699 700 /* skip slots with explicit mismatch */ 701 if (props->has_thread_id && props->thread_id != slot->props.thread_id) { 702 continue; 703 } 704 705 if (props->has_core_id && props->core_id != slot->props.core_id) { 706 continue; 707 } 708 709 if (props->has_cluster_id && 710 props->cluster_id != slot->props.cluster_id) { 711 continue; 712 } 713 714 if (props->has_die_id && props->die_id != slot->props.die_id) { 715 continue; 716 } 717 718 if (props->has_socket_id && props->socket_id != slot->props.socket_id) { 719 continue; 720 } 721 722 /* reject assignment if slot is already assigned, for compatibility 723 * of legacy cpu_index mapping with SPAPR core based mapping do not 724 * error out if cpu thread and matched core have the same node-id */ 725 if (slot->props.has_node_id && 726 slot->props.node_id != props->node_id) { 727 error_setg(errp, "CPU is already assigned to node-id: %" PRId64, 728 slot->props.node_id); 729 return; 730 } 731 732 /* assign slot to node as it's matched '-numa cpu' key */ 733 match = true; 734 slot->props.node_id = props->node_id; 735 slot->props.has_node_id = props->has_node_id; 736 737 if (machine->numa_state->hmat_enabled) { 738 if ((numa_info[props->node_id].initiator < MAX_NODES) && 739 (props->node_id != numa_info[props->node_id].initiator)) { 740 error_setg(errp, "The initiator of CPU NUMA node %" PRId64 741 " should be itself (got %" PRIu16 ")", 742 props->node_id, numa_info[props->node_id].initiator); 743 return; 744 } 745 numa_info[props->node_id].has_cpu = true; 746 numa_info[props->node_id].initiator = props->node_id; 747 } 748 } 749 750 if (!match) { 751 error_setg(errp, "no match found"); 752 } 753 } 754 755 static void machine_get_smp(Object *obj, Visitor *v, const char *name, 756 void *opaque, Error **errp) 757 { 758 MachineState *ms = MACHINE(obj); 759 SMPConfiguration *config = &(SMPConfiguration){ 760 .has_cpus = true, .cpus = ms->smp.cpus, 761 .has_sockets = true, .sockets = ms->smp.sockets, 762 .has_dies = true, .dies = ms->smp.dies, 763 .has_clusters = true, .clusters = ms->smp.clusters, 764 .has_cores = true, .cores = ms->smp.cores, 765 .has_threads = true, .threads = ms->smp.threads, 766 .has_maxcpus = true, .maxcpus = ms->smp.max_cpus, 767 }; 768 769 if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) { 770 return; 771 } 772 } 773 774 static void machine_set_smp(Object *obj, Visitor *v, const char *name, 775 void *opaque, Error **errp) 776 { 777 MachineState *ms = MACHINE(obj); 778 g_autoptr(SMPConfiguration) config = NULL; 779 780 if (!visit_type_SMPConfiguration(v, name, &config, errp)) { 781 return; 782 } 783 784 machine_parse_smp_config(ms, config, errp); 785 } 786 787 void machine_boot_parse(MachineState *ms, QemuOpts *opts, Error **errp) 788 { 789 MachineClass *machine_class = MACHINE_GET_CLASS(ms); 790 const char *s; 791 ERRP_GUARD(); 792 793 ms->boot_config = (BootConfiguration) { 794 .has_order = true, 795 .order = (char *)machine_class->default_boot_order, 796 .has_strict = true, 797 .strict = false, 798 }; 799 if (!opts) { 800 return; 801 } 802 803 s = qemu_opt_get(opts, "order"); 804 if (s) { 805 validate_bootdevices(s, errp); 806 if (*errp) { 807 return; 808 } 809 ms->boot_config.order = (char *)s; 810 } 811 812 s = qemu_opt_get(opts, "once"); 813 if (s) { 814 validate_bootdevices(s, errp); 815 if (*errp) { 816 return; 817 } 818 ms->boot_config.has_once = true; 819 ms->boot_config.once = (char *)s; 820 } 821 822 s = qemu_opt_get(opts, "splash"); 823 if (s) { 824 ms->boot_config.has_splash = true; 825 ms->boot_config.splash = (char *)s; 826 } 827 828 s = qemu_opt_get(opts, "splash-time"); 829 if (s) { 830 ms->boot_config.has_splash_time = true; 831 ms->boot_config.splash_time = qemu_opt_get_number(opts, "splash-time", -1); 832 } 833 834 s = qemu_opt_get(opts, "reboot-timeout"); 835 if (s) { 836 ms->boot_config.has_reboot_timeout = true; 837 ms->boot_config.reboot_timeout = qemu_opt_get_number(opts, "reboot-timeout", -1); 838 } 839 840 s = qemu_opt_get(opts, "menu"); 841 if (s) { 842 ms->boot_config.has_menu = true; 843 ms->boot_config.menu = qemu_opt_get_bool(opts, "menu", false); 844 } 845 846 ms->boot_config.strict = qemu_opt_get_bool(opts, "strict", false); 847 } 848 849 static void machine_class_init(ObjectClass *oc, void *data) 850 { 851 MachineClass *mc = MACHINE_CLASS(oc); 852 853 /* Default 128 MB as guest ram size */ 854 mc->default_ram_size = 128 * MiB; 855 mc->rom_file_has_mr = true; 856 857 /* numa node memory size aligned on 8MB by default. 858 * On Linux, each node's border has to be 8MB aligned 859 */ 860 mc->numa_mem_align_shift = 23; 861 862 object_class_property_add_str(oc, "kernel", 863 machine_get_kernel, machine_set_kernel); 864 object_class_property_set_description(oc, "kernel", 865 "Linux kernel image file"); 866 867 object_class_property_add_str(oc, "initrd", 868 machine_get_initrd, machine_set_initrd); 869 object_class_property_set_description(oc, "initrd", 870 "Linux initial ramdisk file"); 871 872 object_class_property_add_str(oc, "append", 873 machine_get_append, machine_set_append); 874 object_class_property_set_description(oc, "append", 875 "Linux kernel command line"); 876 877 object_class_property_add_str(oc, "dtb", 878 machine_get_dtb, machine_set_dtb); 879 object_class_property_set_description(oc, "dtb", 880 "Linux kernel device tree file"); 881 882 object_class_property_add_str(oc, "dumpdtb", 883 machine_get_dumpdtb, machine_set_dumpdtb); 884 object_class_property_set_description(oc, "dumpdtb", 885 "Dump current dtb to a file and quit"); 886 887 object_class_property_add(oc, "smp", "SMPConfiguration", 888 machine_get_smp, machine_set_smp, 889 NULL, NULL); 890 object_class_property_set_description(oc, "smp", 891 "CPU topology"); 892 893 object_class_property_add(oc, "phandle-start", "int", 894 machine_get_phandle_start, machine_set_phandle_start, 895 NULL, NULL); 896 object_class_property_set_description(oc, "phandle-start", 897 "The first phandle ID we may generate dynamically"); 898 899 object_class_property_add_str(oc, "dt-compatible", 900 machine_get_dt_compatible, machine_set_dt_compatible); 901 object_class_property_set_description(oc, "dt-compatible", 902 "Overrides the \"compatible\" property of the dt root node"); 903 904 object_class_property_add_bool(oc, "dump-guest-core", 905 machine_get_dump_guest_core, machine_set_dump_guest_core); 906 object_class_property_set_description(oc, "dump-guest-core", 907 "Include guest memory in a core dump"); 908 909 object_class_property_add_bool(oc, "mem-merge", 910 machine_get_mem_merge, machine_set_mem_merge); 911 object_class_property_set_description(oc, "mem-merge", 912 "Enable/disable memory merge support"); 913 914 object_class_property_add_bool(oc, "usb", 915 machine_get_usb, machine_set_usb); 916 object_class_property_set_description(oc, "usb", 917 "Set on/off to enable/disable usb"); 918 919 object_class_property_add_bool(oc, "graphics", 920 machine_get_graphics, machine_set_graphics); 921 object_class_property_set_description(oc, "graphics", 922 "Set on/off to enable/disable graphics emulation"); 923 924 object_class_property_add_str(oc, "firmware", 925 machine_get_firmware, machine_set_firmware); 926 object_class_property_set_description(oc, "firmware", 927 "Firmware image"); 928 929 object_class_property_add_bool(oc, "suppress-vmdesc", 930 machine_get_suppress_vmdesc, machine_set_suppress_vmdesc); 931 object_class_property_set_description(oc, "suppress-vmdesc", 932 "Set on to disable self-describing migration"); 933 934 object_class_property_add_link(oc, "confidential-guest-support", 935 TYPE_CONFIDENTIAL_GUEST_SUPPORT, 936 offsetof(MachineState, cgs), 937 machine_check_confidential_guest_support, 938 OBJ_PROP_LINK_STRONG); 939 object_class_property_set_description(oc, "confidential-guest-support", 940 "Set confidential guest scheme to support"); 941 942 /* For compatibility */ 943 object_class_property_add_str(oc, "memory-encryption", 944 machine_get_memory_encryption, machine_set_memory_encryption); 945 object_class_property_set_description(oc, "memory-encryption", 946 "Set memory encryption object to use"); 947 948 object_class_property_add_str(oc, "memory-backend", 949 machine_get_memdev, machine_set_memdev); 950 object_class_property_set_description(oc, "memory-backend", 951 "Set RAM backend" 952 "Valid value is ID of hostmem based backend"); 953 } 954 955 static void machine_class_base_init(ObjectClass *oc, void *data) 956 { 957 MachineClass *mc = MACHINE_CLASS(oc); 958 mc->max_cpus = mc->max_cpus ?: 1; 959 mc->min_cpus = mc->min_cpus ?: 1; 960 mc->default_cpus = mc->default_cpus ?: 1; 961 962 if (!object_class_is_abstract(oc)) { 963 const char *cname = object_class_get_name(oc); 964 assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); 965 mc->name = g_strndup(cname, 966 strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); 967 mc->compat_props = g_ptr_array_new(); 968 } 969 } 970 971 static void machine_initfn(Object *obj) 972 { 973 MachineState *ms = MACHINE(obj); 974 MachineClass *mc = MACHINE_GET_CLASS(obj); 975 976 container_get(obj, "/peripheral"); 977 container_get(obj, "/peripheral-anon"); 978 979 ms->dump_guest_core = true; 980 ms->mem_merge = true; 981 ms->enable_graphics = true; 982 ms->kernel_cmdline = g_strdup(""); 983 984 if (mc->nvdimm_supported) { 985 Object *obj = OBJECT(ms); 986 987 ms->nvdimms_state = g_new0(NVDIMMState, 1); 988 object_property_add_bool(obj, "nvdimm", 989 machine_get_nvdimm, machine_set_nvdimm); 990 object_property_set_description(obj, "nvdimm", 991 "Set on/off to enable/disable " 992 "NVDIMM instantiation"); 993 994 object_property_add_str(obj, "nvdimm-persistence", 995 machine_get_nvdimm_persistence, 996 machine_set_nvdimm_persistence); 997 object_property_set_description(obj, "nvdimm-persistence", 998 "Set NVDIMM persistence" 999 "Valid values are cpu, mem-ctrl"); 1000 } 1001 1002 if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { 1003 ms->numa_state = g_new0(NumaState, 1); 1004 object_property_add_bool(obj, "hmat", 1005 machine_get_hmat, machine_set_hmat); 1006 object_property_set_description(obj, "hmat", 1007 "Set on/off to enable/disable " 1008 "ACPI Heterogeneous Memory Attribute " 1009 "Table (HMAT)"); 1010 } 1011 1012 /* default to mc->default_cpus */ 1013 ms->smp.cpus = mc->default_cpus; 1014 ms->smp.max_cpus = mc->default_cpus; 1015 ms->smp.sockets = 1; 1016 ms->smp.dies = 1; 1017 ms->smp.clusters = 1; 1018 ms->smp.cores = 1; 1019 ms->smp.threads = 1; 1020 } 1021 1022 static void machine_finalize(Object *obj) 1023 { 1024 MachineState *ms = MACHINE(obj); 1025 1026 g_free(ms->kernel_filename); 1027 g_free(ms->initrd_filename); 1028 g_free(ms->kernel_cmdline); 1029 g_free(ms->dtb); 1030 g_free(ms->dumpdtb); 1031 g_free(ms->dt_compatible); 1032 g_free(ms->firmware); 1033 g_free(ms->device_memory); 1034 g_free(ms->nvdimms_state); 1035 g_free(ms->numa_state); 1036 } 1037 1038 bool machine_usb(MachineState *machine) 1039 { 1040 return machine->usb; 1041 } 1042 1043 int machine_phandle_start(MachineState *machine) 1044 { 1045 return machine->phandle_start; 1046 } 1047 1048 bool machine_dump_guest_core(MachineState *machine) 1049 { 1050 return machine->dump_guest_core; 1051 } 1052 1053 bool machine_mem_merge(MachineState *machine) 1054 { 1055 return machine->mem_merge; 1056 } 1057 1058 static char *cpu_slot_to_string(const CPUArchId *cpu) 1059 { 1060 GString *s = g_string_new(NULL); 1061 if (cpu->props.has_socket_id) { 1062 g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); 1063 } 1064 if (cpu->props.has_die_id) { 1065 if (s->len) { 1066 g_string_append_printf(s, ", "); 1067 } 1068 g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id); 1069 } 1070 if (cpu->props.has_cluster_id) { 1071 if (s->len) { 1072 g_string_append_printf(s, ", "); 1073 } 1074 g_string_append_printf(s, "cluster-id: %"PRId64, cpu->props.cluster_id); 1075 } 1076 if (cpu->props.has_core_id) { 1077 if (s->len) { 1078 g_string_append_printf(s, ", "); 1079 } 1080 g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); 1081 } 1082 if (cpu->props.has_thread_id) { 1083 if (s->len) { 1084 g_string_append_printf(s, ", "); 1085 } 1086 g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); 1087 } 1088 return g_string_free(s, false); 1089 } 1090 1091 static void numa_validate_initiator(NumaState *numa_state) 1092 { 1093 int i; 1094 NodeInfo *numa_info = numa_state->nodes; 1095 1096 for (i = 0; i < numa_state->num_nodes; i++) { 1097 if (numa_info[i].initiator == MAX_NODES) { 1098 error_report("The initiator of NUMA node %d is missing, use " 1099 "'-numa node,initiator' option to declare it", i); 1100 exit(1); 1101 } 1102 1103 if (!numa_info[numa_info[i].initiator].present) { 1104 error_report("NUMA node %" PRIu16 " is missing, use " 1105 "'-numa node' option to declare it first", 1106 numa_info[i].initiator); 1107 exit(1); 1108 } 1109 1110 if (!numa_info[numa_info[i].initiator].has_cpu) { 1111 error_report("The initiator of NUMA node %d is invalid", i); 1112 exit(1); 1113 } 1114 } 1115 } 1116 1117 static void machine_numa_finish_cpu_init(MachineState *machine) 1118 { 1119 int i; 1120 bool default_mapping; 1121 GString *s = g_string_new(NULL); 1122 MachineClass *mc = MACHINE_GET_CLASS(machine); 1123 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); 1124 1125 assert(machine->numa_state->num_nodes); 1126 for (i = 0; i < possible_cpus->len; i++) { 1127 if (possible_cpus->cpus[i].props.has_node_id) { 1128 break; 1129 } 1130 } 1131 default_mapping = (i == possible_cpus->len); 1132 1133 for (i = 0; i < possible_cpus->len; i++) { 1134 const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; 1135 1136 if (!cpu_slot->props.has_node_id) { 1137 /* fetch default mapping from board and enable it */ 1138 CpuInstanceProperties props = cpu_slot->props; 1139 1140 props.node_id = mc->get_default_cpu_node_id(machine, i); 1141 if (!default_mapping) { 1142 /* record slots with not set mapping, 1143 * TODO: make it hard error in future */ 1144 char *cpu_str = cpu_slot_to_string(cpu_slot); 1145 g_string_append_printf(s, "%sCPU %d [%s]", 1146 s->len ? ", " : "", i, cpu_str); 1147 g_free(cpu_str); 1148 1149 /* non mapped cpus used to fallback to node 0 */ 1150 props.node_id = 0; 1151 } 1152 1153 props.has_node_id = true; 1154 machine_set_cpu_numa_node(machine, &props, &error_fatal); 1155 } 1156 } 1157 1158 if (machine->numa_state->hmat_enabled) { 1159 numa_validate_initiator(machine->numa_state); 1160 } 1161 1162 if (s->len && !qtest_enabled()) { 1163 warn_report("CPU(s) not present in any NUMA nodes: %s", 1164 s->str); 1165 warn_report("All CPU(s) up to maxcpus should be described " 1166 "in NUMA config, ability to start up with partial NUMA " 1167 "mappings is obsoleted and will be removed in future"); 1168 } 1169 g_string_free(s, true); 1170 } 1171 1172 MemoryRegion *machine_consume_memdev(MachineState *machine, 1173 HostMemoryBackend *backend) 1174 { 1175 MemoryRegion *ret = host_memory_backend_get_memory(backend); 1176 1177 if (host_memory_backend_is_mapped(backend)) { 1178 error_report("memory backend %s can't be used multiple times.", 1179 object_get_canonical_path_component(OBJECT(backend))); 1180 exit(EXIT_FAILURE); 1181 } 1182 host_memory_backend_set_mapped(backend, true); 1183 vmstate_register_ram_global(ret); 1184 return ret; 1185 } 1186 1187 void machine_run_board_init(MachineState *machine) 1188 { 1189 MachineClass *machine_class = MACHINE_GET_CLASS(machine); 1190 ObjectClass *oc = object_class_by_name(machine->cpu_type); 1191 CPUClass *cc; 1192 1193 /* This checkpoint is required by replay to separate prior clock 1194 reading from the other reads, because timer polling functions query 1195 clock values from the log. */ 1196 replay_checkpoint(CHECKPOINT_INIT); 1197 1198 if (machine->ram_memdev_id) { 1199 Object *o; 1200 o = object_resolve_path_type(machine->ram_memdev_id, 1201 TYPE_MEMORY_BACKEND, NULL); 1202 machine->ram = machine_consume_memdev(machine, MEMORY_BACKEND(o)); 1203 } 1204 1205 if (machine->numa_state) { 1206 numa_complete_configuration(machine); 1207 if (machine->numa_state->num_nodes) { 1208 machine_numa_finish_cpu_init(machine); 1209 } 1210 } 1211 1212 /* If the machine supports the valid_cpu_types check and the user 1213 * specified a CPU with -cpu check here that the user CPU is supported. 1214 */ 1215 if (machine_class->valid_cpu_types && machine->cpu_type) { 1216 int i; 1217 1218 for (i = 0; machine_class->valid_cpu_types[i]; i++) { 1219 if (object_class_dynamic_cast(oc, 1220 machine_class->valid_cpu_types[i])) { 1221 /* The user specificed CPU is in the valid field, we are 1222 * good to go. 1223 */ 1224 break; 1225 } 1226 } 1227 1228 if (!machine_class->valid_cpu_types[i]) { 1229 /* The user specified CPU is not valid */ 1230 error_report("Invalid CPU type: %s", machine->cpu_type); 1231 error_printf("The valid types are: %s", 1232 machine_class->valid_cpu_types[0]); 1233 for (i = 1; machine_class->valid_cpu_types[i]; i++) { 1234 error_printf(", %s", machine_class->valid_cpu_types[i]); 1235 } 1236 error_printf("\n"); 1237 1238 exit(1); 1239 } 1240 } 1241 1242 /* Check if CPU type is deprecated and warn if so */ 1243 cc = CPU_CLASS(oc); 1244 if (cc && cc->deprecation_note) { 1245 warn_report("CPU model %s is deprecated -- %s", machine->cpu_type, 1246 cc->deprecation_note); 1247 } 1248 1249 if (machine->cgs) { 1250 /* 1251 * With confidential guests, the host can't see the real 1252 * contents of RAM, so there's no point in it trying to merge 1253 * areas. 1254 */ 1255 machine_set_mem_merge(OBJECT(machine), false, &error_abort); 1256 1257 /* 1258 * Virtio devices can't count on directly accessing guest 1259 * memory, so they need iommu_platform=on to use normal DMA 1260 * mechanisms. That requires also disabling legacy virtio 1261 * support for those virtio pci devices which allow it. 1262 */ 1263 object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy", 1264 "on", true); 1265 object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform", 1266 "on", false); 1267 } 1268 1269 accel_init_interfaces(ACCEL_GET_CLASS(machine->accelerator)); 1270 machine_class->init(machine); 1271 phase_advance(PHASE_MACHINE_INITIALIZED); 1272 } 1273 1274 static NotifierList machine_init_done_notifiers = 1275 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers); 1276 1277 void qemu_add_machine_init_done_notifier(Notifier *notify) 1278 { 1279 notifier_list_add(&machine_init_done_notifiers, notify); 1280 if (phase_check(PHASE_MACHINE_READY)) { 1281 notify->notify(notify, NULL); 1282 } 1283 } 1284 1285 void qemu_remove_machine_init_done_notifier(Notifier *notify) 1286 { 1287 notifier_remove(notify); 1288 } 1289 1290 void qdev_machine_creation_done(void) 1291 { 1292 cpu_synchronize_all_post_init(); 1293 1294 if (current_machine->boot_config.has_once) { 1295 qemu_boot_set(current_machine->boot_config.once, &error_fatal); 1296 qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_config.order)); 1297 } 1298 1299 /* 1300 * ok, initial machine setup is done, starting from now we can 1301 * only create hotpluggable devices 1302 */ 1303 phase_advance(PHASE_MACHINE_READY); 1304 qdev_assert_realized_properly(); 1305 1306 /* TODO: once all bus devices are qdevified, this should be done 1307 * when bus is created by qdev.c */ 1308 /* 1309 * TODO: If we had a main 'reset container' that the whole system 1310 * lived in, we could reset that using the multi-phase reset 1311 * APIs. For the moment, we just reset the sysbus, which will cause 1312 * all devices hanging off it (and all their child buses, recursively) 1313 * to be reset. Note that this will *not* reset any Device objects 1314 * which are not attached to some part of the qbus tree! 1315 */ 1316 qemu_register_reset(resettable_cold_reset_fn, sysbus_get_default()); 1317 1318 notifier_list_notify(&machine_init_done_notifiers, NULL); 1319 1320 if (rom_check_and_register_reset() != 0) { 1321 exit(1); 1322 } 1323 1324 replay_start(); 1325 1326 /* This checkpoint is required by replay to separate prior clock 1327 reading from the other reads, because timer polling functions query 1328 clock values from the log. */ 1329 replay_checkpoint(CHECKPOINT_RESET); 1330 qemu_system_reset(SHUTDOWN_CAUSE_NONE); 1331 register_global_state(); 1332 } 1333 1334 static const TypeInfo machine_info = { 1335 .name = TYPE_MACHINE, 1336 .parent = TYPE_OBJECT, 1337 .abstract = true, 1338 .class_size = sizeof(MachineClass), 1339 .class_init = machine_class_init, 1340 .class_base_init = machine_class_base_init, 1341 .instance_size = sizeof(MachineState), 1342 .instance_init = machine_initfn, 1343 .instance_finalize = machine_finalize, 1344 }; 1345 1346 static void machine_register_types(void) 1347 { 1348 type_register_static(&machine_info); 1349 } 1350 1351 type_init(machine_register_types) 1352