xref: /openbmc/qemu/hw/core/machine.c (revision 8e6fe6b8)
1 /*
2  * QEMU Machine
3  *
4  * Copyright (C) 2014 Red Hat Inc
5  *
6  * Authors:
7  *   Marcel Apfelbaum <marcel.a@redhat.com>
8  *
9  * This work is licensed under the terms of the GNU GPL, version 2 or later.
10  * See the COPYING file in the top-level directory.
11  */
12 
13 #include "qemu/osdep.h"
14 #include "qemu/units.h"
15 #include "hw/boards.h"
16 #include "qapi/error.h"
17 #include "qapi/qapi-visit-common.h"
18 #include "qapi/visitor.h"
19 #include "hw/sysbus.h"
20 #include "sysemu/sysemu.h"
21 #include "sysemu/numa.h"
22 #include "qemu/error-report.h"
23 #include "sysemu/qtest.h"
24 #include "hw/pci/pci.h"
25 #include "hw/mem/nvdimm.h"
26 
27 GlobalProperty hw_compat_4_0_1[] = {
28     { "VGA",            "edid", "false" },
29     { "secondary-vga",  "edid", "false" },
30     { "bochs-display",  "edid", "false" },
31     { "virtio-vga",     "edid", "false" },
32     { "virtio-gpu-pci", "edid", "false" },
33 };
34 const size_t hw_compat_4_0_1_len = G_N_ELEMENTS(hw_compat_4_0_1);
35 
36 GlobalProperty hw_compat_4_0[] = {};
37 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0);
38 
39 GlobalProperty hw_compat_3_1[] = {
40     { "pcie-root-port", "x-speed", "2_5" },
41     { "pcie-root-port", "x-width", "1" },
42     { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
43     { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
44     { "tpm-crb", "ppi", "false" },
45     { "tpm-tis", "ppi", "false" },
46     { "usb-kbd", "serial", "42" },
47     { "usb-mouse", "serial", "42" },
48     { "usb-tablet", "serial", "42" },
49     { "virtio-blk-device", "discard", "false" },
50     { "virtio-blk-device", "write-zeroes", "false" },
51 };
52 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1);
53 
54 GlobalProperty hw_compat_3_0[] = {};
55 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0);
56 
57 GlobalProperty hw_compat_2_12[] = {
58     { "migration", "decompress-error-check", "off" },
59     { "hda-audio", "use-timer", "false" },
60     { "cirrus-vga", "global-vmstate", "true" },
61     { "VGA", "global-vmstate", "true" },
62     { "vmware-svga", "global-vmstate", "true" },
63     { "qxl-vga", "global-vmstate", "true" },
64 };
65 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12);
66 
67 GlobalProperty hw_compat_2_11[] = {
68     { "hpet", "hpet-offset-saved", "false" },
69     { "virtio-blk-pci", "vectors", "2" },
70     { "vhost-user-blk-pci", "vectors", "2" },
71     { "e1000", "migrate_tso_props", "off" },
72 };
73 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11);
74 
75 GlobalProperty hw_compat_2_10[] = {
76     { "virtio-mouse-device", "wheel-axis", "false" },
77     { "virtio-tablet-device", "wheel-axis", "false" },
78 };
79 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10);
80 
81 GlobalProperty hw_compat_2_9[] = {
82     { "pci-bridge", "shpc", "off" },
83     { "intel-iommu", "pt", "off" },
84     { "virtio-net-device", "x-mtu-bypass-backend", "off" },
85     { "pcie-root-port", "x-migrate-msix", "false" },
86 };
87 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9);
88 
89 GlobalProperty hw_compat_2_8[] = {
90     { "fw_cfg_mem", "x-file-slots", "0x10" },
91     { "fw_cfg_io", "x-file-slots", "0x10" },
92     { "pflash_cfi01", "old-multiple-chip-handling", "on" },
93     { "pci-bridge", "shpc", "on" },
94     { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" },
95     { "virtio-pci", "x-pcie-deverr-init", "off" },
96     { "virtio-pci", "x-pcie-lnkctl-init", "off" },
97     { "virtio-pci", "x-pcie-pm-init", "off" },
98     { "cirrus-vga", "vgamem_mb", "8" },
99     { "isa-cirrus-vga", "vgamem_mb", "8" },
100 };
101 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8);
102 
103 GlobalProperty hw_compat_2_7[] = {
104     { "virtio-pci", "page-per-vq", "on" },
105     { "virtio-serial-device", "emergency-write", "off" },
106     { "ioapic", "version", "0x11" },
107     { "intel-iommu", "x-buggy-eim", "true" },
108     { "virtio-pci", "x-ignore-backend-features", "on" },
109 };
110 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7);
111 
112 GlobalProperty hw_compat_2_6[] = {
113     { "virtio-mmio", "format_transport_address", "off" },
114     /*
115      * don't include devices which are modern-only
116      * ie keyboard, mouse, tablet, gpu, vga & crypto
117      */
118     { "virtio-9p-pci", "disable-modern", "on" },
119     { "virtio-9p-pci", "disable-legacy", "off" },
120     { "virtio-balloon-pci", "disable-modern", "on" },
121     { "virtio-balloon-pci", "disable-legacy", "off" },
122     { "virtio-blk-pci", "disable-modern", "on" },
123     { "virtio-blk-pci", "disable-legacy", "off" },
124     { "virtio-input-host-pci", "disable-modern", "on" },
125     { "virtio-input-host-pci", "disable-legacy", "off" },
126     { "virtio-net-pci", "disable-modern", "on" },
127     { "virtio-net-pci", "disable-legacy", "off" },
128     { "virtio-rng-pci", "disable-modern", "on" },
129     { "virtio-rng-pci", "disable-legacy", "off" },
130     { "virtio-scsi-pci", "disable-modern", "on" },
131     { "virtio-scsi-pci", "disable-legacy", "off" },
132     { "virtio-serial-pci", "disable-modern", "on" },
133     { "virtio-serial-pci", "disable-legacy", "off" },
134 };
135 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6);
136 
137 GlobalProperty hw_compat_2_5[] = {
138     { "isa-fdc", "fallback", "144" },
139     { "pvscsi", "x-old-pci-configuration", "on" },
140     { "pvscsi", "x-disable-pcie", "on" },
141     { "vmxnet3", "x-old-msi-offsets", "on" },
142     { "vmxnet3", "x-disable-pcie", "on" },
143 };
144 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5);
145 
146 GlobalProperty hw_compat_2_4[] = {
147     { "virtio-blk-device", "scsi", "true" },
148     { "e1000", "extra_mac_registers", "off" },
149     { "virtio-pci", "x-disable-pcie", "on" },
150     { "virtio-pci", "migrate-extra", "off" },
151     { "fw_cfg_mem", "dma_enabled", "off" },
152     { "fw_cfg_io", "dma_enabled", "off" }
153 };
154 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4);
155 
156 GlobalProperty hw_compat_2_3[] = {
157     { "virtio-blk-pci", "any_layout", "off" },
158     { "virtio-balloon-pci", "any_layout", "off" },
159     { "virtio-serial-pci", "any_layout", "off" },
160     { "virtio-9p-pci", "any_layout", "off" },
161     { "virtio-rng-pci", "any_layout", "off" },
162     { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" },
163     { "migration", "send-configuration", "off" },
164     { "migration", "send-section-footer", "off" },
165     { "migration", "store-global-state", "off" },
166 };
167 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3);
168 
169 GlobalProperty hw_compat_2_2[] = {};
170 const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2);
171 
172 GlobalProperty hw_compat_2_1[] = {
173     { "intel-hda", "old_msi_addr", "on" },
174     { "VGA", "qemu-extended-regs", "off" },
175     { "secondary-vga", "qemu-extended-regs", "off" },
176     { "virtio-scsi-pci", "any_layout", "off" },
177     { "usb-mouse", "usb_version", "1" },
178     { "usb-kbd", "usb_version", "1" },
179     { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
180 };
181 const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1);
182 
183 static char *machine_get_accel(Object *obj, Error **errp)
184 {
185     MachineState *ms = MACHINE(obj);
186 
187     return g_strdup(ms->accel);
188 }
189 
190 static void machine_set_accel(Object *obj, const char *value, Error **errp)
191 {
192     MachineState *ms = MACHINE(obj);
193 
194     g_free(ms->accel);
195     ms->accel = g_strdup(value);
196 }
197 
198 static void machine_set_kernel_irqchip(Object *obj, Visitor *v,
199                                        const char *name, void *opaque,
200                                        Error **errp)
201 {
202     Error *err = NULL;
203     MachineState *ms = MACHINE(obj);
204     OnOffSplit mode;
205 
206     visit_type_OnOffSplit(v, name, &mode, &err);
207     if (err) {
208         error_propagate(errp, err);
209         return;
210     } else {
211         switch (mode) {
212         case ON_OFF_SPLIT_ON:
213             ms->kernel_irqchip_allowed = true;
214             ms->kernel_irqchip_required = true;
215             ms->kernel_irqchip_split = false;
216             break;
217         case ON_OFF_SPLIT_OFF:
218             ms->kernel_irqchip_allowed = false;
219             ms->kernel_irqchip_required = false;
220             ms->kernel_irqchip_split = false;
221             break;
222         case ON_OFF_SPLIT_SPLIT:
223             ms->kernel_irqchip_allowed = true;
224             ms->kernel_irqchip_required = true;
225             ms->kernel_irqchip_split = true;
226             break;
227         default:
228             /* The value was checked in visit_type_OnOffSplit() above. If
229              * we get here, then something is wrong in QEMU.
230              */
231             abort();
232         }
233     }
234 }
235 
236 static void machine_get_kvm_shadow_mem(Object *obj, Visitor *v,
237                                        const char *name, void *opaque,
238                                        Error **errp)
239 {
240     MachineState *ms = MACHINE(obj);
241     int64_t value = ms->kvm_shadow_mem;
242 
243     visit_type_int(v, name, &value, errp);
244 }
245 
246 static void machine_set_kvm_shadow_mem(Object *obj, Visitor *v,
247                                        const char *name, void *opaque,
248                                        Error **errp)
249 {
250     MachineState *ms = MACHINE(obj);
251     Error *error = NULL;
252     int64_t value;
253 
254     visit_type_int(v, name, &value, &error);
255     if (error) {
256         error_propagate(errp, error);
257         return;
258     }
259 
260     ms->kvm_shadow_mem = value;
261 }
262 
263 static char *machine_get_kernel(Object *obj, Error **errp)
264 {
265     MachineState *ms = MACHINE(obj);
266 
267     return g_strdup(ms->kernel_filename);
268 }
269 
270 static void machine_set_kernel(Object *obj, const char *value, Error **errp)
271 {
272     MachineState *ms = MACHINE(obj);
273 
274     g_free(ms->kernel_filename);
275     ms->kernel_filename = g_strdup(value);
276 }
277 
278 static char *machine_get_initrd(Object *obj, Error **errp)
279 {
280     MachineState *ms = MACHINE(obj);
281 
282     return g_strdup(ms->initrd_filename);
283 }
284 
285 static void machine_set_initrd(Object *obj, const char *value, Error **errp)
286 {
287     MachineState *ms = MACHINE(obj);
288 
289     g_free(ms->initrd_filename);
290     ms->initrd_filename = g_strdup(value);
291 }
292 
293 static char *machine_get_append(Object *obj, Error **errp)
294 {
295     MachineState *ms = MACHINE(obj);
296 
297     return g_strdup(ms->kernel_cmdline);
298 }
299 
300 static void machine_set_append(Object *obj, const char *value, Error **errp)
301 {
302     MachineState *ms = MACHINE(obj);
303 
304     g_free(ms->kernel_cmdline);
305     ms->kernel_cmdline = g_strdup(value);
306 }
307 
308 static char *machine_get_dtb(Object *obj, Error **errp)
309 {
310     MachineState *ms = MACHINE(obj);
311 
312     return g_strdup(ms->dtb);
313 }
314 
315 static void machine_set_dtb(Object *obj, const char *value, Error **errp)
316 {
317     MachineState *ms = MACHINE(obj);
318 
319     g_free(ms->dtb);
320     ms->dtb = g_strdup(value);
321 }
322 
323 static char *machine_get_dumpdtb(Object *obj, Error **errp)
324 {
325     MachineState *ms = MACHINE(obj);
326 
327     return g_strdup(ms->dumpdtb);
328 }
329 
330 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp)
331 {
332     MachineState *ms = MACHINE(obj);
333 
334     g_free(ms->dumpdtb);
335     ms->dumpdtb = g_strdup(value);
336 }
337 
338 static void machine_get_phandle_start(Object *obj, Visitor *v,
339                                       const char *name, void *opaque,
340                                       Error **errp)
341 {
342     MachineState *ms = MACHINE(obj);
343     int64_t value = ms->phandle_start;
344 
345     visit_type_int(v, name, &value, errp);
346 }
347 
348 static void machine_set_phandle_start(Object *obj, Visitor *v,
349                                       const char *name, void *opaque,
350                                       Error **errp)
351 {
352     MachineState *ms = MACHINE(obj);
353     Error *error = NULL;
354     int64_t value;
355 
356     visit_type_int(v, name, &value, &error);
357     if (error) {
358         error_propagate(errp, error);
359         return;
360     }
361 
362     ms->phandle_start = value;
363 }
364 
365 static char *machine_get_dt_compatible(Object *obj, Error **errp)
366 {
367     MachineState *ms = MACHINE(obj);
368 
369     return g_strdup(ms->dt_compatible);
370 }
371 
372 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp)
373 {
374     MachineState *ms = MACHINE(obj);
375 
376     g_free(ms->dt_compatible);
377     ms->dt_compatible = g_strdup(value);
378 }
379 
380 static bool machine_get_dump_guest_core(Object *obj, Error **errp)
381 {
382     MachineState *ms = MACHINE(obj);
383 
384     return ms->dump_guest_core;
385 }
386 
387 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp)
388 {
389     MachineState *ms = MACHINE(obj);
390 
391     ms->dump_guest_core = value;
392 }
393 
394 static bool machine_get_mem_merge(Object *obj, Error **errp)
395 {
396     MachineState *ms = MACHINE(obj);
397 
398     return ms->mem_merge;
399 }
400 
401 static void machine_set_mem_merge(Object *obj, bool value, Error **errp)
402 {
403     MachineState *ms = MACHINE(obj);
404 
405     ms->mem_merge = value;
406 }
407 
408 static bool machine_get_usb(Object *obj, Error **errp)
409 {
410     MachineState *ms = MACHINE(obj);
411 
412     return ms->usb;
413 }
414 
415 static void machine_set_usb(Object *obj, bool value, Error **errp)
416 {
417     MachineState *ms = MACHINE(obj);
418 
419     ms->usb = value;
420     ms->usb_disabled = !value;
421 }
422 
423 static bool machine_get_graphics(Object *obj, Error **errp)
424 {
425     MachineState *ms = MACHINE(obj);
426 
427     return ms->enable_graphics;
428 }
429 
430 static void machine_set_graphics(Object *obj, bool value, Error **errp)
431 {
432     MachineState *ms = MACHINE(obj);
433 
434     ms->enable_graphics = value;
435 }
436 
437 static bool machine_get_igd_gfx_passthru(Object *obj, Error **errp)
438 {
439     MachineState *ms = MACHINE(obj);
440 
441     return ms->igd_gfx_passthru;
442 }
443 
444 static void machine_set_igd_gfx_passthru(Object *obj, bool value, Error **errp)
445 {
446     MachineState *ms = MACHINE(obj);
447 
448     ms->igd_gfx_passthru = value;
449 }
450 
451 static char *machine_get_firmware(Object *obj, Error **errp)
452 {
453     MachineState *ms = MACHINE(obj);
454 
455     return g_strdup(ms->firmware);
456 }
457 
458 static void machine_set_firmware(Object *obj, const char *value, Error **errp)
459 {
460     MachineState *ms = MACHINE(obj);
461 
462     g_free(ms->firmware);
463     ms->firmware = g_strdup(value);
464 }
465 
466 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp)
467 {
468     MachineState *ms = MACHINE(obj);
469 
470     ms->suppress_vmdesc = value;
471 }
472 
473 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp)
474 {
475     MachineState *ms = MACHINE(obj);
476 
477     return ms->suppress_vmdesc;
478 }
479 
480 static void machine_set_enforce_config_section(Object *obj, bool value,
481                                              Error **errp)
482 {
483     MachineState *ms = MACHINE(obj);
484 
485     warn_report("enforce-config-section is deprecated, please use "
486                 "-global migration.send-configuration=on|off instead");
487 
488     ms->enforce_config_section = value;
489 }
490 
491 static bool machine_get_enforce_config_section(Object *obj, Error **errp)
492 {
493     MachineState *ms = MACHINE(obj);
494 
495     return ms->enforce_config_section;
496 }
497 
498 static char *machine_get_memory_encryption(Object *obj, Error **errp)
499 {
500     MachineState *ms = MACHINE(obj);
501 
502     return g_strdup(ms->memory_encryption);
503 }
504 
505 static void machine_set_memory_encryption(Object *obj, const char *value,
506                                         Error **errp)
507 {
508     MachineState *ms = MACHINE(obj);
509 
510     g_free(ms->memory_encryption);
511     ms->memory_encryption = g_strdup(value);
512 }
513 
514 static bool machine_get_nvdimm(Object *obj, Error **errp)
515 {
516     MachineState *ms = MACHINE(obj);
517 
518     return ms->nvdimms_state->is_enabled;
519 }
520 
521 static void machine_set_nvdimm(Object *obj, bool value, Error **errp)
522 {
523     MachineState *ms = MACHINE(obj);
524 
525     ms->nvdimms_state->is_enabled = value;
526 }
527 
528 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp)
529 {
530     MachineState *ms = MACHINE(obj);
531 
532     return g_strdup(ms->nvdimms_state->persistence_string);
533 }
534 
535 static void machine_set_nvdimm_persistence(Object *obj, const char *value,
536                                            Error **errp)
537 {
538     MachineState *ms = MACHINE(obj);
539     NVDIMMState *nvdimms_state = ms->nvdimms_state;
540 
541     if (strcmp(value, "cpu") == 0) {
542         nvdimms_state->persistence = 3;
543     } else if (strcmp(value, "mem-ctrl") == 0) {
544         nvdimms_state->persistence = 2;
545     } else {
546         error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option",
547                    value);
548         return;
549     }
550 
551     g_free(nvdimms_state->persistence_string);
552     nvdimms_state->persistence_string = g_strdup(value);
553 }
554 
555 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type)
556 {
557     strList *item = g_new0(strList, 1);
558 
559     item->value = g_strdup(type);
560     item->next = mc->allowed_dynamic_sysbus_devices;
561     mc->allowed_dynamic_sysbus_devices = item;
562 }
563 
564 static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque)
565 {
566     MachineState *machine = opaque;
567     MachineClass *mc = MACHINE_GET_CLASS(machine);
568     bool allowed = false;
569     strList *wl;
570 
571     for (wl = mc->allowed_dynamic_sysbus_devices;
572          !allowed && wl;
573          wl = wl->next) {
574         allowed |= !!object_dynamic_cast(OBJECT(sbdev), wl->value);
575     }
576 
577     if (!allowed) {
578         error_report("Option '-device %s' cannot be handled by this machine",
579                      object_class_get_name(object_get_class(OBJECT(sbdev))));
580         exit(1);
581     }
582 }
583 
584 static void machine_init_notify(Notifier *notifier, void *data)
585 {
586     MachineState *machine = MACHINE(qdev_get_machine());
587 
588     /*
589      * Loop through all dynamically created sysbus devices and check if they are
590      * all allowed.  If a device is not allowed, error out.
591      */
592     foreach_dynamic_sysbus_device(validate_sysbus_device, machine);
593 }
594 
595 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine)
596 {
597     int i;
598     HotpluggableCPUList *head = NULL;
599     MachineClass *mc = MACHINE_GET_CLASS(machine);
600 
601     /* force board to initialize possible_cpus if it hasn't been done yet */
602     mc->possible_cpu_arch_ids(machine);
603 
604     for (i = 0; i < machine->possible_cpus->len; i++) {
605         Object *cpu;
606         HotpluggableCPUList *list_item = g_new0(typeof(*list_item), 1);
607         HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1);
608 
609         cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type);
610         cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count;
611         cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props,
612                                    sizeof(*cpu_item->props));
613 
614         cpu = machine->possible_cpus->cpus[i].cpu;
615         if (cpu) {
616             cpu_item->has_qom_path = true;
617             cpu_item->qom_path = object_get_canonical_path(cpu);
618         }
619         list_item->value = cpu_item;
620         list_item->next = head;
621         head = list_item;
622     }
623     return head;
624 }
625 
626 /**
627  * machine_set_cpu_numa_node:
628  * @machine: machine object to modify
629  * @props: specifies which cpu objects to assign to
630  *         numa node specified by @props.node_id
631  * @errp: if an error occurs, a pointer to an area to store the error
632  *
633  * Associate NUMA node specified by @props.node_id with cpu slots that
634  * match socket/core/thread-ids specified by @props. It's recommended to use
635  * query-hotpluggable-cpus.props values to specify affected cpu slots,
636  * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
637  *
638  * However for CLI convenience it's possible to pass in subset of properties,
639  * which would affect all cpu slots that match it.
640  * Ex for pc machine:
641  *    -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
642  *    -numa cpu,node-id=0,socket_id=0 \
643  *    -numa cpu,node-id=1,socket_id=1
644  * will assign all child cores of socket 0 to node 0 and
645  * of socket 1 to node 1.
646  *
647  * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
648  * return error.
649  * Empty subset is disallowed and function will return with error in this case.
650  */
651 void machine_set_cpu_numa_node(MachineState *machine,
652                                const CpuInstanceProperties *props, Error **errp)
653 {
654     MachineClass *mc = MACHINE_GET_CLASS(machine);
655     bool match = false;
656     int i;
657 
658     if (!mc->possible_cpu_arch_ids) {
659         error_setg(errp, "mapping of CPUs to NUMA node is not supported");
660         return;
661     }
662 
663     /* disabling node mapping is not supported, forbid it */
664     assert(props->has_node_id);
665 
666     /* force board to initialize possible_cpus if it hasn't been done yet */
667     mc->possible_cpu_arch_ids(machine);
668 
669     for (i = 0; i < machine->possible_cpus->len; i++) {
670         CPUArchId *slot = &machine->possible_cpus->cpus[i];
671 
672         /* reject unsupported by board properties */
673         if (props->has_thread_id && !slot->props.has_thread_id) {
674             error_setg(errp, "thread-id is not supported");
675             return;
676         }
677 
678         if (props->has_core_id && !slot->props.has_core_id) {
679             error_setg(errp, "core-id is not supported");
680             return;
681         }
682 
683         if (props->has_socket_id && !slot->props.has_socket_id) {
684             error_setg(errp, "socket-id is not supported");
685             return;
686         }
687 
688         /* skip slots with explicit mismatch */
689         if (props->has_thread_id && props->thread_id != slot->props.thread_id) {
690                 continue;
691         }
692 
693         if (props->has_core_id && props->core_id != slot->props.core_id) {
694                 continue;
695         }
696 
697         if (props->has_socket_id && props->socket_id != slot->props.socket_id) {
698                 continue;
699         }
700 
701         /* reject assignment if slot is already assigned, for compatibility
702          * of legacy cpu_index mapping with SPAPR core based mapping do not
703          * error out if cpu thread and matched core have the same node-id */
704         if (slot->props.has_node_id &&
705             slot->props.node_id != props->node_id) {
706             error_setg(errp, "CPU is already assigned to node-id: %" PRId64,
707                        slot->props.node_id);
708             return;
709         }
710 
711         /* assign slot to node as it's matched '-numa cpu' key */
712         match = true;
713         slot->props.node_id = props->node_id;
714         slot->props.has_node_id = props->has_node_id;
715     }
716 
717     if (!match) {
718         error_setg(errp, "no match found");
719     }
720 }
721 
722 static void machine_class_init(ObjectClass *oc, void *data)
723 {
724     MachineClass *mc = MACHINE_CLASS(oc);
725 
726     /* Default 128 MB as guest ram size */
727     mc->default_ram_size = 128 * MiB;
728     mc->rom_file_has_mr = true;
729 
730     /* numa node memory size aligned on 8MB by default.
731      * On Linux, each node's border has to be 8MB aligned
732      */
733     mc->numa_mem_align_shift = 23;
734     mc->numa_auto_assign_ram = numa_default_auto_assign_ram;
735 
736     object_class_property_add_str(oc, "accel",
737         machine_get_accel, machine_set_accel, &error_abort);
738     object_class_property_set_description(oc, "accel",
739         "Accelerator list", &error_abort);
740 
741     object_class_property_add(oc, "kernel-irqchip", "on|off|split",
742         NULL, machine_set_kernel_irqchip,
743         NULL, NULL, &error_abort);
744     object_class_property_set_description(oc, "kernel-irqchip",
745         "Configure KVM in-kernel irqchip", &error_abort);
746 
747     object_class_property_add(oc, "kvm-shadow-mem", "int",
748         machine_get_kvm_shadow_mem, machine_set_kvm_shadow_mem,
749         NULL, NULL, &error_abort);
750     object_class_property_set_description(oc, "kvm-shadow-mem",
751         "KVM shadow MMU size", &error_abort);
752 
753     object_class_property_add_str(oc, "kernel",
754         machine_get_kernel, machine_set_kernel, &error_abort);
755     object_class_property_set_description(oc, "kernel",
756         "Linux kernel image file", &error_abort);
757 
758     object_class_property_add_str(oc, "initrd",
759         machine_get_initrd, machine_set_initrd, &error_abort);
760     object_class_property_set_description(oc, "initrd",
761         "Linux initial ramdisk file", &error_abort);
762 
763     object_class_property_add_str(oc, "append",
764         machine_get_append, machine_set_append, &error_abort);
765     object_class_property_set_description(oc, "append",
766         "Linux kernel command line", &error_abort);
767 
768     object_class_property_add_str(oc, "dtb",
769         machine_get_dtb, machine_set_dtb, &error_abort);
770     object_class_property_set_description(oc, "dtb",
771         "Linux kernel device tree file", &error_abort);
772 
773     object_class_property_add_str(oc, "dumpdtb",
774         machine_get_dumpdtb, machine_set_dumpdtb, &error_abort);
775     object_class_property_set_description(oc, "dumpdtb",
776         "Dump current dtb to a file and quit", &error_abort);
777 
778     object_class_property_add(oc, "phandle-start", "int",
779         machine_get_phandle_start, machine_set_phandle_start,
780         NULL, NULL, &error_abort);
781     object_class_property_set_description(oc, "phandle-start",
782             "The first phandle ID we may generate dynamically", &error_abort);
783 
784     object_class_property_add_str(oc, "dt-compatible",
785         machine_get_dt_compatible, machine_set_dt_compatible, &error_abort);
786     object_class_property_set_description(oc, "dt-compatible",
787         "Overrides the \"compatible\" property of the dt root node",
788         &error_abort);
789 
790     object_class_property_add_bool(oc, "dump-guest-core",
791         machine_get_dump_guest_core, machine_set_dump_guest_core, &error_abort);
792     object_class_property_set_description(oc, "dump-guest-core",
793         "Include guest memory in a core dump", &error_abort);
794 
795     object_class_property_add_bool(oc, "mem-merge",
796         machine_get_mem_merge, machine_set_mem_merge, &error_abort);
797     object_class_property_set_description(oc, "mem-merge",
798         "Enable/disable memory merge support", &error_abort);
799 
800     object_class_property_add_bool(oc, "usb",
801         machine_get_usb, machine_set_usb, &error_abort);
802     object_class_property_set_description(oc, "usb",
803         "Set on/off to enable/disable usb", &error_abort);
804 
805     object_class_property_add_bool(oc, "graphics",
806         machine_get_graphics, machine_set_graphics, &error_abort);
807     object_class_property_set_description(oc, "graphics",
808         "Set on/off to enable/disable graphics emulation", &error_abort);
809 
810     object_class_property_add_bool(oc, "igd-passthru",
811         machine_get_igd_gfx_passthru, machine_set_igd_gfx_passthru,
812         &error_abort);
813     object_class_property_set_description(oc, "igd-passthru",
814         "Set on/off to enable/disable igd passthrou", &error_abort);
815 
816     object_class_property_add_str(oc, "firmware",
817         machine_get_firmware, machine_set_firmware,
818         &error_abort);
819     object_class_property_set_description(oc, "firmware",
820         "Firmware image", &error_abort);
821 
822     object_class_property_add_bool(oc, "suppress-vmdesc",
823         machine_get_suppress_vmdesc, machine_set_suppress_vmdesc,
824         &error_abort);
825     object_class_property_set_description(oc, "suppress-vmdesc",
826         "Set on to disable self-describing migration", &error_abort);
827 
828     object_class_property_add_bool(oc, "enforce-config-section",
829         machine_get_enforce_config_section, machine_set_enforce_config_section,
830         &error_abort);
831     object_class_property_set_description(oc, "enforce-config-section",
832         "Set on to enforce configuration section migration", &error_abort);
833 
834     object_class_property_add_str(oc, "memory-encryption",
835         machine_get_memory_encryption, machine_set_memory_encryption,
836         &error_abort);
837     object_class_property_set_description(oc, "memory-encryption",
838         "Set memory encryption object to use", &error_abort);
839 }
840 
841 static void machine_class_base_init(ObjectClass *oc, void *data)
842 {
843     if (!object_class_is_abstract(oc)) {
844         MachineClass *mc = MACHINE_CLASS(oc);
845         const char *cname = object_class_get_name(oc);
846         assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX));
847         mc->name = g_strndup(cname,
848                             strlen(cname) - strlen(TYPE_MACHINE_SUFFIX));
849         mc->compat_props = g_ptr_array_new();
850     }
851 }
852 
853 static void machine_initfn(Object *obj)
854 {
855     MachineState *ms = MACHINE(obj);
856     MachineClass *mc = MACHINE_GET_CLASS(obj);
857 
858     ms->kernel_irqchip_allowed = true;
859     ms->kernel_irqchip_split = mc->default_kernel_irqchip_split;
860     ms->kvm_shadow_mem = -1;
861     ms->dump_guest_core = true;
862     ms->mem_merge = true;
863     ms->enable_graphics = true;
864 
865     if (mc->nvdimm_supported) {
866         Object *obj = OBJECT(ms);
867 
868         ms->nvdimms_state = g_new0(NVDIMMState, 1);
869         object_property_add_bool(obj, "nvdimm",
870                                  machine_get_nvdimm, machine_set_nvdimm,
871                                  &error_abort);
872         object_property_set_description(obj, "nvdimm",
873                                         "Set on/off to enable/disable "
874                                         "NVDIMM instantiation", NULL);
875 
876         object_property_add_str(obj, "nvdimm-persistence",
877                                 machine_get_nvdimm_persistence,
878                                 machine_set_nvdimm_persistence,
879                                 &error_abort);
880         object_property_set_description(obj, "nvdimm-persistence",
881                                         "Set NVDIMM persistence"
882                                         "Valid values are cpu, mem-ctrl",
883                                         NULL);
884     }
885 
886 
887     /* Register notifier when init is done for sysbus sanity checks */
888     ms->sysbus_notifier.notify = machine_init_notify;
889     qemu_add_machine_init_done_notifier(&ms->sysbus_notifier);
890 }
891 
892 static void machine_finalize(Object *obj)
893 {
894     MachineState *ms = MACHINE(obj);
895 
896     g_free(ms->accel);
897     g_free(ms->kernel_filename);
898     g_free(ms->initrd_filename);
899     g_free(ms->kernel_cmdline);
900     g_free(ms->dtb);
901     g_free(ms->dumpdtb);
902     g_free(ms->dt_compatible);
903     g_free(ms->firmware);
904     g_free(ms->device_memory);
905     g_free(ms->nvdimms_state);
906 }
907 
908 bool machine_usb(MachineState *machine)
909 {
910     return machine->usb;
911 }
912 
913 bool machine_kernel_irqchip_allowed(MachineState *machine)
914 {
915     return machine->kernel_irqchip_allowed;
916 }
917 
918 bool machine_kernel_irqchip_required(MachineState *machine)
919 {
920     return machine->kernel_irqchip_required;
921 }
922 
923 bool machine_kernel_irqchip_split(MachineState *machine)
924 {
925     return machine->kernel_irqchip_split;
926 }
927 
928 int machine_kvm_shadow_mem(MachineState *machine)
929 {
930     return machine->kvm_shadow_mem;
931 }
932 
933 int machine_phandle_start(MachineState *machine)
934 {
935     return machine->phandle_start;
936 }
937 
938 bool machine_dump_guest_core(MachineState *machine)
939 {
940     return machine->dump_guest_core;
941 }
942 
943 bool machine_mem_merge(MachineState *machine)
944 {
945     return machine->mem_merge;
946 }
947 
948 static char *cpu_slot_to_string(const CPUArchId *cpu)
949 {
950     GString *s = g_string_new(NULL);
951     if (cpu->props.has_socket_id) {
952         g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id);
953     }
954     if (cpu->props.has_core_id) {
955         if (s->len) {
956             g_string_append_printf(s, ", ");
957         }
958         g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id);
959     }
960     if (cpu->props.has_thread_id) {
961         if (s->len) {
962             g_string_append_printf(s, ", ");
963         }
964         g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id);
965     }
966     return g_string_free(s, false);
967 }
968 
969 static void machine_numa_finish_cpu_init(MachineState *machine)
970 {
971     int i;
972     bool default_mapping;
973     GString *s = g_string_new(NULL);
974     MachineClass *mc = MACHINE_GET_CLASS(machine);
975     const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine);
976 
977     assert(nb_numa_nodes);
978     for (i = 0; i < possible_cpus->len; i++) {
979         if (possible_cpus->cpus[i].props.has_node_id) {
980             break;
981         }
982     }
983     default_mapping = (i == possible_cpus->len);
984 
985     for (i = 0; i < possible_cpus->len; i++) {
986         const CPUArchId *cpu_slot = &possible_cpus->cpus[i];
987 
988         if (!cpu_slot->props.has_node_id) {
989             /* fetch default mapping from board and enable it */
990             CpuInstanceProperties props = cpu_slot->props;
991 
992             props.node_id = mc->get_default_cpu_node_id(machine, i);
993             if (!default_mapping) {
994                 /* record slots with not set mapping,
995                  * TODO: make it hard error in future */
996                 char *cpu_str = cpu_slot_to_string(cpu_slot);
997                 g_string_append_printf(s, "%sCPU %d [%s]",
998                                        s->len ? ", " : "", i, cpu_str);
999                 g_free(cpu_str);
1000 
1001                 /* non mapped cpus used to fallback to node 0 */
1002                 props.node_id = 0;
1003             }
1004 
1005             props.has_node_id = true;
1006             machine_set_cpu_numa_node(machine, &props, &error_fatal);
1007         }
1008     }
1009     if (s->len && !qtest_enabled()) {
1010         warn_report("CPU(s) not present in any NUMA nodes: %s",
1011                     s->str);
1012         warn_report("All CPU(s) up to maxcpus should be described "
1013                     "in NUMA config, ability to start up with partial NUMA "
1014                     "mappings is obsoleted and will be removed in future");
1015     }
1016     g_string_free(s, true);
1017 }
1018 
1019 void machine_run_board_init(MachineState *machine)
1020 {
1021     MachineClass *machine_class = MACHINE_GET_CLASS(machine);
1022 
1023     numa_complete_configuration(machine);
1024     if (nb_numa_nodes) {
1025         machine_numa_finish_cpu_init(machine);
1026     }
1027 
1028     /* If the machine supports the valid_cpu_types check and the user
1029      * specified a CPU with -cpu check here that the user CPU is supported.
1030      */
1031     if (machine_class->valid_cpu_types && machine->cpu_type) {
1032         ObjectClass *class = object_class_by_name(machine->cpu_type);
1033         int i;
1034 
1035         for (i = 0; machine_class->valid_cpu_types[i]; i++) {
1036             if (object_class_dynamic_cast(class,
1037                                           machine_class->valid_cpu_types[i])) {
1038                 /* The user specificed CPU is in the valid field, we are
1039                  * good to go.
1040                  */
1041                 break;
1042             }
1043         }
1044 
1045         if (!machine_class->valid_cpu_types[i]) {
1046             /* The user specified CPU is not valid */
1047             error_report("Invalid CPU type: %s", machine->cpu_type);
1048             error_printf("The valid types are: %s",
1049                          machine_class->valid_cpu_types[0]);
1050             for (i = 1; machine_class->valid_cpu_types[i]; i++) {
1051                 error_printf(", %s", machine_class->valid_cpu_types[i]);
1052             }
1053             error_printf("\n");
1054 
1055             exit(1);
1056         }
1057     }
1058 
1059     machine_class->init(machine);
1060 }
1061 
1062 static const TypeInfo machine_info = {
1063     .name = TYPE_MACHINE,
1064     .parent = TYPE_OBJECT,
1065     .abstract = true,
1066     .class_size = sizeof(MachineClass),
1067     .class_init    = machine_class_init,
1068     .class_base_init = machine_class_base_init,
1069     .instance_size = sizeof(MachineState),
1070     .instance_init = machine_initfn,
1071     .instance_finalize = machine_finalize,
1072 };
1073 
1074 static void machine_register_types(void)
1075 {
1076     type_register_static(&machine_info);
1077 }
1078 
1079 type_init(machine_register_types)
1080