1 /* 2 * QEMU Machine 3 * 4 * Copyright (C) 2014 Red Hat Inc 5 * 6 * Authors: 7 * Marcel Apfelbaum <marcel.a@redhat.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or later. 10 * See the COPYING file in the top-level directory. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "qemu/accel.h" 15 #include "sysemu/replay.h" 16 #include "hw/boards.h" 17 #include "hw/loader.h" 18 #include "qapi/error.h" 19 #include "qapi/qapi-visit-machine.h" 20 #include "qom/object_interfaces.h" 21 #include "sysemu/cpus.h" 22 #include "sysemu/sysemu.h" 23 #include "sysemu/reset.h" 24 #include "sysemu/runstate.h" 25 #include "sysemu/xen.h" 26 #include "sysemu/qtest.h" 27 #include "hw/pci/pci_bridge.h" 28 #include "hw/mem/nvdimm.h" 29 #include "migration/global_state.h" 30 #include "exec/confidential-guest-support.h" 31 #include "hw/virtio/virtio-pci.h" 32 #include "hw/virtio/virtio-net.h" 33 #include "hw/virtio/virtio-iommu.h" 34 #include "audio/audio.h" 35 36 GlobalProperty hw_compat_9_0[] = { 37 {"arm-cpu", "backcompat-cntfrq", "true" }, 38 {"vfio-pci", "skip-vsc-check", "false" }, 39 }; 40 const size_t hw_compat_9_0_len = G_N_ELEMENTS(hw_compat_9_0); 41 42 GlobalProperty hw_compat_8_2[] = { 43 { "migration", "zero-page-detection", "legacy"}, 44 { TYPE_VIRTIO_IOMMU_PCI, "granule", "4k" }, 45 { TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "64" }, 46 { "virtio-gpu-device", "x-scanout-vmstate-version", "1" }, 47 }; 48 const size_t hw_compat_8_2_len = G_N_ELEMENTS(hw_compat_8_2); 49 50 GlobalProperty hw_compat_8_1[] = { 51 { TYPE_PCI_BRIDGE, "x-pci-express-writeable-slt-bug", "true" }, 52 { "ramfb", "x-migrate", "off" }, 53 { "vfio-pci-nohotplug", "x-ramfb-migrate", "off" }, 54 { "igb", "x-pcie-flr-init", "off" }, 55 { TYPE_VIRTIO_NET, "host_uso", "off"}, 56 { TYPE_VIRTIO_NET, "guest_uso4", "off"}, 57 { TYPE_VIRTIO_NET, "guest_uso6", "off"}, 58 }; 59 const size_t hw_compat_8_1_len = G_N_ELEMENTS(hw_compat_8_1); 60 61 GlobalProperty hw_compat_8_0[] = { 62 { "migration", "multifd-flush-after-each-section", "on"}, 63 { TYPE_PCI_DEVICE, "x-pcie-ari-nextfn-1", "on" }, 64 }; 65 const size_t hw_compat_8_0_len = G_N_ELEMENTS(hw_compat_8_0); 66 67 GlobalProperty hw_compat_7_2[] = { 68 { "e1000e", "migrate-timadj", "off" }, 69 { "virtio-mem", "x-early-migration", "false" }, 70 { "migration", "x-preempt-pre-7-2", "true" }, 71 { TYPE_PCI_DEVICE, "x-pcie-err-unc-mask", "off" }, 72 }; 73 const size_t hw_compat_7_2_len = G_N_ELEMENTS(hw_compat_7_2); 74 75 GlobalProperty hw_compat_7_1[] = { 76 { "virtio-device", "queue_reset", "false" }, 77 { "virtio-rng-pci", "vectors", "0" }, 78 { "virtio-rng-pci-transitional", "vectors", "0" }, 79 { "virtio-rng-pci-non-transitional", "vectors", "0" }, 80 }; 81 const size_t hw_compat_7_1_len = G_N_ELEMENTS(hw_compat_7_1); 82 83 GlobalProperty hw_compat_7_0[] = { 84 { "arm-gicv3-common", "force-8-bit-prio", "on" }, 85 { "nvme-ns", "eui64-default", "on"}, 86 }; 87 const size_t hw_compat_7_0_len = G_N_ELEMENTS(hw_compat_7_0); 88 89 GlobalProperty hw_compat_6_2[] = { 90 { "PIIX4_PM", "x-not-migrate-acpi-index", "on"}, 91 }; 92 const size_t hw_compat_6_2_len = G_N_ELEMENTS(hw_compat_6_2); 93 94 GlobalProperty hw_compat_6_1[] = { 95 { "vhost-user-vsock-device", "seqpacket", "off" }, 96 { "nvme-ns", "shared", "off" }, 97 }; 98 const size_t hw_compat_6_1_len = G_N_ELEMENTS(hw_compat_6_1); 99 100 GlobalProperty hw_compat_6_0[] = { 101 { "gpex-pcihost", "allow-unmapped-accesses", "false" }, 102 { "i8042", "extended-state", "false"}, 103 { "nvme-ns", "eui64-default", "off"}, 104 { "e1000", "init-vet", "off" }, 105 { "e1000e", "init-vet", "off" }, 106 { "vhost-vsock-device", "seqpacket", "off" }, 107 }; 108 const size_t hw_compat_6_0_len = G_N_ELEMENTS(hw_compat_6_0); 109 110 GlobalProperty hw_compat_5_2[] = { 111 { "ICH9-LPC", "smm-compat", "on"}, 112 { "PIIX4_PM", "smm-compat", "on"}, 113 { "virtio-blk-device", "report-discard-granularity", "off" }, 114 { "virtio-net-pci-base", "vectors", "3"}, 115 { "nvme", "msix-exclusive-bar", "on"}, 116 }; 117 const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2); 118 119 GlobalProperty hw_compat_5_1[] = { 120 { "vhost-scsi", "num_queues", "1"}, 121 { "vhost-user-blk", "num-queues", "1"}, 122 { "vhost-user-scsi", "num_queues", "1"}, 123 { "virtio-blk-device", "num-queues", "1"}, 124 { "virtio-scsi-device", "num_queues", "1"}, 125 { "nvme", "use-intel-id", "on"}, 126 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */ 127 { "pl011", "migrate-clk", "off" }, 128 { "virtio-pci", "x-ats-page-aligned", "off"}, 129 }; 130 const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1); 131 132 GlobalProperty hw_compat_5_0[] = { 133 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" }, 134 { "virtio-balloon-device", "page-poison", "false" }, 135 { "vmport", "x-read-set-eax", "off" }, 136 { "vmport", "x-signal-unsupported-cmd", "off" }, 137 { "vmport", "x-report-vmx-type", "off" }, 138 { "vmport", "x-cmds-v2", "off" }, 139 { "virtio-device", "x-disable-legacy-check", "true" }, 140 }; 141 const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0); 142 143 GlobalProperty hw_compat_4_2[] = { 144 { "virtio-blk-device", "queue-size", "128"}, 145 { "virtio-scsi-device", "virtqueue_size", "128"}, 146 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" }, 147 { "virtio-blk-device", "seg-max-adjust", "off"}, 148 { "virtio-scsi-device", "seg_max_adjust", "off"}, 149 { "vhost-blk-device", "seg_max_adjust", "off"}, 150 { "usb-host", "suppress-remote-wake", "off" }, 151 { "usb-redir", "suppress-remote-wake", "off" }, 152 { "qxl", "revision", "4" }, 153 { "qxl-vga", "revision", "4" }, 154 { "fw_cfg", "acpi-mr-restore", "false" }, 155 { "virtio-device", "use-disabled-flag", "false" }, 156 }; 157 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2); 158 159 GlobalProperty hw_compat_4_1[] = { 160 { "virtio-pci", "x-pcie-flr-init", "off" }, 161 }; 162 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1); 163 164 GlobalProperty hw_compat_4_0[] = { 165 { "VGA", "edid", "false" }, 166 { "secondary-vga", "edid", "false" }, 167 { "bochs-display", "edid", "false" }, 168 { "virtio-vga", "edid", "false" }, 169 { "virtio-gpu-device", "edid", "false" }, 170 { "virtio-device", "use-started", "false" }, 171 { "virtio-balloon-device", "qemu-4-0-config-size", "true" }, 172 { "pl031", "migrate-tick-offset", "false" }, 173 }; 174 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0); 175 176 GlobalProperty hw_compat_3_1[] = { 177 { "pcie-root-port", "x-speed", "2_5" }, 178 { "pcie-root-port", "x-width", "1" }, 179 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, 180 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, 181 { "tpm-crb", "ppi", "false" }, 182 { "tpm-tis", "ppi", "false" }, 183 { "usb-kbd", "serial", "42" }, 184 { "usb-mouse", "serial", "42" }, 185 { "usb-tablet", "serial", "42" }, 186 { "virtio-blk-device", "discard", "false" }, 187 { "virtio-blk-device", "write-zeroes", "false" }, 188 { "virtio-balloon-device", "qemu-4-0-config-size", "false" }, 189 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */ 190 }; 191 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); 192 193 GlobalProperty hw_compat_3_0[] = {}; 194 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0); 195 196 GlobalProperty hw_compat_2_12[] = { 197 { "hda-audio", "use-timer", "false" }, 198 { "cirrus-vga", "global-vmstate", "true" }, 199 { "VGA", "global-vmstate", "true" }, 200 { "vmware-svga", "global-vmstate", "true" }, 201 { "qxl-vga", "global-vmstate", "true" }, 202 }; 203 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12); 204 205 GlobalProperty hw_compat_2_11[] = { 206 { "hpet", "hpet-offset-saved", "false" }, 207 { "virtio-blk-pci", "vectors", "2" }, 208 { "vhost-user-blk-pci", "vectors", "2" }, 209 { "e1000", "migrate_tso_props", "off" }, 210 }; 211 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11); 212 213 GlobalProperty hw_compat_2_10[] = { 214 { "virtio-mouse-device", "wheel-axis", "false" }, 215 { "virtio-tablet-device", "wheel-axis", "false" }, 216 }; 217 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10); 218 219 GlobalProperty hw_compat_2_9[] = { 220 { "pci-bridge", "shpc", "off" }, 221 { "intel-iommu", "pt", "off" }, 222 { "virtio-net-device", "x-mtu-bypass-backend", "off" }, 223 { "pcie-root-port", "x-migrate-msix", "false" }, 224 }; 225 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9); 226 227 GlobalProperty hw_compat_2_8[] = { 228 { "fw_cfg_mem", "x-file-slots", "0x10" }, 229 { "fw_cfg_io", "x-file-slots", "0x10" }, 230 { "pflash_cfi01", "old-multiple-chip-handling", "on" }, 231 { "pci-bridge", "shpc", "on" }, 232 { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" }, 233 { "virtio-pci", "x-pcie-deverr-init", "off" }, 234 { "virtio-pci", "x-pcie-lnkctl-init", "off" }, 235 { "virtio-pci", "x-pcie-pm-init", "off" }, 236 { "cirrus-vga", "vgamem_mb", "8" }, 237 { "isa-cirrus-vga", "vgamem_mb", "8" }, 238 }; 239 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8); 240 241 GlobalProperty hw_compat_2_7[] = { 242 { "virtio-pci", "page-per-vq", "on" }, 243 { "virtio-serial-device", "emergency-write", "off" }, 244 { "ioapic", "version", "0x11" }, 245 { "intel-iommu", "x-buggy-eim", "true" }, 246 { "virtio-pci", "x-ignore-backend-features", "on" }, 247 }; 248 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7); 249 250 GlobalProperty hw_compat_2_6[] = { 251 { "virtio-mmio", "format_transport_address", "off" }, 252 /* Optional because not all virtio-pci devices support legacy mode */ 253 { "virtio-pci", "disable-modern", "on", .optional = true }, 254 { "virtio-pci", "disable-legacy", "off", .optional = true }, 255 }; 256 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6); 257 258 GlobalProperty hw_compat_2_5[] = { 259 { "isa-fdc", "fallback", "144" }, 260 { "pvscsi", "x-old-pci-configuration", "on" }, 261 { "pvscsi", "x-disable-pcie", "on" }, 262 { "vmxnet3", "x-old-msi-offsets", "on" }, 263 { "vmxnet3", "x-disable-pcie", "on" }, 264 }; 265 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5); 266 267 GlobalProperty hw_compat_2_4[] = { 268 /* Optional because the 'scsi' property is Linux-only */ 269 { "virtio-blk-device", "scsi", "true", .optional = true }, 270 { "e1000", "extra_mac_registers", "off" }, 271 { "virtio-pci", "x-disable-pcie", "on" }, 272 { "virtio-pci", "migrate-extra", "off" }, 273 { "fw_cfg_mem", "dma_enabled", "off" }, 274 { "fw_cfg_io", "dma_enabled", "off" } 275 }; 276 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4); 277 278 GlobalProperty hw_compat_2_3[] = { 279 { "virtio-blk-pci", "any_layout", "off" }, 280 { "virtio-balloon-pci", "any_layout", "off" }, 281 { "virtio-serial-pci", "any_layout", "off" }, 282 { "virtio-9p-pci", "any_layout", "off" }, 283 { "virtio-rng-pci", "any_layout", "off" }, 284 { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" }, 285 { "migration", "send-configuration", "off" }, 286 { "migration", "send-section-footer", "off" }, 287 { "migration", "store-global-state", "off" }, 288 }; 289 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3); 290 291 GlobalProperty hw_compat_2_2[] = {}; 292 const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2); 293 294 GlobalProperty hw_compat_2_1[] = { 295 { "intel-hda", "old_msi_addr", "on" }, 296 { "VGA", "qemu-extended-regs", "off" }, 297 { "secondary-vga", "qemu-extended-regs", "off" }, 298 { "virtio-scsi-pci", "any_layout", "off" }, 299 { "usb-mouse", "usb_version", "1" }, 300 { "usb-kbd", "usb_version", "1" }, 301 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" }, 302 }; 303 const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1); 304 305 MachineState *current_machine; 306 307 static char *machine_get_kernel(Object *obj, Error **errp) 308 { 309 MachineState *ms = MACHINE(obj); 310 311 return g_strdup(ms->kernel_filename); 312 } 313 314 static void machine_set_kernel(Object *obj, const char *value, Error **errp) 315 { 316 MachineState *ms = MACHINE(obj); 317 318 g_free(ms->kernel_filename); 319 ms->kernel_filename = g_strdup(value); 320 } 321 322 static char *machine_get_initrd(Object *obj, Error **errp) 323 { 324 MachineState *ms = MACHINE(obj); 325 326 return g_strdup(ms->initrd_filename); 327 } 328 329 static void machine_set_initrd(Object *obj, const char *value, Error **errp) 330 { 331 MachineState *ms = MACHINE(obj); 332 333 g_free(ms->initrd_filename); 334 ms->initrd_filename = g_strdup(value); 335 } 336 337 static char *machine_get_append(Object *obj, Error **errp) 338 { 339 MachineState *ms = MACHINE(obj); 340 341 return g_strdup(ms->kernel_cmdline); 342 } 343 344 static void machine_set_append(Object *obj, const char *value, Error **errp) 345 { 346 MachineState *ms = MACHINE(obj); 347 348 g_free(ms->kernel_cmdline); 349 ms->kernel_cmdline = g_strdup(value); 350 } 351 352 static char *machine_get_dtb(Object *obj, Error **errp) 353 { 354 MachineState *ms = MACHINE(obj); 355 356 return g_strdup(ms->dtb); 357 } 358 359 static void machine_set_dtb(Object *obj, const char *value, Error **errp) 360 { 361 MachineState *ms = MACHINE(obj); 362 363 g_free(ms->dtb); 364 ms->dtb = g_strdup(value); 365 } 366 367 static char *machine_get_dumpdtb(Object *obj, Error **errp) 368 { 369 MachineState *ms = MACHINE(obj); 370 371 return g_strdup(ms->dumpdtb); 372 } 373 374 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) 375 { 376 MachineState *ms = MACHINE(obj); 377 378 g_free(ms->dumpdtb); 379 ms->dumpdtb = g_strdup(value); 380 } 381 382 static void machine_get_phandle_start(Object *obj, Visitor *v, 383 const char *name, void *opaque, 384 Error **errp) 385 { 386 MachineState *ms = MACHINE(obj); 387 int64_t value = ms->phandle_start; 388 389 visit_type_int(v, name, &value, errp); 390 } 391 392 static void machine_set_phandle_start(Object *obj, Visitor *v, 393 const char *name, void *opaque, 394 Error **errp) 395 { 396 MachineState *ms = MACHINE(obj); 397 int64_t value; 398 399 if (!visit_type_int(v, name, &value, errp)) { 400 return; 401 } 402 403 ms->phandle_start = value; 404 } 405 406 static char *machine_get_dt_compatible(Object *obj, Error **errp) 407 { 408 MachineState *ms = MACHINE(obj); 409 410 return g_strdup(ms->dt_compatible); 411 } 412 413 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) 414 { 415 MachineState *ms = MACHINE(obj); 416 417 g_free(ms->dt_compatible); 418 ms->dt_compatible = g_strdup(value); 419 } 420 421 static bool machine_get_dump_guest_core(Object *obj, Error **errp) 422 { 423 MachineState *ms = MACHINE(obj); 424 425 return ms->dump_guest_core; 426 } 427 428 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) 429 { 430 MachineState *ms = MACHINE(obj); 431 432 ms->dump_guest_core = value; 433 } 434 435 static bool machine_get_mem_merge(Object *obj, Error **errp) 436 { 437 MachineState *ms = MACHINE(obj); 438 439 return ms->mem_merge; 440 } 441 442 static void machine_set_mem_merge(Object *obj, bool value, Error **errp) 443 { 444 MachineState *ms = MACHINE(obj); 445 446 ms->mem_merge = value; 447 } 448 449 static bool machine_get_usb(Object *obj, Error **errp) 450 { 451 MachineState *ms = MACHINE(obj); 452 453 return ms->usb; 454 } 455 456 static void machine_set_usb(Object *obj, bool value, Error **errp) 457 { 458 MachineState *ms = MACHINE(obj); 459 460 ms->usb = value; 461 ms->usb_disabled = !value; 462 } 463 464 static bool machine_get_graphics(Object *obj, Error **errp) 465 { 466 MachineState *ms = MACHINE(obj); 467 468 return ms->enable_graphics; 469 } 470 471 static void machine_set_graphics(Object *obj, bool value, Error **errp) 472 { 473 MachineState *ms = MACHINE(obj); 474 475 ms->enable_graphics = value; 476 } 477 478 static char *machine_get_firmware(Object *obj, Error **errp) 479 { 480 MachineState *ms = MACHINE(obj); 481 482 return g_strdup(ms->firmware); 483 } 484 485 static void machine_set_firmware(Object *obj, const char *value, Error **errp) 486 { 487 MachineState *ms = MACHINE(obj); 488 489 g_free(ms->firmware); 490 ms->firmware = g_strdup(value); 491 } 492 493 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) 494 { 495 MachineState *ms = MACHINE(obj); 496 497 ms->suppress_vmdesc = value; 498 } 499 500 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) 501 { 502 MachineState *ms = MACHINE(obj); 503 504 return ms->suppress_vmdesc; 505 } 506 507 static char *machine_get_memory_encryption(Object *obj, Error **errp) 508 { 509 MachineState *ms = MACHINE(obj); 510 511 if (ms->cgs) { 512 return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs))); 513 } 514 515 return NULL; 516 } 517 518 static void machine_set_memory_encryption(Object *obj, const char *value, 519 Error **errp) 520 { 521 Object *cgs = 522 object_resolve_path_component(object_get_objects_root(), value); 523 524 if (!cgs) { 525 error_setg(errp, "No such memory encryption object '%s'", value); 526 return; 527 } 528 529 object_property_set_link(obj, "confidential-guest-support", cgs, errp); 530 } 531 532 static void machine_check_confidential_guest_support(const Object *obj, 533 const char *name, 534 Object *new_target, 535 Error **errp) 536 { 537 /* 538 * So far the only constraint is that the target has the 539 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked 540 * by the QOM core 541 */ 542 } 543 544 static bool machine_get_nvdimm(Object *obj, Error **errp) 545 { 546 MachineState *ms = MACHINE(obj); 547 548 return ms->nvdimms_state->is_enabled; 549 } 550 551 static void machine_set_nvdimm(Object *obj, bool value, Error **errp) 552 { 553 MachineState *ms = MACHINE(obj); 554 555 ms->nvdimms_state->is_enabled = value; 556 } 557 558 static bool machine_get_hmat(Object *obj, Error **errp) 559 { 560 MachineState *ms = MACHINE(obj); 561 562 return ms->numa_state->hmat_enabled; 563 } 564 565 static void machine_set_hmat(Object *obj, bool value, Error **errp) 566 { 567 MachineState *ms = MACHINE(obj); 568 569 ms->numa_state->hmat_enabled = value; 570 } 571 572 static void machine_get_mem(Object *obj, Visitor *v, const char *name, 573 void *opaque, Error **errp) 574 { 575 MachineState *ms = MACHINE(obj); 576 MemorySizeConfiguration mem = { 577 .has_size = true, 578 .size = ms->ram_size, 579 .has_max_size = !!ms->ram_slots, 580 .max_size = ms->maxram_size, 581 .has_slots = !!ms->ram_slots, 582 .slots = ms->ram_slots, 583 }; 584 MemorySizeConfiguration *p_mem = &mem; 585 586 visit_type_MemorySizeConfiguration(v, name, &p_mem, &error_abort); 587 } 588 589 static void machine_set_mem(Object *obj, Visitor *v, const char *name, 590 void *opaque, Error **errp) 591 { 592 ERRP_GUARD(); 593 MachineState *ms = MACHINE(obj); 594 MachineClass *mc = MACHINE_GET_CLASS(obj); 595 MemorySizeConfiguration *mem; 596 597 if (!visit_type_MemorySizeConfiguration(v, name, &mem, errp)) { 598 return; 599 } 600 601 if (!mem->has_size) { 602 mem->has_size = true; 603 mem->size = mc->default_ram_size; 604 } 605 mem->size = QEMU_ALIGN_UP(mem->size, 8192); 606 if (mc->fixup_ram_size) { 607 mem->size = mc->fixup_ram_size(mem->size); 608 } 609 if ((ram_addr_t)mem->size != mem->size) { 610 error_setg(errp, "ram size too large"); 611 goto out_free; 612 } 613 614 if (mem->has_max_size) { 615 if (mem->max_size < mem->size) { 616 error_setg(errp, "invalid value of maxmem: " 617 "maximum memory size (0x%" PRIx64 ") must be at least " 618 "the initial memory size (0x%" PRIx64 ")", 619 mem->max_size, mem->size); 620 goto out_free; 621 } 622 if (mem->has_slots && mem->slots && mem->max_size == mem->size) { 623 error_setg(errp, "invalid value of maxmem: " 624 "memory slots were specified but maximum memory size " 625 "(0x%" PRIx64 ") is equal to the initial memory size " 626 "(0x%" PRIx64 ")", mem->max_size, mem->size); 627 goto out_free; 628 } 629 ms->maxram_size = mem->max_size; 630 } else { 631 if (mem->has_slots) { 632 error_setg(errp, "slots specified but no max-size"); 633 goto out_free; 634 } 635 ms->maxram_size = mem->size; 636 } 637 ms->ram_size = mem->size; 638 ms->ram_slots = mem->has_slots ? mem->slots : 0; 639 out_free: 640 qapi_free_MemorySizeConfiguration(mem); 641 } 642 643 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) 644 { 645 MachineState *ms = MACHINE(obj); 646 647 return g_strdup(ms->nvdimms_state->persistence_string); 648 } 649 650 static void machine_set_nvdimm_persistence(Object *obj, const char *value, 651 Error **errp) 652 { 653 MachineState *ms = MACHINE(obj); 654 NVDIMMState *nvdimms_state = ms->nvdimms_state; 655 656 if (strcmp(value, "cpu") == 0) { 657 nvdimms_state->persistence = 3; 658 } else if (strcmp(value, "mem-ctrl") == 0) { 659 nvdimms_state->persistence = 2; 660 } else { 661 error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", 662 value); 663 return; 664 } 665 666 g_free(nvdimms_state->persistence_string); 667 nvdimms_state->persistence_string = g_strdup(value); 668 } 669 670 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) 671 { 672 QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type)); 673 } 674 675 bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev) 676 { 677 Object *obj = OBJECT(dev); 678 679 if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) { 680 return false; 681 } 682 683 return device_type_is_dynamic_sysbus(mc, object_get_typename(obj)); 684 } 685 686 bool device_type_is_dynamic_sysbus(MachineClass *mc, const char *type) 687 { 688 bool allowed = false; 689 strList *wl; 690 ObjectClass *klass = object_class_by_name(type); 691 692 for (wl = mc->allowed_dynamic_sysbus_devices; 693 !allowed && wl; 694 wl = wl->next) { 695 allowed |= !!object_class_dynamic_cast(klass, wl->value); 696 } 697 698 return allowed; 699 } 700 701 static char *machine_get_audiodev(Object *obj, Error **errp) 702 { 703 MachineState *ms = MACHINE(obj); 704 705 return g_strdup(ms->audiodev); 706 } 707 708 static void machine_set_audiodev(Object *obj, const char *value, 709 Error **errp) 710 { 711 MachineState *ms = MACHINE(obj); 712 713 if (!audio_state_by_name(value, errp)) { 714 return; 715 } 716 717 g_free(ms->audiodev); 718 ms->audiodev = g_strdup(value); 719 } 720 721 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) 722 { 723 int i; 724 HotpluggableCPUList *head = NULL; 725 MachineClass *mc = MACHINE_GET_CLASS(machine); 726 727 /* force board to initialize possible_cpus if it hasn't been done yet */ 728 mc->possible_cpu_arch_ids(machine); 729 730 for (i = 0; i < machine->possible_cpus->len; i++) { 731 CPUState *cpu; 732 HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); 733 734 cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); 735 cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; 736 cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, 737 sizeof(*cpu_item->props)); 738 739 cpu = machine->possible_cpus->cpus[i].cpu; 740 if (cpu) { 741 cpu_item->qom_path = object_get_canonical_path(OBJECT(cpu)); 742 } 743 QAPI_LIST_PREPEND(head, cpu_item); 744 } 745 return head; 746 } 747 748 /** 749 * machine_set_cpu_numa_node: 750 * @machine: machine object to modify 751 * @props: specifies which cpu objects to assign to 752 * numa node specified by @props.node_id 753 * @errp: if an error occurs, a pointer to an area to store the error 754 * 755 * Associate NUMA node specified by @props.node_id with cpu slots that 756 * match socket/core/thread-ids specified by @props. It's recommended to use 757 * query-hotpluggable-cpus.props values to specify affected cpu slots, 758 * which would lead to exact 1:1 mapping of cpu slots to NUMA node. 759 * 760 * However for CLI convenience it's possible to pass in subset of properties, 761 * which would affect all cpu slots that match it. 762 * Ex for pc machine: 763 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ 764 * -numa cpu,node-id=0,socket_id=0 \ 765 * -numa cpu,node-id=1,socket_id=1 766 * will assign all child cores of socket 0 to node 0 and 767 * of socket 1 to node 1. 768 * 769 * On attempt of reassigning (already assigned) cpu slot to another NUMA node, 770 * return error. 771 * Empty subset is disallowed and function will return with error in this case. 772 */ 773 void machine_set_cpu_numa_node(MachineState *machine, 774 const CpuInstanceProperties *props, Error **errp) 775 { 776 MachineClass *mc = MACHINE_GET_CLASS(machine); 777 NodeInfo *numa_info = machine->numa_state->nodes; 778 bool match = false; 779 int i; 780 781 if (!mc->possible_cpu_arch_ids) { 782 error_setg(errp, "mapping of CPUs to NUMA node is not supported"); 783 return; 784 } 785 786 /* disabling node mapping is not supported, forbid it */ 787 assert(props->has_node_id); 788 789 /* force board to initialize possible_cpus if it hasn't been done yet */ 790 mc->possible_cpu_arch_ids(machine); 791 792 for (i = 0; i < machine->possible_cpus->len; i++) { 793 CPUArchId *slot = &machine->possible_cpus->cpus[i]; 794 795 /* reject unsupported by board properties */ 796 if (props->has_thread_id && !slot->props.has_thread_id) { 797 error_setg(errp, "thread-id is not supported"); 798 return; 799 } 800 801 if (props->has_core_id && !slot->props.has_core_id) { 802 error_setg(errp, "core-id is not supported"); 803 return; 804 } 805 806 if (props->has_module_id && !slot->props.has_module_id) { 807 error_setg(errp, "module-id is not supported"); 808 return; 809 } 810 811 if (props->has_cluster_id && !slot->props.has_cluster_id) { 812 error_setg(errp, "cluster-id is not supported"); 813 return; 814 } 815 816 if (props->has_socket_id && !slot->props.has_socket_id) { 817 error_setg(errp, "socket-id is not supported"); 818 return; 819 } 820 821 if (props->has_die_id && !slot->props.has_die_id) { 822 error_setg(errp, "die-id is not supported"); 823 return; 824 } 825 826 /* skip slots with explicit mismatch */ 827 if (props->has_thread_id && props->thread_id != slot->props.thread_id) { 828 continue; 829 } 830 831 if (props->has_core_id && props->core_id != slot->props.core_id) { 832 continue; 833 } 834 835 if (props->has_module_id && 836 props->module_id != slot->props.module_id) { 837 continue; 838 } 839 840 if (props->has_cluster_id && 841 props->cluster_id != slot->props.cluster_id) { 842 continue; 843 } 844 845 if (props->has_die_id && props->die_id != slot->props.die_id) { 846 continue; 847 } 848 849 if (props->has_socket_id && props->socket_id != slot->props.socket_id) { 850 continue; 851 } 852 853 /* reject assignment if slot is already assigned, for compatibility 854 * of legacy cpu_index mapping with SPAPR core based mapping do not 855 * error out if cpu thread and matched core have the same node-id */ 856 if (slot->props.has_node_id && 857 slot->props.node_id != props->node_id) { 858 error_setg(errp, "CPU is already assigned to node-id: %" PRId64, 859 slot->props.node_id); 860 return; 861 } 862 863 /* assign slot to node as it's matched '-numa cpu' key */ 864 match = true; 865 slot->props.node_id = props->node_id; 866 slot->props.has_node_id = props->has_node_id; 867 868 if (machine->numa_state->hmat_enabled) { 869 if ((numa_info[props->node_id].initiator < MAX_NODES) && 870 (props->node_id != numa_info[props->node_id].initiator)) { 871 error_setg(errp, "The initiator of CPU NUMA node %" PRId64 872 " should be itself (got %" PRIu16 ")", 873 props->node_id, numa_info[props->node_id].initiator); 874 return; 875 } 876 numa_info[props->node_id].has_cpu = true; 877 numa_info[props->node_id].initiator = props->node_id; 878 } 879 } 880 881 if (!match) { 882 error_setg(errp, "no match found"); 883 } 884 } 885 886 static void machine_get_smp(Object *obj, Visitor *v, const char *name, 887 void *opaque, Error **errp) 888 { 889 MachineState *ms = MACHINE(obj); 890 SMPConfiguration *config = &(SMPConfiguration){ 891 .has_cpus = true, .cpus = ms->smp.cpus, 892 .has_drawers = true, .drawers = ms->smp.drawers, 893 .has_books = true, .books = ms->smp.books, 894 .has_sockets = true, .sockets = ms->smp.sockets, 895 .has_dies = true, .dies = ms->smp.dies, 896 .has_clusters = true, .clusters = ms->smp.clusters, 897 .has_modules = true, .modules = ms->smp.modules, 898 .has_cores = true, .cores = ms->smp.cores, 899 .has_threads = true, .threads = ms->smp.threads, 900 .has_maxcpus = true, .maxcpus = ms->smp.max_cpus, 901 }; 902 903 if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) { 904 return; 905 } 906 } 907 908 static void machine_set_smp(Object *obj, Visitor *v, const char *name, 909 void *opaque, Error **errp) 910 { 911 MachineState *ms = MACHINE(obj); 912 g_autoptr(SMPConfiguration) config = NULL; 913 914 if (!visit_type_SMPConfiguration(v, name, &config, errp)) { 915 return; 916 } 917 918 machine_parse_smp_config(ms, config, errp); 919 } 920 921 static void machine_get_boot(Object *obj, Visitor *v, const char *name, 922 void *opaque, Error **errp) 923 { 924 MachineState *ms = MACHINE(obj); 925 BootConfiguration *config = &ms->boot_config; 926 visit_type_BootConfiguration(v, name, &config, &error_abort); 927 } 928 929 static void machine_free_boot_config(MachineState *ms) 930 { 931 g_free(ms->boot_config.order); 932 g_free(ms->boot_config.once); 933 g_free(ms->boot_config.splash); 934 } 935 936 static void machine_copy_boot_config(MachineState *ms, BootConfiguration *config) 937 { 938 MachineClass *machine_class = MACHINE_GET_CLASS(ms); 939 940 machine_free_boot_config(ms); 941 ms->boot_config = *config; 942 if (!config->order) { 943 ms->boot_config.order = g_strdup(machine_class->default_boot_order); 944 } 945 } 946 947 static void machine_set_boot(Object *obj, Visitor *v, const char *name, 948 void *opaque, Error **errp) 949 { 950 ERRP_GUARD(); 951 MachineState *ms = MACHINE(obj); 952 BootConfiguration *config = NULL; 953 954 if (!visit_type_BootConfiguration(v, name, &config, errp)) { 955 return; 956 } 957 if (config->order) { 958 validate_bootdevices(config->order, errp); 959 if (*errp) { 960 goto out_free; 961 } 962 } 963 if (config->once) { 964 validate_bootdevices(config->once, errp); 965 if (*errp) { 966 goto out_free; 967 } 968 } 969 970 machine_copy_boot_config(ms, config); 971 /* Strings live in ms->boot_config. */ 972 free(config); 973 return; 974 975 out_free: 976 qapi_free_BootConfiguration(config); 977 } 978 979 void machine_add_audiodev_property(MachineClass *mc) 980 { 981 ObjectClass *oc = OBJECT_CLASS(mc); 982 983 object_class_property_add_str(oc, "audiodev", 984 machine_get_audiodev, 985 machine_set_audiodev); 986 object_class_property_set_description(oc, "audiodev", 987 "Audiodev to use for default machine devices"); 988 } 989 990 static void machine_class_init(ObjectClass *oc, void *data) 991 { 992 MachineClass *mc = MACHINE_CLASS(oc); 993 994 /* Default 128 MB as guest ram size */ 995 mc->default_ram_size = 128 * MiB; 996 mc->rom_file_has_mr = true; 997 998 /* numa node memory size aligned on 8MB by default. 999 * On Linux, each node's border has to be 8MB aligned 1000 */ 1001 mc->numa_mem_align_shift = 23; 1002 1003 object_class_property_add_str(oc, "kernel", 1004 machine_get_kernel, machine_set_kernel); 1005 object_class_property_set_description(oc, "kernel", 1006 "Linux kernel image file"); 1007 1008 object_class_property_add_str(oc, "initrd", 1009 machine_get_initrd, machine_set_initrd); 1010 object_class_property_set_description(oc, "initrd", 1011 "Linux initial ramdisk file"); 1012 1013 object_class_property_add_str(oc, "append", 1014 machine_get_append, machine_set_append); 1015 object_class_property_set_description(oc, "append", 1016 "Linux kernel command line"); 1017 1018 object_class_property_add_str(oc, "dtb", 1019 machine_get_dtb, machine_set_dtb); 1020 object_class_property_set_description(oc, "dtb", 1021 "Linux kernel device tree file"); 1022 1023 object_class_property_add_str(oc, "dumpdtb", 1024 machine_get_dumpdtb, machine_set_dumpdtb); 1025 object_class_property_set_description(oc, "dumpdtb", 1026 "Dump current dtb to a file and quit"); 1027 1028 object_class_property_add(oc, "boot", "BootConfiguration", 1029 machine_get_boot, machine_set_boot, 1030 NULL, NULL); 1031 object_class_property_set_description(oc, "boot", 1032 "Boot configuration"); 1033 1034 object_class_property_add(oc, "smp", "SMPConfiguration", 1035 machine_get_smp, machine_set_smp, 1036 NULL, NULL); 1037 object_class_property_set_description(oc, "smp", 1038 "CPU topology"); 1039 1040 object_class_property_add(oc, "phandle-start", "int", 1041 machine_get_phandle_start, machine_set_phandle_start, 1042 NULL, NULL); 1043 object_class_property_set_description(oc, "phandle-start", 1044 "The first phandle ID we may generate dynamically"); 1045 1046 object_class_property_add_str(oc, "dt-compatible", 1047 machine_get_dt_compatible, machine_set_dt_compatible); 1048 object_class_property_set_description(oc, "dt-compatible", 1049 "Overrides the \"compatible\" property of the dt root node"); 1050 1051 object_class_property_add_bool(oc, "dump-guest-core", 1052 machine_get_dump_guest_core, machine_set_dump_guest_core); 1053 object_class_property_set_description(oc, "dump-guest-core", 1054 "Include guest memory in a core dump"); 1055 1056 object_class_property_add_bool(oc, "mem-merge", 1057 machine_get_mem_merge, machine_set_mem_merge); 1058 object_class_property_set_description(oc, "mem-merge", 1059 "Enable/disable memory merge support"); 1060 1061 object_class_property_add_bool(oc, "usb", 1062 machine_get_usb, machine_set_usb); 1063 object_class_property_set_description(oc, "usb", 1064 "Set on/off to enable/disable usb"); 1065 1066 object_class_property_add_bool(oc, "graphics", 1067 machine_get_graphics, machine_set_graphics); 1068 object_class_property_set_description(oc, "graphics", 1069 "Set on/off to enable/disable graphics emulation"); 1070 1071 object_class_property_add_str(oc, "firmware", 1072 machine_get_firmware, machine_set_firmware); 1073 object_class_property_set_description(oc, "firmware", 1074 "Firmware image"); 1075 1076 object_class_property_add_bool(oc, "suppress-vmdesc", 1077 machine_get_suppress_vmdesc, machine_set_suppress_vmdesc); 1078 object_class_property_set_description(oc, "suppress-vmdesc", 1079 "Set on to disable self-describing migration"); 1080 1081 object_class_property_add_link(oc, "confidential-guest-support", 1082 TYPE_CONFIDENTIAL_GUEST_SUPPORT, 1083 offsetof(MachineState, cgs), 1084 machine_check_confidential_guest_support, 1085 OBJ_PROP_LINK_STRONG); 1086 object_class_property_set_description(oc, "confidential-guest-support", 1087 "Set confidential guest scheme to support"); 1088 1089 /* For compatibility */ 1090 object_class_property_add_str(oc, "memory-encryption", 1091 machine_get_memory_encryption, machine_set_memory_encryption); 1092 object_class_property_set_description(oc, "memory-encryption", 1093 "Set memory encryption object to use"); 1094 1095 object_class_property_add_link(oc, "memory-backend", TYPE_MEMORY_BACKEND, 1096 offsetof(MachineState, memdev), object_property_allow_set_link, 1097 OBJ_PROP_LINK_STRONG); 1098 object_class_property_set_description(oc, "memory-backend", 1099 "Set RAM backend" 1100 "Valid value is ID of hostmem based backend"); 1101 1102 object_class_property_add(oc, "memory", "MemorySizeConfiguration", 1103 machine_get_mem, machine_set_mem, 1104 NULL, NULL); 1105 object_class_property_set_description(oc, "memory", 1106 "Memory size configuration"); 1107 } 1108 1109 static void machine_class_base_init(ObjectClass *oc, void *data) 1110 { 1111 MachineClass *mc = MACHINE_CLASS(oc); 1112 mc->max_cpus = mc->max_cpus ?: 1; 1113 mc->min_cpus = mc->min_cpus ?: 1; 1114 mc->default_cpus = mc->default_cpus ?: 1; 1115 1116 if (!object_class_is_abstract(oc)) { 1117 const char *cname = object_class_get_name(oc); 1118 assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); 1119 mc->name = g_strndup(cname, 1120 strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); 1121 mc->compat_props = g_ptr_array_new(); 1122 } 1123 } 1124 1125 static void machine_initfn(Object *obj) 1126 { 1127 MachineState *ms = MACHINE(obj); 1128 MachineClass *mc = MACHINE_GET_CLASS(obj); 1129 1130 container_get(obj, "/peripheral"); 1131 container_get(obj, "/peripheral-anon"); 1132 1133 ms->dump_guest_core = true; 1134 ms->mem_merge = true; 1135 ms->enable_graphics = true; 1136 ms->kernel_cmdline = g_strdup(""); 1137 ms->ram_size = mc->default_ram_size; 1138 ms->maxram_size = mc->default_ram_size; 1139 1140 if (mc->nvdimm_supported) { 1141 ms->nvdimms_state = g_new0(NVDIMMState, 1); 1142 object_property_add_bool(obj, "nvdimm", 1143 machine_get_nvdimm, machine_set_nvdimm); 1144 object_property_set_description(obj, "nvdimm", 1145 "Set on/off to enable/disable " 1146 "NVDIMM instantiation"); 1147 1148 object_property_add_str(obj, "nvdimm-persistence", 1149 machine_get_nvdimm_persistence, 1150 machine_set_nvdimm_persistence); 1151 object_property_set_description(obj, "nvdimm-persistence", 1152 "Set NVDIMM persistence" 1153 "Valid values are cpu, mem-ctrl"); 1154 } 1155 1156 if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { 1157 ms->numa_state = g_new0(NumaState, 1); 1158 object_property_add_bool(obj, "hmat", 1159 machine_get_hmat, machine_set_hmat); 1160 object_property_set_description(obj, "hmat", 1161 "Set on/off to enable/disable " 1162 "ACPI Heterogeneous Memory Attribute " 1163 "Table (HMAT)"); 1164 } 1165 1166 /* default to mc->default_cpus */ 1167 ms->smp.cpus = mc->default_cpus; 1168 ms->smp.max_cpus = mc->default_cpus; 1169 ms->smp.drawers = 1; 1170 ms->smp.books = 1; 1171 ms->smp.sockets = 1; 1172 ms->smp.dies = 1; 1173 ms->smp.clusters = 1; 1174 ms->smp.modules = 1; 1175 ms->smp.cores = 1; 1176 ms->smp.threads = 1; 1177 1178 machine_copy_boot_config(ms, &(BootConfiguration){ 0 }); 1179 } 1180 1181 static void machine_finalize(Object *obj) 1182 { 1183 MachineState *ms = MACHINE(obj); 1184 1185 machine_free_boot_config(ms); 1186 g_free(ms->kernel_filename); 1187 g_free(ms->initrd_filename); 1188 g_free(ms->kernel_cmdline); 1189 g_free(ms->dtb); 1190 g_free(ms->dumpdtb); 1191 g_free(ms->dt_compatible); 1192 g_free(ms->firmware); 1193 g_free(ms->device_memory); 1194 g_free(ms->nvdimms_state); 1195 g_free(ms->numa_state); 1196 g_free(ms->audiodev); 1197 } 1198 1199 bool machine_usb(MachineState *machine) 1200 { 1201 return machine->usb; 1202 } 1203 1204 int machine_phandle_start(MachineState *machine) 1205 { 1206 return machine->phandle_start; 1207 } 1208 1209 bool machine_dump_guest_core(MachineState *machine) 1210 { 1211 return machine->dump_guest_core; 1212 } 1213 1214 bool machine_mem_merge(MachineState *machine) 1215 { 1216 return machine->mem_merge; 1217 } 1218 1219 bool machine_require_guest_memfd(MachineState *machine) 1220 { 1221 return machine->require_guest_memfd; 1222 } 1223 1224 static char *cpu_slot_to_string(const CPUArchId *cpu) 1225 { 1226 GString *s = g_string_new(NULL); 1227 if (cpu->props.has_socket_id) { 1228 g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); 1229 } 1230 if (cpu->props.has_die_id) { 1231 if (s->len) { 1232 g_string_append_printf(s, ", "); 1233 } 1234 g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id); 1235 } 1236 if (cpu->props.has_cluster_id) { 1237 if (s->len) { 1238 g_string_append_printf(s, ", "); 1239 } 1240 g_string_append_printf(s, "cluster-id: %"PRId64, cpu->props.cluster_id); 1241 } 1242 if (cpu->props.has_module_id) { 1243 if (s->len) { 1244 g_string_append_printf(s, ", "); 1245 } 1246 g_string_append_printf(s, "module-id: %"PRId64, cpu->props.module_id); 1247 } 1248 if (cpu->props.has_core_id) { 1249 if (s->len) { 1250 g_string_append_printf(s, ", "); 1251 } 1252 g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); 1253 } 1254 if (cpu->props.has_thread_id) { 1255 if (s->len) { 1256 g_string_append_printf(s, ", "); 1257 } 1258 g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); 1259 } 1260 return g_string_free(s, false); 1261 } 1262 1263 static void numa_validate_initiator(NumaState *numa_state) 1264 { 1265 int i; 1266 NodeInfo *numa_info = numa_state->nodes; 1267 1268 for (i = 0; i < numa_state->num_nodes; i++) { 1269 if (numa_info[i].initiator == MAX_NODES) { 1270 continue; 1271 } 1272 1273 if (!numa_info[numa_info[i].initiator].present) { 1274 error_report("NUMA node %" PRIu16 " is missing, use " 1275 "'-numa node' option to declare it first", 1276 numa_info[i].initiator); 1277 exit(1); 1278 } 1279 1280 if (!numa_info[numa_info[i].initiator].has_cpu) { 1281 error_report("The initiator of NUMA node %d is invalid", i); 1282 exit(1); 1283 } 1284 } 1285 } 1286 1287 static void machine_numa_finish_cpu_init(MachineState *machine) 1288 { 1289 int i; 1290 bool default_mapping; 1291 GString *s = g_string_new(NULL); 1292 MachineClass *mc = MACHINE_GET_CLASS(machine); 1293 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); 1294 1295 assert(machine->numa_state->num_nodes); 1296 for (i = 0; i < possible_cpus->len; i++) { 1297 if (possible_cpus->cpus[i].props.has_node_id) { 1298 break; 1299 } 1300 } 1301 default_mapping = (i == possible_cpus->len); 1302 1303 for (i = 0; i < possible_cpus->len; i++) { 1304 const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; 1305 1306 if (!cpu_slot->props.has_node_id) { 1307 /* fetch default mapping from board and enable it */ 1308 CpuInstanceProperties props = cpu_slot->props; 1309 1310 props.node_id = mc->get_default_cpu_node_id(machine, i); 1311 if (!default_mapping) { 1312 /* record slots with not set mapping, 1313 * TODO: make it hard error in future */ 1314 char *cpu_str = cpu_slot_to_string(cpu_slot); 1315 g_string_append_printf(s, "%sCPU %d [%s]", 1316 s->len ? ", " : "", i, cpu_str); 1317 g_free(cpu_str); 1318 1319 /* non mapped cpus used to fallback to node 0 */ 1320 props.node_id = 0; 1321 } 1322 1323 props.has_node_id = true; 1324 machine_set_cpu_numa_node(machine, &props, &error_fatal); 1325 } 1326 } 1327 1328 if (machine->numa_state->hmat_enabled) { 1329 numa_validate_initiator(machine->numa_state); 1330 } 1331 1332 if (s->len && !qtest_enabled()) { 1333 warn_report("CPU(s) not present in any NUMA nodes: %s", 1334 s->str); 1335 warn_report("All CPU(s) up to maxcpus should be described " 1336 "in NUMA config, ability to start up with partial NUMA " 1337 "mappings is obsoleted and will be removed in future"); 1338 } 1339 g_string_free(s, true); 1340 } 1341 1342 static void validate_cpu_cluster_to_numa_boundary(MachineState *ms) 1343 { 1344 MachineClass *mc = MACHINE_GET_CLASS(ms); 1345 NumaState *state = ms->numa_state; 1346 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms); 1347 const CPUArchId *cpus = possible_cpus->cpus; 1348 int i, j; 1349 1350 if (qtest_enabled() || state->num_nodes <= 1 || possible_cpus->len <= 1) { 1351 return; 1352 } 1353 1354 /* 1355 * The Linux scheduling domain can't be parsed when the multiple CPUs 1356 * in one cluster have been associated with different NUMA nodes. However, 1357 * it's fine to associate one NUMA node with CPUs in different clusters. 1358 */ 1359 for (i = 0; i < possible_cpus->len; i++) { 1360 for (j = i + 1; j < possible_cpus->len; j++) { 1361 if (cpus[i].props.has_socket_id && 1362 cpus[i].props.has_cluster_id && 1363 cpus[i].props.has_node_id && 1364 cpus[j].props.has_socket_id && 1365 cpus[j].props.has_cluster_id && 1366 cpus[j].props.has_node_id && 1367 cpus[i].props.socket_id == cpus[j].props.socket_id && 1368 cpus[i].props.cluster_id == cpus[j].props.cluster_id && 1369 cpus[i].props.node_id != cpus[j].props.node_id) { 1370 warn_report("CPU-%d and CPU-%d in socket-%" PRId64 "-cluster-%" PRId64 1371 " have been associated with node-%" PRId64 " and node-%" PRId64 1372 " respectively. It can cause OSes like Linux to" 1373 " misbehave", i, j, cpus[i].props.socket_id, 1374 cpus[i].props.cluster_id, cpus[i].props.node_id, 1375 cpus[j].props.node_id); 1376 } 1377 } 1378 } 1379 } 1380 1381 MemoryRegion *machine_consume_memdev(MachineState *machine, 1382 HostMemoryBackend *backend) 1383 { 1384 MemoryRegion *ret = host_memory_backend_get_memory(backend); 1385 1386 if (host_memory_backend_is_mapped(backend)) { 1387 error_report("memory backend %s can't be used multiple times.", 1388 object_get_canonical_path_component(OBJECT(backend))); 1389 exit(EXIT_FAILURE); 1390 } 1391 host_memory_backend_set_mapped(backend, true); 1392 vmstate_register_ram_global(ret); 1393 return ret; 1394 } 1395 1396 static bool create_default_memdev(MachineState *ms, const char *path, Error **errp) 1397 { 1398 Object *obj; 1399 MachineClass *mc = MACHINE_GET_CLASS(ms); 1400 bool r = false; 1401 1402 obj = object_new(path ? TYPE_MEMORY_BACKEND_FILE : TYPE_MEMORY_BACKEND_RAM); 1403 if (path) { 1404 if (!object_property_set_str(obj, "mem-path", path, errp)) { 1405 goto out; 1406 } 1407 } 1408 if (!object_property_set_int(obj, "size", ms->ram_size, errp)) { 1409 goto out; 1410 } 1411 object_property_add_child(object_get_objects_root(), mc->default_ram_id, 1412 obj); 1413 /* Ensure backend's memory region name is equal to mc->default_ram_id */ 1414 if (!object_property_set_bool(obj, "x-use-canonical-path-for-ramblock-id", 1415 false, errp)) { 1416 goto out; 1417 } 1418 if (!user_creatable_complete(USER_CREATABLE(obj), errp)) { 1419 goto out; 1420 } 1421 r = object_property_set_link(OBJECT(ms), "memory-backend", obj, errp); 1422 1423 out: 1424 object_unref(obj); 1425 return r; 1426 } 1427 1428 const char *machine_class_default_cpu_type(MachineClass *mc) 1429 { 1430 if (mc->valid_cpu_types && !mc->valid_cpu_types[1]) { 1431 /* Only a single CPU type allowed: use it as default. */ 1432 return mc->valid_cpu_types[0]; 1433 } 1434 return mc->default_cpu_type; 1435 } 1436 1437 static bool is_cpu_type_supported(const MachineState *machine, Error **errp) 1438 { 1439 MachineClass *mc = MACHINE_GET_CLASS(machine); 1440 ObjectClass *oc = object_class_by_name(machine->cpu_type); 1441 CPUClass *cc; 1442 int i; 1443 1444 /* 1445 * Check if the user specified CPU type is supported when the valid 1446 * CPU types have been determined. Note that the user specified CPU 1447 * type is provided through '-cpu' option. 1448 */ 1449 if (mc->valid_cpu_types) { 1450 assert(mc->valid_cpu_types[0] != NULL); 1451 for (i = 0; mc->valid_cpu_types[i]; i++) { 1452 if (object_class_dynamic_cast(oc, mc->valid_cpu_types[i])) { 1453 break; 1454 } 1455 } 1456 1457 /* The user specified CPU type isn't valid */ 1458 if (!mc->valid_cpu_types[i]) { 1459 g_autofree char *requested = cpu_model_from_type(machine->cpu_type); 1460 error_setg(errp, "Invalid CPU model: %s", requested); 1461 if (!mc->valid_cpu_types[1]) { 1462 g_autofree char *model = cpu_model_from_type( 1463 mc->valid_cpu_types[0]); 1464 error_append_hint(errp, "The only valid type is: %s\n", model); 1465 } else { 1466 error_append_hint(errp, "The valid models are: "); 1467 for (i = 0; mc->valid_cpu_types[i]; i++) { 1468 g_autofree char *model = cpu_model_from_type( 1469 mc->valid_cpu_types[i]); 1470 error_append_hint(errp, "%s%s", 1471 model, 1472 mc->valid_cpu_types[i + 1] ? ", " : ""); 1473 } 1474 error_append_hint(errp, "\n"); 1475 } 1476 1477 return false; 1478 } 1479 } 1480 1481 /* Check if CPU type is deprecated and warn if so */ 1482 cc = CPU_CLASS(oc); 1483 assert(cc != NULL); 1484 if (cc->deprecation_note) { 1485 warn_report("CPU model %s is deprecated -- %s", 1486 machine->cpu_type, cc->deprecation_note); 1487 } 1488 1489 return true; 1490 } 1491 1492 void machine_run_board_init(MachineState *machine, const char *mem_path, Error **errp) 1493 { 1494 ERRP_GUARD(); 1495 MachineClass *machine_class = MACHINE_GET_CLASS(machine); 1496 1497 /* This checkpoint is required by replay to separate prior clock 1498 reading from the other reads, because timer polling functions query 1499 clock values from the log. */ 1500 replay_checkpoint(CHECKPOINT_INIT); 1501 1502 if (!xen_enabled()) { 1503 /* On 32-bit hosts, QEMU is limited by virtual address space */ 1504 if (machine->ram_size > (2047 << 20) && HOST_LONG_BITS == 32) { 1505 error_setg(errp, "at most 2047 MB RAM can be simulated"); 1506 return; 1507 } 1508 } 1509 1510 if (machine->memdev) { 1511 ram_addr_t backend_size = object_property_get_uint(OBJECT(machine->memdev), 1512 "size", &error_abort); 1513 if (backend_size != machine->ram_size) { 1514 error_setg(errp, "Machine memory size does not match the size of the memory backend"); 1515 return; 1516 } 1517 } else if (machine_class->default_ram_id && machine->ram_size && 1518 numa_uses_legacy_mem()) { 1519 if (object_property_find(object_get_objects_root(), 1520 machine_class->default_ram_id)) { 1521 error_setg(errp, "object's id '%s' is reserved for the default" 1522 " RAM backend, it can't be used for any other purposes", 1523 machine_class->default_ram_id); 1524 error_append_hint(errp, 1525 "Change the object's 'id' to something else or disable" 1526 " automatic creation of the default RAM backend by setting" 1527 " 'memory-backend=%s' with '-machine'.\n", 1528 machine_class->default_ram_id); 1529 return; 1530 } 1531 if (!create_default_memdev(current_machine, mem_path, errp)) { 1532 return; 1533 } 1534 } 1535 1536 if (machine->numa_state) { 1537 numa_complete_configuration(machine); 1538 if (machine->numa_state->num_nodes) { 1539 machine_numa_finish_cpu_init(machine); 1540 if (machine_class->cpu_cluster_has_numa_boundary) { 1541 validate_cpu_cluster_to_numa_boundary(machine); 1542 } 1543 } 1544 } 1545 1546 if (!machine->ram && machine->memdev) { 1547 machine->ram = machine_consume_memdev(machine, machine->memdev); 1548 } 1549 1550 /* Check if the CPU type is supported */ 1551 if (machine->cpu_type && !is_cpu_type_supported(machine, errp)) { 1552 return; 1553 } 1554 1555 if (machine->cgs) { 1556 /* 1557 * With confidential guests, the host can't see the real 1558 * contents of RAM, so there's no point in it trying to merge 1559 * areas. 1560 */ 1561 machine_set_mem_merge(OBJECT(machine), false, &error_abort); 1562 1563 /* 1564 * Virtio devices can't count on directly accessing guest 1565 * memory, so they need iommu_platform=on to use normal DMA 1566 * mechanisms. That requires also disabling legacy virtio 1567 * support for those virtio pci devices which allow it. 1568 */ 1569 object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy", 1570 "on", true); 1571 object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform", 1572 "on", false); 1573 } 1574 1575 accel_init_interfaces(ACCEL_GET_CLASS(machine->accelerator)); 1576 machine_class->init(machine); 1577 phase_advance(PHASE_MACHINE_INITIALIZED); 1578 } 1579 1580 static NotifierList machine_init_done_notifiers = 1581 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers); 1582 1583 void qemu_add_machine_init_done_notifier(Notifier *notify) 1584 { 1585 notifier_list_add(&machine_init_done_notifiers, notify); 1586 if (phase_check(PHASE_MACHINE_READY)) { 1587 notify->notify(notify, NULL); 1588 } 1589 } 1590 1591 void qemu_remove_machine_init_done_notifier(Notifier *notify) 1592 { 1593 notifier_remove(notify); 1594 } 1595 1596 void qdev_machine_creation_done(void) 1597 { 1598 cpu_synchronize_all_post_init(); 1599 1600 if (current_machine->boot_config.once) { 1601 qemu_boot_set(current_machine->boot_config.once, &error_fatal); 1602 qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_config.order)); 1603 } 1604 1605 /* 1606 * ok, initial machine setup is done, starting from now we can 1607 * only create hotpluggable devices 1608 */ 1609 phase_advance(PHASE_MACHINE_READY); 1610 qdev_assert_realized_properly(); 1611 1612 /* TODO: once all bus devices are qdevified, this should be done 1613 * when bus is created by qdev.c */ 1614 /* 1615 * This is where we arrange for the sysbus to be reset when the 1616 * whole simulation is reset. In turn, resetting the sysbus will cause 1617 * all devices hanging off it (and all their child buses, recursively) 1618 * to be reset. Note that this will *not* reset any Device objects 1619 * which are not attached to some part of the qbus tree! 1620 */ 1621 qemu_register_resettable(OBJECT(sysbus_get_default())); 1622 1623 notifier_list_notify(&machine_init_done_notifiers, NULL); 1624 1625 if (rom_check_and_register_reset() != 0) { 1626 exit(1); 1627 } 1628 1629 replay_start(); 1630 1631 /* This checkpoint is required by replay to separate prior clock 1632 reading from the other reads, because timer polling functions query 1633 clock values from the log. */ 1634 replay_checkpoint(CHECKPOINT_RESET); 1635 qemu_system_reset(SHUTDOWN_CAUSE_NONE); 1636 register_global_state(); 1637 } 1638 1639 static const TypeInfo machine_info = { 1640 .name = TYPE_MACHINE, 1641 .parent = TYPE_OBJECT, 1642 .abstract = true, 1643 .class_size = sizeof(MachineClass), 1644 .class_init = machine_class_init, 1645 .class_base_init = machine_class_base_init, 1646 .instance_size = sizeof(MachineState), 1647 .instance_init = machine_initfn, 1648 .instance_finalize = machine_finalize, 1649 }; 1650 1651 static void machine_register_types(void) 1652 { 1653 type_register_static(&machine_info); 1654 } 1655 1656 type_init(machine_register_types) 1657