xref: /openbmc/qemu/hw/core/machine.c (revision 6c1ebe75)
1 /*
2  * QEMU Machine
3  *
4  * Copyright (C) 2014 Red Hat Inc
5  *
6  * Authors:
7  *   Marcel Apfelbaum <marcel.a@redhat.com>
8  *
9  * This work is licensed under the terms of the GNU GPL, version 2 or later.
10  * See the COPYING file in the top-level directory.
11  */
12 
13 #include "qemu/osdep.h"
14 #include "qemu/option.h"
15 #include "qapi/qmp/qerror.h"
16 #include "sysemu/replay.h"
17 #include "qemu/units.h"
18 #include "hw/boards.h"
19 #include "hw/loader.h"
20 #include "qapi/error.h"
21 #include "qapi/qapi-visit-common.h"
22 #include "qapi/qapi-visit-machine.h"
23 #include "qapi/visitor.h"
24 #include "hw/sysbus.h"
25 #include "sysemu/cpus.h"
26 #include "sysemu/sysemu.h"
27 #include "sysemu/reset.h"
28 #include "sysemu/runstate.h"
29 #include "sysemu/numa.h"
30 #include "qemu/error-report.h"
31 #include "sysemu/qtest.h"
32 #include "hw/pci/pci.h"
33 #include "hw/mem/nvdimm.h"
34 #include "migration/global_state.h"
35 #include "migration/vmstate.h"
36 #include "exec/confidential-guest-support.h"
37 #include "hw/virtio/virtio.h"
38 #include "hw/virtio/virtio-pci.h"
39 
40 GlobalProperty hw_compat_6_1[] = {};
41 const size_t hw_compat_6_1_len = G_N_ELEMENTS(hw_compat_6_1);
42 
43 GlobalProperty hw_compat_6_0[] = {
44     { "gpex-pcihost", "allow-unmapped-accesses", "false" },
45     { "i8042", "extended-state", "false"},
46     { "nvme-ns", "eui64-default", "off"},
47     { "e1000", "init-vet", "off" },
48     { "e1000e", "init-vet", "off" },
49 };
50 const size_t hw_compat_6_0_len = G_N_ELEMENTS(hw_compat_6_0);
51 
52 GlobalProperty hw_compat_5_2[] = {
53     { "ICH9-LPC", "smm-compat", "on"},
54     { "PIIX4_PM", "smm-compat", "on"},
55     { "virtio-blk-device", "report-discard-granularity", "off" },
56     { "virtio-net-pci", "vectors", "3"},
57 };
58 const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2);
59 
60 GlobalProperty hw_compat_5_1[] = {
61     { "vhost-scsi", "num_queues", "1"},
62     { "vhost-user-blk", "num-queues", "1"},
63     { "vhost-user-scsi", "num_queues", "1"},
64     { "virtio-blk-device", "num-queues", "1"},
65     { "virtio-scsi-device", "num_queues", "1"},
66     { "nvme", "use-intel-id", "on"},
67     { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
68     { "pl011", "migrate-clk", "off" },
69     { "virtio-pci", "x-ats-page-aligned", "off"},
70 };
71 const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1);
72 
73 GlobalProperty hw_compat_5_0[] = {
74     { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
75     { "virtio-balloon-device", "page-poison", "false" },
76     { "vmport", "x-read-set-eax", "off" },
77     { "vmport", "x-signal-unsupported-cmd", "off" },
78     { "vmport", "x-report-vmx-type", "off" },
79     { "vmport", "x-cmds-v2", "off" },
80     { "virtio-device", "x-disable-legacy-check", "true" },
81 };
82 const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0);
83 
84 GlobalProperty hw_compat_4_2[] = {
85     { "virtio-blk-device", "queue-size", "128"},
86     { "virtio-scsi-device", "virtqueue_size", "128"},
87     { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
88     { "virtio-blk-device", "seg-max-adjust", "off"},
89     { "virtio-scsi-device", "seg_max_adjust", "off"},
90     { "vhost-blk-device", "seg_max_adjust", "off"},
91     { "usb-host", "suppress-remote-wake", "off" },
92     { "usb-redir", "suppress-remote-wake", "off" },
93     { "qxl", "revision", "4" },
94     { "qxl-vga", "revision", "4" },
95     { "fw_cfg", "acpi-mr-restore", "false" },
96     { "virtio-device", "use-disabled-flag", "false" },
97 };
98 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2);
99 
100 GlobalProperty hw_compat_4_1[] = {
101     { "virtio-pci", "x-pcie-flr-init", "off" },
102 };
103 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1);
104 
105 GlobalProperty hw_compat_4_0[] = {
106     { "VGA",            "edid", "false" },
107     { "secondary-vga",  "edid", "false" },
108     { "bochs-display",  "edid", "false" },
109     { "virtio-vga",     "edid", "false" },
110     { "virtio-gpu-device", "edid", "false" },
111     { "virtio-device", "use-started", "false" },
112     { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
113     { "pl031", "migrate-tick-offset", "false" },
114 };
115 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0);
116 
117 GlobalProperty hw_compat_3_1[] = {
118     { "pcie-root-port", "x-speed", "2_5" },
119     { "pcie-root-port", "x-width", "1" },
120     { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
121     { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
122     { "tpm-crb", "ppi", "false" },
123     { "tpm-tis", "ppi", "false" },
124     { "usb-kbd", "serial", "42" },
125     { "usb-mouse", "serial", "42" },
126     { "usb-tablet", "serial", "42" },
127     { "virtio-blk-device", "discard", "false" },
128     { "virtio-blk-device", "write-zeroes", "false" },
129     { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
130     { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
131 };
132 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1);
133 
134 GlobalProperty hw_compat_3_0[] = {};
135 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0);
136 
137 GlobalProperty hw_compat_2_12[] = {
138     { "migration", "decompress-error-check", "off" },
139     { "hda-audio", "use-timer", "false" },
140     { "cirrus-vga", "global-vmstate", "true" },
141     { "VGA", "global-vmstate", "true" },
142     { "vmware-svga", "global-vmstate", "true" },
143     { "qxl-vga", "global-vmstate", "true" },
144 };
145 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12);
146 
147 GlobalProperty hw_compat_2_11[] = {
148     { "hpet", "hpet-offset-saved", "false" },
149     { "virtio-blk-pci", "vectors", "2" },
150     { "vhost-user-blk-pci", "vectors", "2" },
151     { "e1000", "migrate_tso_props", "off" },
152 };
153 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11);
154 
155 GlobalProperty hw_compat_2_10[] = {
156     { "virtio-mouse-device", "wheel-axis", "false" },
157     { "virtio-tablet-device", "wheel-axis", "false" },
158 };
159 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10);
160 
161 GlobalProperty hw_compat_2_9[] = {
162     { "pci-bridge", "shpc", "off" },
163     { "intel-iommu", "pt", "off" },
164     { "virtio-net-device", "x-mtu-bypass-backend", "off" },
165     { "pcie-root-port", "x-migrate-msix", "false" },
166 };
167 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9);
168 
169 GlobalProperty hw_compat_2_8[] = {
170     { "fw_cfg_mem", "x-file-slots", "0x10" },
171     { "fw_cfg_io", "x-file-slots", "0x10" },
172     { "pflash_cfi01", "old-multiple-chip-handling", "on" },
173     { "pci-bridge", "shpc", "on" },
174     { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" },
175     { "virtio-pci", "x-pcie-deverr-init", "off" },
176     { "virtio-pci", "x-pcie-lnkctl-init", "off" },
177     { "virtio-pci", "x-pcie-pm-init", "off" },
178     { "cirrus-vga", "vgamem_mb", "8" },
179     { "isa-cirrus-vga", "vgamem_mb", "8" },
180 };
181 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8);
182 
183 GlobalProperty hw_compat_2_7[] = {
184     { "virtio-pci", "page-per-vq", "on" },
185     { "virtio-serial-device", "emergency-write", "off" },
186     { "ioapic", "version", "0x11" },
187     { "intel-iommu", "x-buggy-eim", "true" },
188     { "virtio-pci", "x-ignore-backend-features", "on" },
189 };
190 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7);
191 
192 GlobalProperty hw_compat_2_6[] = {
193     { "virtio-mmio", "format_transport_address", "off" },
194     /* Optional because not all virtio-pci devices support legacy mode */
195     { "virtio-pci", "disable-modern", "on",  .optional = true },
196     { "virtio-pci", "disable-legacy", "off", .optional = true },
197 };
198 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6);
199 
200 GlobalProperty hw_compat_2_5[] = {
201     { "isa-fdc", "fallback", "144" },
202     { "pvscsi", "x-old-pci-configuration", "on" },
203     { "pvscsi", "x-disable-pcie", "on" },
204     { "vmxnet3", "x-old-msi-offsets", "on" },
205     { "vmxnet3", "x-disable-pcie", "on" },
206 };
207 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5);
208 
209 GlobalProperty hw_compat_2_4[] = {
210     /* Optional because the 'scsi' property is Linux-only */
211     { "virtio-blk-device", "scsi", "true", .optional = true },
212     { "e1000", "extra_mac_registers", "off" },
213     { "virtio-pci", "x-disable-pcie", "on" },
214     { "virtio-pci", "migrate-extra", "off" },
215     { "fw_cfg_mem", "dma_enabled", "off" },
216     { "fw_cfg_io", "dma_enabled", "off" }
217 };
218 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4);
219 
220 GlobalProperty hw_compat_2_3[] = {
221     { "virtio-blk-pci", "any_layout", "off" },
222     { "virtio-balloon-pci", "any_layout", "off" },
223     { "virtio-serial-pci", "any_layout", "off" },
224     { "virtio-9p-pci", "any_layout", "off" },
225     { "virtio-rng-pci", "any_layout", "off" },
226     { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" },
227     { "migration", "send-configuration", "off" },
228     { "migration", "send-section-footer", "off" },
229     { "migration", "store-global-state", "off" },
230 };
231 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3);
232 
233 GlobalProperty hw_compat_2_2[] = {};
234 const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2);
235 
236 GlobalProperty hw_compat_2_1[] = {
237     { "intel-hda", "old_msi_addr", "on" },
238     { "VGA", "qemu-extended-regs", "off" },
239     { "secondary-vga", "qemu-extended-regs", "off" },
240     { "virtio-scsi-pci", "any_layout", "off" },
241     { "usb-mouse", "usb_version", "1" },
242     { "usb-kbd", "usb_version", "1" },
243     { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
244 };
245 const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1);
246 
247 MachineState *current_machine;
248 
249 static char *machine_get_kernel(Object *obj, Error **errp)
250 {
251     MachineState *ms = MACHINE(obj);
252 
253     return g_strdup(ms->kernel_filename);
254 }
255 
256 static void machine_set_kernel(Object *obj, const char *value, Error **errp)
257 {
258     MachineState *ms = MACHINE(obj);
259 
260     g_free(ms->kernel_filename);
261     ms->kernel_filename = g_strdup(value);
262 }
263 
264 static char *machine_get_initrd(Object *obj, Error **errp)
265 {
266     MachineState *ms = MACHINE(obj);
267 
268     return g_strdup(ms->initrd_filename);
269 }
270 
271 static void machine_set_initrd(Object *obj, const char *value, Error **errp)
272 {
273     MachineState *ms = MACHINE(obj);
274 
275     g_free(ms->initrd_filename);
276     ms->initrd_filename = g_strdup(value);
277 }
278 
279 static char *machine_get_append(Object *obj, Error **errp)
280 {
281     MachineState *ms = MACHINE(obj);
282 
283     return g_strdup(ms->kernel_cmdline);
284 }
285 
286 static void machine_set_append(Object *obj, const char *value, Error **errp)
287 {
288     MachineState *ms = MACHINE(obj);
289 
290     g_free(ms->kernel_cmdline);
291     ms->kernel_cmdline = g_strdup(value);
292 }
293 
294 static char *machine_get_dtb(Object *obj, Error **errp)
295 {
296     MachineState *ms = MACHINE(obj);
297 
298     return g_strdup(ms->dtb);
299 }
300 
301 static void machine_set_dtb(Object *obj, const char *value, Error **errp)
302 {
303     MachineState *ms = MACHINE(obj);
304 
305     g_free(ms->dtb);
306     ms->dtb = g_strdup(value);
307 }
308 
309 static char *machine_get_dumpdtb(Object *obj, Error **errp)
310 {
311     MachineState *ms = MACHINE(obj);
312 
313     return g_strdup(ms->dumpdtb);
314 }
315 
316 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp)
317 {
318     MachineState *ms = MACHINE(obj);
319 
320     g_free(ms->dumpdtb);
321     ms->dumpdtb = g_strdup(value);
322 }
323 
324 static void machine_get_phandle_start(Object *obj, Visitor *v,
325                                       const char *name, void *opaque,
326                                       Error **errp)
327 {
328     MachineState *ms = MACHINE(obj);
329     int64_t value = ms->phandle_start;
330 
331     visit_type_int(v, name, &value, errp);
332 }
333 
334 static void machine_set_phandle_start(Object *obj, Visitor *v,
335                                       const char *name, void *opaque,
336                                       Error **errp)
337 {
338     MachineState *ms = MACHINE(obj);
339     int64_t value;
340 
341     if (!visit_type_int(v, name, &value, errp)) {
342         return;
343     }
344 
345     ms->phandle_start = value;
346 }
347 
348 static char *machine_get_dt_compatible(Object *obj, Error **errp)
349 {
350     MachineState *ms = MACHINE(obj);
351 
352     return g_strdup(ms->dt_compatible);
353 }
354 
355 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp)
356 {
357     MachineState *ms = MACHINE(obj);
358 
359     g_free(ms->dt_compatible);
360     ms->dt_compatible = g_strdup(value);
361 }
362 
363 static bool machine_get_dump_guest_core(Object *obj, Error **errp)
364 {
365     MachineState *ms = MACHINE(obj);
366 
367     return ms->dump_guest_core;
368 }
369 
370 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp)
371 {
372     MachineState *ms = MACHINE(obj);
373 
374     ms->dump_guest_core = value;
375 }
376 
377 static bool machine_get_mem_merge(Object *obj, Error **errp)
378 {
379     MachineState *ms = MACHINE(obj);
380 
381     return ms->mem_merge;
382 }
383 
384 static void machine_set_mem_merge(Object *obj, bool value, Error **errp)
385 {
386     MachineState *ms = MACHINE(obj);
387 
388     ms->mem_merge = value;
389 }
390 
391 static bool machine_get_usb(Object *obj, Error **errp)
392 {
393     MachineState *ms = MACHINE(obj);
394 
395     return ms->usb;
396 }
397 
398 static void machine_set_usb(Object *obj, bool value, Error **errp)
399 {
400     MachineState *ms = MACHINE(obj);
401 
402     ms->usb = value;
403     ms->usb_disabled = !value;
404 }
405 
406 static bool machine_get_graphics(Object *obj, Error **errp)
407 {
408     MachineState *ms = MACHINE(obj);
409 
410     return ms->enable_graphics;
411 }
412 
413 static void machine_set_graphics(Object *obj, bool value, Error **errp)
414 {
415     MachineState *ms = MACHINE(obj);
416 
417     ms->enable_graphics = value;
418 }
419 
420 static char *machine_get_firmware(Object *obj, Error **errp)
421 {
422     MachineState *ms = MACHINE(obj);
423 
424     return g_strdup(ms->firmware);
425 }
426 
427 static void machine_set_firmware(Object *obj, const char *value, Error **errp)
428 {
429     MachineState *ms = MACHINE(obj);
430 
431     g_free(ms->firmware);
432     ms->firmware = g_strdup(value);
433 }
434 
435 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp)
436 {
437     MachineState *ms = MACHINE(obj);
438 
439     ms->suppress_vmdesc = value;
440 }
441 
442 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp)
443 {
444     MachineState *ms = MACHINE(obj);
445 
446     return ms->suppress_vmdesc;
447 }
448 
449 static char *machine_get_memory_encryption(Object *obj, Error **errp)
450 {
451     MachineState *ms = MACHINE(obj);
452 
453     if (ms->cgs) {
454         return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs)));
455     }
456 
457     return NULL;
458 }
459 
460 static void machine_set_memory_encryption(Object *obj, const char *value,
461                                         Error **errp)
462 {
463     Object *cgs =
464         object_resolve_path_component(object_get_objects_root(), value);
465 
466     if (!cgs) {
467         error_setg(errp, "No such memory encryption object '%s'", value);
468         return;
469     }
470 
471     object_property_set_link(obj, "confidential-guest-support", cgs, errp);
472 }
473 
474 static void machine_check_confidential_guest_support(const Object *obj,
475                                                      const char *name,
476                                                      Object *new_target,
477                                                      Error **errp)
478 {
479     /*
480      * So far the only constraint is that the target has the
481      * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked
482      * by the QOM core
483      */
484 }
485 
486 static bool machine_get_nvdimm(Object *obj, Error **errp)
487 {
488     MachineState *ms = MACHINE(obj);
489 
490     return ms->nvdimms_state->is_enabled;
491 }
492 
493 static void machine_set_nvdimm(Object *obj, bool value, Error **errp)
494 {
495     MachineState *ms = MACHINE(obj);
496 
497     ms->nvdimms_state->is_enabled = value;
498 }
499 
500 static bool machine_get_hmat(Object *obj, Error **errp)
501 {
502     MachineState *ms = MACHINE(obj);
503 
504     return ms->numa_state->hmat_enabled;
505 }
506 
507 static void machine_set_hmat(Object *obj, bool value, Error **errp)
508 {
509     MachineState *ms = MACHINE(obj);
510 
511     ms->numa_state->hmat_enabled = value;
512 }
513 
514 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp)
515 {
516     MachineState *ms = MACHINE(obj);
517 
518     return g_strdup(ms->nvdimms_state->persistence_string);
519 }
520 
521 static void machine_set_nvdimm_persistence(Object *obj, const char *value,
522                                            Error **errp)
523 {
524     MachineState *ms = MACHINE(obj);
525     NVDIMMState *nvdimms_state = ms->nvdimms_state;
526 
527     if (strcmp(value, "cpu") == 0) {
528         nvdimms_state->persistence = 3;
529     } else if (strcmp(value, "mem-ctrl") == 0) {
530         nvdimms_state->persistence = 2;
531     } else {
532         error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option",
533                    value);
534         return;
535     }
536 
537     g_free(nvdimms_state->persistence_string);
538     nvdimms_state->persistence_string = g_strdup(value);
539 }
540 
541 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type)
542 {
543     QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type));
544 }
545 
546 bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev)
547 {
548     bool allowed = false;
549     strList *wl;
550     Object *obj = OBJECT(dev);
551 
552     if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) {
553         return false;
554     }
555 
556     for (wl = mc->allowed_dynamic_sysbus_devices;
557          !allowed && wl;
558          wl = wl->next) {
559         allowed |= !!object_dynamic_cast(obj, wl->value);
560     }
561 
562     return allowed;
563 }
564 
565 static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque)
566 {
567     MachineState *machine = opaque;
568     MachineClass *mc = MACHINE_GET_CLASS(machine);
569 
570     if (!device_is_dynamic_sysbus(mc, DEVICE(sbdev))) {
571         error_report("Option '-device %s' cannot be handled by this machine",
572                      object_class_get_name(object_get_class(OBJECT(sbdev))));
573         exit(1);
574     }
575 }
576 
577 static char *machine_get_memdev(Object *obj, Error **errp)
578 {
579     MachineState *ms = MACHINE(obj);
580 
581     return g_strdup(ms->ram_memdev_id);
582 }
583 
584 static void machine_set_memdev(Object *obj, const char *value, Error **errp)
585 {
586     MachineState *ms = MACHINE(obj);
587 
588     g_free(ms->ram_memdev_id);
589     ms->ram_memdev_id = g_strdup(value);
590 }
591 
592 static void machine_init_notify(Notifier *notifier, void *data)
593 {
594     MachineState *machine = MACHINE(qdev_get_machine());
595 
596     /*
597      * Loop through all dynamically created sysbus devices and check if they are
598      * all allowed.  If a device is not allowed, error out.
599      */
600     foreach_dynamic_sysbus_device(validate_sysbus_device, machine);
601 }
602 
603 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine)
604 {
605     int i;
606     HotpluggableCPUList *head = NULL;
607     MachineClass *mc = MACHINE_GET_CLASS(machine);
608 
609     /* force board to initialize possible_cpus if it hasn't been done yet */
610     mc->possible_cpu_arch_ids(machine);
611 
612     for (i = 0; i < machine->possible_cpus->len; i++) {
613         Object *cpu;
614         HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1);
615 
616         cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type);
617         cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count;
618         cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props,
619                                    sizeof(*cpu_item->props));
620 
621         cpu = machine->possible_cpus->cpus[i].cpu;
622         if (cpu) {
623             cpu_item->has_qom_path = true;
624             cpu_item->qom_path = object_get_canonical_path(cpu);
625         }
626         QAPI_LIST_PREPEND(head, cpu_item);
627     }
628     return head;
629 }
630 
631 /**
632  * machine_set_cpu_numa_node:
633  * @machine: machine object to modify
634  * @props: specifies which cpu objects to assign to
635  *         numa node specified by @props.node_id
636  * @errp: if an error occurs, a pointer to an area to store the error
637  *
638  * Associate NUMA node specified by @props.node_id with cpu slots that
639  * match socket/core/thread-ids specified by @props. It's recommended to use
640  * query-hotpluggable-cpus.props values to specify affected cpu slots,
641  * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
642  *
643  * However for CLI convenience it's possible to pass in subset of properties,
644  * which would affect all cpu slots that match it.
645  * Ex for pc machine:
646  *    -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
647  *    -numa cpu,node-id=0,socket_id=0 \
648  *    -numa cpu,node-id=1,socket_id=1
649  * will assign all child cores of socket 0 to node 0 and
650  * of socket 1 to node 1.
651  *
652  * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
653  * return error.
654  * Empty subset is disallowed and function will return with error in this case.
655  */
656 void machine_set_cpu_numa_node(MachineState *machine,
657                                const CpuInstanceProperties *props, Error **errp)
658 {
659     MachineClass *mc = MACHINE_GET_CLASS(machine);
660     NodeInfo *numa_info = machine->numa_state->nodes;
661     bool match = false;
662     int i;
663 
664     if (!mc->possible_cpu_arch_ids) {
665         error_setg(errp, "mapping of CPUs to NUMA node is not supported");
666         return;
667     }
668 
669     /* disabling node mapping is not supported, forbid it */
670     assert(props->has_node_id);
671 
672     /* force board to initialize possible_cpus if it hasn't been done yet */
673     mc->possible_cpu_arch_ids(machine);
674 
675     for (i = 0; i < machine->possible_cpus->len; i++) {
676         CPUArchId *slot = &machine->possible_cpus->cpus[i];
677 
678         /* reject unsupported by board properties */
679         if (props->has_thread_id && !slot->props.has_thread_id) {
680             error_setg(errp, "thread-id is not supported");
681             return;
682         }
683 
684         if (props->has_core_id && !slot->props.has_core_id) {
685             error_setg(errp, "core-id is not supported");
686             return;
687         }
688 
689         if (props->has_socket_id && !slot->props.has_socket_id) {
690             error_setg(errp, "socket-id is not supported");
691             return;
692         }
693 
694         if (props->has_die_id && !slot->props.has_die_id) {
695             error_setg(errp, "die-id is not supported");
696             return;
697         }
698 
699         /* skip slots with explicit mismatch */
700         if (props->has_thread_id && props->thread_id != slot->props.thread_id) {
701                 continue;
702         }
703 
704         if (props->has_core_id && props->core_id != slot->props.core_id) {
705                 continue;
706         }
707 
708         if (props->has_die_id && props->die_id != slot->props.die_id) {
709                 continue;
710         }
711 
712         if (props->has_socket_id && props->socket_id != slot->props.socket_id) {
713                 continue;
714         }
715 
716         /* reject assignment if slot is already assigned, for compatibility
717          * of legacy cpu_index mapping with SPAPR core based mapping do not
718          * error out if cpu thread and matched core have the same node-id */
719         if (slot->props.has_node_id &&
720             slot->props.node_id != props->node_id) {
721             error_setg(errp, "CPU is already assigned to node-id: %" PRId64,
722                        slot->props.node_id);
723             return;
724         }
725 
726         /* assign slot to node as it's matched '-numa cpu' key */
727         match = true;
728         slot->props.node_id = props->node_id;
729         slot->props.has_node_id = props->has_node_id;
730 
731         if (machine->numa_state->hmat_enabled) {
732             if ((numa_info[props->node_id].initiator < MAX_NODES) &&
733                 (props->node_id != numa_info[props->node_id].initiator)) {
734                 error_setg(errp, "The initiator of CPU NUMA node %" PRId64
735                            " should be itself (got %" PRIu16 ")",
736                            props->node_id, numa_info[props->node_id].initiator);
737                 return;
738             }
739             numa_info[props->node_id].has_cpu = true;
740             numa_info[props->node_id].initiator = props->node_id;
741         }
742     }
743 
744     if (!match) {
745         error_setg(errp, "no match found");
746     }
747 }
748 
749 static void smp_parse(MachineState *ms, SMPConfiguration *config, Error **errp)
750 {
751     unsigned cpus    = config->has_cpus ? config->cpus : 0;
752     unsigned sockets = config->has_sockets ? config->sockets : 0;
753     unsigned cores   = config->has_cores ? config->cores : 0;
754     unsigned threads = config->has_threads ? config->threads : 0;
755 
756     if (config->has_dies && config->dies != 0 && config->dies != 1) {
757         error_setg(errp, "dies not supported by this machine's CPU topology");
758         return;
759     }
760 
761     /* compute missing values, prefer sockets over cores over threads */
762     if (cpus == 0 || sockets == 0) {
763         cores = cores > 0 ? cores : 1;
764         threads = threads > 0 ? threads : 1;
765         if (cpus == 0) {
766             sockets = sockets > 0 ? sockets : 1;
767             cpus = cores * threads * sockets;
768         } else {
769             ms->smp.max_cpus = config->has_maxcpus ? config->maxcpus : cpus;
770             sockets = ms->smp.max_cpus / (cores * threads);
771         }
772     } else if (cores == 0) {
773         threads = threads > 0 ? threads : 1;
774         cores = cpus / (sockets * threads);
775         cores = cores > 0 ? cores : 1;
776     } else if (threads == 0) {
777         threads = cpus / (cores * sockets);
778         threads = threads > 0 ? threads : 1;
779     } else if (sockets * cores * threads < cpus) {
780         error_setg(errp, "cpu topology: "
781                    "sockets (%u) * cores (%u) * threads (%u) < "
782                    "smp_cpus (%u)",
783                    sockets, cores, threads, cpus);
784         return;
785     }
786 
787     ms->smp.max_cpus = config->has_maxcpus ? config->maxcpus : cpus;
788 
789     if (ms->smp.max_cpus < cpus) {
790         error_setg(errp, "maxcpus must be equal to or greater than smp");
791         return;
792     }
793 
794     if (sockets * cores * threads != ms->smp.max_cpus) {
795         error_setg(errp, "Invalid CPU topology: "
796                    "sockets (%u) * cores (%u) * threads (%u) "
797                    "!= maxcpus (%u)",
798                    sockets, cores, threads,
799                    ms->smp.max_cpus);
800         return;
801     }
802 
803     ms->smp.cpus = cpus;
804     ms->smp.cores = cores;
805     ms->smp.threads = threads;
806     ms->smp.sockets = sockets;
807 }
808 
809 static void machine_get_smp(Object *obj, Visitor *v, const char *name,
810                             void *opaque, Error **errp)
811 {
812     MachineState *ms = MACHINE(obj);
813     SMPConfiguration *config = &(SMPConfiguration){
814         .has_cores = true, .cores = ms->smp.cores,
815         .has_sockets = true, .sockets = ms->smp.sockets,
816         .has_dies = true, .dies = ms->smp.dies,
817         .has_threads = true, .threads = ms->smp.threads,
818         .has_cpus = true, .cpus = ms->smp.cpus,
819         .has_maxcpus = true, .maxcpus = ms->smp.max_cpus,
820     };
821     if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) {
822         return;
823     }
824 }
825 
826 static void machine_set_smp(Object *obj, Visitor *v, const char *name,
827                             void *opaque, Error **errp)
828 {
829     MachineClass *mc = MACHINE_GET_CLASS(obj);
830     MachineState *ms = MACHINE(obj);
831     SMPConfiguration *config;
832     ERRP_GUARD();
833 
834     if (!visit_type_SMPConfiguration(v, name, &config, errp)) {
835         return;
836     }
837 
838     mc->smp_parse(ms, config, errp);
839     if (*errp) {
840         goto out_free;
841     }
842 
843     /* sanity-check smp_cpus and max_cpus against mc */
844     if (ms->smp.cpus < mc->min_cpus) {
845         error_setg(errp, "Invalid SMP CPUs %d. The min CPUs "
846                    "supported by machine '%s' is %d",
847                    ms->smp.cpus,
848                    mc->name, mc->min_cpus);
849     } else if (ms->smp.max_cpus > mc->max_cpus) {
850         error_setg(errp, "Invalid SMP CPUs %d. The max CPUs "
851                    "supported by machine '%s' is %d",
852                    current_machine->smp.max_cpus,
853                    mc->name, mc->max_cpus);
854     }
855 
856 out_free:
857     qapi_free_SMPConfiguration(config);
858 }
859 
860 static void machine_class_init(ObjectClass *oc, void *data)
861 {
862     MachineClass *mc = MACHINE_CLASS(oc);
863 
864     /* Default 128 MB as guest ram size */
865     mc->default_ram_size = 128 * MiB;
866     mc->rom_file_has_mr = true;
867     mc->smp_parse = smp_parse;
868 
869     /* numa node memory size aligned on 8MB by default.
870      * On Linux, each node's border has to be 8MB aligned
871      */
872     mc->numa_mem_align_shift = 23;
873 
874     object_class_property_add_str(oc, "kernel",
875         machine_get_kernel, machine_set_kernel);
876     object_class_property_set_description(oc, "kernel",
877         "Linux kernel image file");
878 
879     object_class_property_add_str(oc, "initrd",
880         machine_get_initrd, machine_set_initrd);
881     object_class_property_set_description(oc, "initrd",
882         "Linux initial ramdisk file");
883 
884     object_class_property_add_str(oc, "append",
885         machine_get_append, machine_set_append);
886     object_class_property_set_description(oc, "append",
887         "Linux kernel command line");
888 
889     object_class_property_add_str(oc, "dtb",
890         machine_get_dtb, machine_set_dtb);
891     object_class_property_set_description(oc, "dtb",
892         "Linux kernel device tree file");
893 
894     object_class_property_add_str(oc, "dumpdtb",
895         machine_get_dumpdtb, machine_set_dumpdtb);
896     object_class_property_set_description(oc, "dumpdtb",
897         "Dump current dtb to a file and quit");
898 
899     object_class_property_add(oc, "smp", "SMPConfiguration",
900         machine_get_smp, machine_set_smp,
901         NULL, NULL);
902     object_class_property_set_description(oc, "smp",
903         "CPU topology");
904 
905     object_class_property_add(oc, "phandle-start", "int",
906         machine_get_phandle_start, machine_set_phandle_start,
907         NULL, NULL);
908     object_class_property_set_description(oc, "phandle-start",
909         "The first phandle ID we may generate dynamically");
910 
911     object_class_property_add_str(oc, "dt-compatible",
912         machine_get_dt_compatible, machine_set_dt_compatible);
913     object_class_property_set_description(oc, "dt-compatible",
914         "Overrides the \"compatible\" property of the dt root node");
915 
916     object_class_property_add_bool(oc, "dump-guest-core",
917         machine_get_dump_guest_core, machine_set_dump_guest_core);
918     object_class_property_set_description(oc, "dump-guest-core",
919         "Include guest memory in a core dump");
920 
921     object_class_property_add_bool(oc, "mem-merge",
922         machine_get_mem_merge, machine_set_mem_merge);
923     object_class_property_set_description(oc, "mem-merge",
924         "Enable/disable memory merge support");
925 
926     object_class_property_add_bool(oc, "usb",
927         machine_get_usb, machine_set_usb);
928     object_class_property_set_description(oc, "usb",
929         "Set on/off to enable/disable usb");
930 
931     object_class_property_add_bool(oc, "graphics",
932         machine_get_graphics, machine_set_graphics);
933     object_class_property_set_description(oc, "graphics",
934         "Set on/off to enable/disable graphics emulation");
935 
936     object_class_property_add_str(oc, "firmware",
937         machine_get_firmware, machine_set_firmware);
938     object_class_property_set_description(oc, "firmware",
939         "Firmware image");
940 
941     object_class_property_add_bool(oc, "suppress-vmdesc",
942         machine_get_suppress_vmdesc, machine_set_suppress_vmdesc);
943     object_class_property_set_description(oc, "suppress-vmdesc",
944         "Set on to disable self-describing migration");
945 
946     object_class_property_add_link(oc, "confidential-guest-support",
947                                    TYPE_CONFIDENTIAL_GUEST_SUPPORT,
948                                    offsetof(MachineState, cgs),
949                                    machine_check_confidential_guest_support,
950                                    OBJ_PROP_LINK_STRONG);
951     object_class_property_set_description(oc, "confidential-guest-support",
952                                           "Set confidential guest scheme to support");
953 
954     /* For compatibility */
955     object_class_property_add_str(oc, "memory-encryption",
956         machine_get_memory_encryption, machine_set_memory_encryption);
957     object_class_property_set_description(oc, "memory-encryption",
958         "Set memory encryption object to use");
959 
960     object_class_property_add_str(oc, "memory-backend",
961                                   machine_get_memdev, machine_set_memdev);
962     object_class_property_set_description(oc, "memory-backend",
963                                           "Set RAM backend"
964                                           "Valid value is ID of hostmem based backend");
965 }
966 
967 static void machine_class_base_init(ObjectClass *oc, void *data)
968 {
969     MachineClass *mc = MACHINE_CLASS(oc);
970     mc->max_cpus = mc->max_cpus ?: 1;
971     mc->min_cpus = mc->min_cpus ?: 1;
972     mc->default_cpus = mc->default_cpus ?: 1;
973 
974     if (!object_class_is_abstract(oc)) {
975         const char *cname = object_class_get_name(oc);
976         assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX));
977         mc->name = g_strndup(cname,
978                             strlen(cname) - strlen(TYPE_MACHINE_SUFFIX));
979         mc->compat_props = g_ptr_array_new();
980     }
981 }
982 
983 static void machine_initfn(Object *obj)
984 {
985     MachineState *ms = MACHINE(obj);
986     MachineClass *mc = MACHINE_GET_CLASS(obj);
987 
988     container_get(obj, "/peripheral");
989     container_get(obj, "/peripheral-anon");
990 
991     ms->dump_guest_core = true;
992     ms->mem_merge = true;
993     ms->enable_graphics = true;
994     ms->kernel_cmdline = g_strdup("");
995 
996     if (mc->nvdimm_supported) {
997         Object *obj = OBJECT(ms);
998 
999         ms->nvdimms_state = g_new0(NVDIMMState, 1);
1000         object_property_add_bool(obj, "nvdimm",
1001                                  machine_get_nvdimm, machine_set_nvdimm);
1002         object_property_set_description(obj, "nvdimm",
1003                                         "Set on/off to enable/disable "
1004                                         "NVDIMM instantiation");
1005 
1006         object_property_add_str(obj, "nvdimm-persistence",
1007                                 machine_get_nvdimm_persistence,
1008                                 machine_set_nvdimm_persistence);
1009         object_property_set_description(obj, "nvdimm-persistence",
1010                                         "Set NVDIMM persistence"
1011                                         "Valid values are cpu, mem-ctrl");
1012     }
1013 
1014     if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) {
1015         ms->numa_state = g_new0(NumaState, 1);
1016         object_property_add_bool(obj, "hmat",
1017                                  machine_get_hmat, machine_set_hmat);
1018         object_property_set_description(obj, "hmat",
1019                                         "Set on/off to enable/disable "
1020                                         "ACPI Heterogeneous Memory Attribute "
1021                                         "Table (HMAT)");
1022     }
1023 
1024     /* Register notifier when init is done for sysbus sanity checks */
1025     ms->sysbus_notifier.notify = machine_init_notify;
1026     qemu_add_machine_init_done_notifier(&ms->sysbus_notifier);
1027 
1028     /* default to mc->default_cpus */
1029     ms->smp.cpus = mc->default_cpus;
1030     ms->smp.max_cpus = mc->default_cpus;
1031     ms->smp.cores = 1;
1032     ms->smp.dies = 1;
1033     ms->smp.threads = 1;
1034     ms->smp.sockets = 1;
1035 }
1036 
1037 static void machine_finalize(Object *obj)
1038 {
1039     MachineState *ms = MACHINE(obj);
1040 
1041     g_free(ms->kernel_filename);
1042     g_free(ms->initrd_filename);
1043     g_free(ms->kernel_cmdline);
1044     g_free(ms->dtb);
1045     g_free(ms->dumpdtb);
1046     g_free(ms->dt_compatible);
1047     g_free(ms->firmware);
1048     g_free(ms->device_memory);
1049     g_free(ms->nvdimms_state);
1050     g_free(ms->numa_state);
1051 }
1052 
1053 bool machine_usb(MachineState *machine)
1054 {
1055     return machine->usb;
1056 }
1057 
1058 int machine_phandle_start(MachineState *machine)
1059 {
1060     return machine->phandle_start;
1061 }
1062 
1063 bool machine_dump_guest_core(MachineState *machine)
1064 {
1065     return machine->dump_guest_core;
1066 }
1067 
1068 bool machine_mem_merge(MachineState *machine)
1069 {
1070     return machine->mem_merge;
1071 }
1072 
1073 static char *cpu_slot_to_string(const CPUArchId *cpu)
1074 {
1075     GString *s = g_string_new(NULL);
1076     if (cpu->props.has_socket_id) {
1077         g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id);
1078     }
1079     if (cpu->props.has_die_id) {
1080         g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id);
1081     }
1082     if (cpu->props.has_core_id) {
1083         if (s->len) {
1084             g_string_append_printf(s, ", ");
1085         }
1086         g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id);
1087     }
1088     if (cpu->props.has_thread_id) {
1089         if (s->len) {
1090             g_string_append_printf(s, ", ");
1091         }
1092         g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id);
1093     }
1094     return g_string_free(s, false);
1095 }
1096 
1097 static void numa_validate_initiator(NumaState *numa_state)
1098 {
1099     int i;
1100     NodeInfo *numa_info = numa_state->nodes;
1101 
1102     for (i = 0; i < numa_state->num_nodes; i++) {
1103         if (numa_info[i].initiator == MAX_NODES) {
1104             error_report("The initiator of NUMA node %d is missing, use "
1105                          "'-numa node,initiator' option to declare it", i);
1106             exit(1);
1107         }
1108 
1109         if (!numa_info[numa_info[i].initiator].present) {
1110             error_report("NUMA node %" PRIu16 " is missing, use "
1111                          "'-numa node' option to declare it first",
1112                          numa_info[i].initiator);
1113             exit(1);
1114         }
1115 
1116         if (!numa_info[numa_info[i].initiator].has_cpu) {
1117             error_report("The initiator of NUMA node %d is invalid", i);
1118             exit(1);
1119         }
1120     }
1121 }
1122 
1123 static void machine_numa_finish_cpu_init(MachineState *machine)
1124 {
1125     int i;
1126     bool default_mapping;
1127     GString *s = g_string_new(NULL);
1128     MachineClass *mc = MACHINE_GET_CLASS(machine);
1129     const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine);
1130 
1131     assert(machine->numa_state->num_nodes);
1132     for (i = 0; i < possible_cpus->len; i++) {
1133         if (possible_cpus->cpus[i].props.has_node_id) {
1134             break;
1135         }
1136     }
1137     default_mapping = (i == possible_cpus->len);
1138 
1139     for (i = 0; i < possible_cpus->len; i++) {
1140         const CPUArchId *cpu_slot = &possible_cpus->cpus[i];
1141 
1142         if (!cpu_slot->props.has_node_id) {
1143             /* fetch default mapping from board and enable it */
1144             CpuInstanceProperties props = cpu_slot->props;
1145 
1146             props.node_id = mc->get_default_cpu_node_id(machine, i);
1147             if (!default_mapping) {
1148                 /* record slots with not set mapping,
1149                  * TODO: make it hard error in future */
1150                 char *cpu_str = cpu_slot_to_string(cpu_slot);
1151                 g_string_append_printf(s, "%sCPU %d [%s]",
1152                                        s->len ? ", " : "", i, cpu_str);
1153                 g_free(cpu_str);
1154 
1155                 /* non mapped cpus used to fallback to node 0 */
1156                 props.node_id = 0;
1157             }
1158 
1159             props.has_node_id = true;
1160             machine_set_cpu_numa_node(machine, &props, &error_fatal);
1161         }
1162     }
1163 
1164     if (machine->numa_state->hmat_enabled) {
1165         numa_validate_initiator(machine->numa_state);
1166     }
1167 
1168     if (s->len && !qtest_enabled()) {
1169         warn_report("CPU(s) not present in any NUMA nodes: %s",
1170                     s->str);
1171         warn_report("All CPU(s) up to maxcpus should be described "
1172                     "in NUMA config, ability to start up with partial NUMA "
1173                     "mappings is obsoleted and will be removed in future");
1174     }
1175     g_string_free(s, true);
1176 }
1177 
1178 MemoryRegion *machine_consume_memdev(MachineState *machine,
1179                                      HostMemoryBackend *backend)
1180 {
1181     MemoryRegion *ret = host_memory_backend_get_memory(backend);
1182 
1183     if (memory_region_is_mapped(ret)) {
1184         error_report("memory backend %s can't be used multiple times.",
1185                      object_get_canonical_path_component(OBJECT(backend)));
1186         exit(EXIT_FAILURE);
1187     }
1188     host_memory_backend_set_mapped(backend, true);
1189     vmstate_register_ram_global(ret);
1190     return ret;
1191 }
1192 
1193 void machine_run_board_init(MachineState *machine)
1194 {
1195     MachineClass *machine_class = MACHINE_GET_CLASS(machine);
1196     ObjectClass *oc = object_class_by_name(machine->cpu_type);
1197     CPUClass *cc;
1198 
1199     /* This checkpoint is required by replay to separate prior clock
1200        reading from the other reads, because timer polling functions query
1201        clock values from the log. */
1202     replay_checkpoint(CHECKPOINT_INIT);
1203 
1204     if (machine->ram_memdev_id) {
1205         Object *o;
1206         o = object_resolve_path_type(machine->ram_memdev_id,
1207                                      TYPE_MEMORY_BACKEND, NULL);
1208         machine->ram = machine_consume_memdev(machine, MEMORY_BACKEND(o));
1209     }
1210 
1211     if (machine->numa_state) {
1212         numa_complete_configuration(machine);
1213         if (machine->numa_state->num_nodes) {
1214             machine_numa_finish_cpu_init(machine);
1215         }
1216     }
1217 
1218     /* If the machine supports the valid_cpu_types check and the user
1219      * specified a CPU with -cpu check here that the user CPU is supported.
1220      */
1221     if (machine_class->valid_cpu_types && machine->cpu_type) {
1222         int i;
1223 
1224         for (i = 0; machine_class->valid_cpu_types[i]; i++) {
1225             if (object_class_dynamic_cast(oc,
1226                                           machine_class->valid_cpu_types[i])) {
1227                 /* The user specificed CPU is in the valid field, we are
1228                  * good to go.
1229                  */
1230                 break;
1231             }
1232         }
1233 
1234         if (!machine_class->valid_cpu_types[i]) {
1235             /* The user specified CPU is not valid */
1236             error_report("Invalid CPU type: %s", machine->cpu_type);
1237             error_printf("The valid types are: %s",
1238                          machine_class->valid_cpu_types[0]);
1239             for (i = 1; machine_class->valid_cpu_types[i]; i++) {
1240                 error_printf(", %s", machine_class->valid_cpu_types[i]);
1241             }
1242             error_printf("\n");
1243 
1244             exit(1);
1245         }
1246     }
1247 
1248     /* Check if CPU type is deprecated and warn if so */
1249     cc = CPU_CLASS(oc);
1250     if (cc && cc->deprecation_note) {
1251         warn_report("CPU model %s is deprecated -- %s", machine->cpu_type,
1252                     cc->deprecation_note);
1253     }
1254 
1255     if (machine->cgs) {
1256         /*
1257          * With confidential guests, the host can't see the real
1258          * contents of RAM, so there's no point in it trying to merge
1259          * areas.
1260          */
1261         machine_set_mem_merge(OBJECT(machine), false, &error_abort);
1262 
1263         /*
1264          * Virtio devices can't count on directly accessing guest
1265          * memory, so they need iommu_platform=on to use normal DMA
1266          * mechanisms.  That requires also disabling legacy virtio
1267          * support for those virtio pci devices which allow it.
1268          */
1269         object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy",
1270                                    "on", true);
1271         object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform",
1272                                    "on", false);
1273     }
1274 
1275     accel_init_interfaces(ACCEL_GET_CLASS(machine->accelerator));
1276     machine_class->init(machine);
1277     phase_advance(PHASE_MACHINE_INITIALIZED);
1278 }
1279 
1280 static NotifierList machine_init_done_notifiers =
1281     NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers);
1282 
1283 void qemu_add_machine_init_done_notifier(Notifier *notify)
1284 {
1285     notifier_list_add(&machine_init_done_notifiers, notify);
1286     if (phase_check(PHASE_MACHINE_READY)) {
1287         notify->notify(notify, NULL);
1288     }
1289 }
1290 
1291 void qemu_remove_machine_init_done_notifier(Notifier *notify)
1292 {
1293     notifier_remove(notify);
1294 }
1295 
1296 void qdev_machine_creation_done(void)
1297 {
1298     cpu_synchronize_all_post_init();
1299 
1300     if (current_machine->boot_once) {
1301         qemu_boot_set(current_machine->boot_once, &error_fatal);
1302         qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_order));
1303     }
1304 
1305     /*
1306      * ok, initial machine setup is done, starting from now we can
1307      * only create hotpluggable devices
1308      */
1309     phase_advance(PHASE_MACHINE_READY);
1310     qdev_assert_realized_properly();
1311 
1312     /* TODO: once all bus devices are qdevified, this should be done
1313      * when bus is created by qdev.c */
1314     /*
1315      * TODO: If we had a main 'reset container' that the whole system
1316      * lived in, we could reset that using the multi-phase reset
1317      * APIs. For the moment, we just reset the sysbus, which will cause
1318      * all devices hanging off it (and all their child buses, recursively)
1319      * to be reset. Note that this will *not* reset any Device objects
1320      * which are not attached to some part of the qbus tree!
1321      */
1322     qemu_register_reset(resettable_cold_reset_fn, sysbus_get_default());
1323 
1324     notifier_list_notify(&machine_init_done_notifiers, NULL);
1325 
1326     if (rom_check_and_register_reset() != 0) {
1327         exit(1);
1328     }
1329 
1330     replay_start();
1331 
1332     /* This checkpoint is required by replay to separate prior clock
1333        reading from the other reads, because timer polling functions query
1334        clock values from the log. */
1335     replay_checkpoint(CHECKPOINT_RESET);
1336     qemu_system_reset(SHUTDOWN_CAUSE_NONE);
1337     register_global_state();
1338 }
1339 
1340 static const TypeInfo machine_info = {
1341     .name = TYPE_MACHINE,
1342     .parent = TYPE_OBJECT,
1343     .abstract = true,
1344     .class_size = sizeof(MachineClass),
1345     .class_init    = machine_class_init,
1346     .class_base_init = machine_class_base_init,
1347     .instance_size = sizeof(MachineState),
1348     .instance_init = machine_initfn,
1349     .instance_finalize = machine_finalize,
1350 };
1351 
1352 static void machine_register_types(void)
1353 {
1354     type_register_static(&machine_info);
1355 }
1356 
1357 type_init(machine_register_types)
1358