1 /* 2 * QEMU Machine 3 * 4 * Copyright (C) 2014 Red Hat Inc 5 * 6 * Authors: 7 * Marcel Apfelbaum <marcel.a@redhat.com> 8 * 9 * This work is licensed under the terms of the GNU GPL, version 2 or later. 10 * See the COPYING file in the top-level directory. 11 */ 12 13 #include "qemu/osdep.h" 14 #include "qemu/accel.h" 15 #include "sysemu/replay.h" 16 #include "hw/boards.h" 17 #include "hw/loader.h" 18 #include "qapi/error.h" 19 #include "qapi/qapi-visit-machine.h" 20 #include "qemu/madvise.h" 21 #include "qom/object_interfaces.h" 22 #include "sysemu/cpus.h" 23 #include "sysemu/sysemu.h" 24 #include "sysemu/reset.h" 25 #include "sysemu/runstate.h" 26 #include "sysemu/xen.h" 27 #include "sysemu/qtest.h" 28 #include "hw/pci/pci_bridge.h" 29 #include "hw/mem/nvdimm.h" 30 #include "migration/global_state.h" 31 #include "exec/confidential-guest-support.h" 32 #include "hw/virtio/virtio-pci.h" 33 #include "hw/virtio/virtio-net.h" 34 #include "hw/virtio/virtio-iommu.h" 35 #include "audio/audio.h" 36 37 GlobalProperty hw_compat_9_1[] = { 38 { TYPE_PCI_DEVICE, "x-pcie-ext-tag", "false" }, 39 }; 40 const size_t hw_compat_9_1_len = G_N_ELEMENTS(hw_compat_9_1); 41 42 GlobalProperty hw_compat_9_0[] = { 43 {"arm-cpu", "backcompat-cntfrq", "true" }, 44 { "scsi-hd", "migrate-emulated-scsi-request", "false" }, 45 { "scsi-cd", "migrate-emulated-scsi-request", "false" }, 46 {"vfio-pci", "skip-vsc-check", "false" }, 47 { "virtio-pci", "x-pcie-pm-no-soft-reset", "off" }, 48 {"sd-card", "spec_version", "2" }, 49 }; 50 const size_t hw_compat_9_0_len = G_N_ELEMENTS(hw_compat_9_0); 51 52 GlobalProperty hw_compat_8_2[] = { 53 { "migration", "zero-page-detection", "legacy"}, 54 { TYPE_VIRTIO_IOMMU_PCI, "granule", "4k" }, 55 { TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "64" }, 56 { "virtio-gpu-device", "x-scanout-vmstate-version", "1" }, 57 }; 58 const size_t hw_compat_8_2_len = G_N_ELEMENTS(hw_compat_8_2); 59 60 GlobalProperty hw_compat_8_1[] = { 61 { TYPE_PCI_BRIDGE, "x-pci-express-writeable-slt-bug", "true" }, 62 { "ramfb", "x-migrate", "off" }, 63 { "vfio-pci-nohotplug", "x-ramfb-migrate", "off" }, 64 { "igb", "x-pcie-flr-init", "off" }, 65 { TYPE_VIRTIO_NET, "host_uso", "off"}, 66 { TYPE_VIRTIO_NET, "guest_uso4", "off"}, 67 { TYPE_VIRTIO_NET, "guest_uso6", "off"}, 68 }; 69 const size_t hw_compat_8_1_len = G_N_ELEMENTS(hw_compat_8_1); 70 71 GlobalProperty hw_compat_8_0[] = { 72 { "migration", "multifd-flush-after-each-section", "on"}, 73 { TYPE_PCI_DEVICE, "x-pcie-ari-nextfn-1", "on" }, 74 }; 75 const size_t hw_compat_8_0_len = G_N_ELEMENTS(hw_compat_8_0); 76 77 GlobalProperty hw_compat_7_2[] = { 78 { "e1000e", "migrate-timadj", "off" }, 79 { "virtio-mem", "x-early-migration", "false" }, 80 { "migration", "x-preempt-pre-7-2", "true" }, 81 { TYPE_PCI_DEVICE, "x-pcie-err-unc-mask", "off" }, 82 }; 83 const size_t hw_compat_7_2_len = G_N_ELEMENTS(hw_compat_7_2); 84 85 GlobalProperty hw_compat_7_1[] = { 86 { "virtio-device", "queue_reset", "false" }, 87 { "virtio-rng-pci", "vectors", "0" }, 88 { "virtio-rng-pci-transitional", "vectors", "0" }, 89 { "virtio-rng-pci-non-transitional", "vectors", "0" }, 90 }; 91 const size_t hw_compat_7_1_len = G_N_ELEMENTS(hw_compat_7_1); 92 93 GlobalProperty hw_compat_7_0[] = { 94 { "arm-gicv3-common", "force-8-bit-prio", "on" }, 95 { "nvme-ns", "eui64-default", "on"}, 96 }; 97 const size_t hw_compat_7_0_len = G_N_ELEMENTS(hw_compat_7_0); 98 99 GlobalProperty hw_compat_6_2[] = { 100 { "PIIX4_PM", "x-not-migrate-acpi-index", "on"}, 101 }; 102 const size_t hw_compat_6_2_len = G_N_ELEMENTS(hw_compat_6_2); 103 104 GlobalProperty hw_compat_6_1[] = { 105 { "vhost-user-vsock-device", "seqpacket", "off" }, 106 { "nvme-ns", "shared", "off" }, 107 }; 108 const size_t hw_compat_6_1_len = G_N_ELEMENTS(hw_compat_6_1); 109 110 GlobalProperty hw_compat_6_0[] = { 111 { "gpex-pcihost", "allow-unmapped-accesses", "false" }, 112 { "i8042", "extended-state", "false"}, 113 { "nvme-ns", "eui64-default", "off"}, 114 { "e1000", "init-vet", "off" }, 115 { "e1000e", "init-vet", "off" }, 116 { "vhost-vsock-device", "seqpacket", "off" }, 117 }; 118 const size_t hw_compat_6_0_len = G_N_ELEMENTS(hw_compat_6_0); 119 120 GlobalProperty hw_compat_5_2[] = { 121 { "ICH9-LPC", "smm-compat", "on"}, 122 { "PIIX4_PM", "smm-compat", "on"}, 123 { "virtio-blk-device", "report-discard-granularity", "off" }, 124 { "virtio-net-pci-base", "vectors", "3"}, 125 { "nvme", "msix-exclusive-bar", "on"}, 126 }; 127 const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2); 128 129 GlobalProperty hw_compat_5_1[] = { 130 { "vhost-scsi", "num_queues", "1"}, 131 { "vhost-user-blk", "num-queues", "1"}, 132 { "vhost-user-scsi", "num_queues", "1"}, 133 { "virtio-blk-device", "num-queues", "1"}, 134 { "virtio-scsi-device", "num_queues", "1"}, 135 { "nvme", "use-intel-id", "on"}, 136 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */ 137 { "pl011", "migrate-clk", "off" }, 138 { "virtio-pci", "x-ats-page-aligned", "off"}, 139 }; 140 const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1); 141 142 GlobalProperty hw_compat_5_0[] = { 143 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" }, 144 { "virtio-balloon-device", "page-poison", "false" }, 145 { "vmport", "x-read-set-eax", "off" }, 146 { "vmport", "x-signal-unsupported-cmd", "off" }, 147 { "vmport", "x-report-vmx-type", "off" }, 148 { "vmport", "x-cmds-v2", "off" }, 149 { "virtio-device", "x-disable-legacy-check", "true" }, 150 }; 151 const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0); 152 153 GlobalProperty hw_compat_4_2[] = { 154 { "virtio-blk-device", "queue-size", "128"}, 155 { "virtio-scsi-device", "virtqueue_size", "128"}, 156 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" }, 157 { "virtio-blk-device", "seg-max-adjust", "off"}, 158 { "virtio-scsi-device", "seg_max_adjust", "off"}, 159 { "vhost-blk-device", "seg_max_adjust", "off"}, 160 { "usb-host", "suppress-remote-wake", "off" }, 161 { "usb-redir", "suppress-remote-wake", "off" }, 162 { "qxl", "revision", "4" }, 163 { "qxl-vga", "revision", "4" }, 164 { "fw_cfg", "acpi-mr-restore", "false" }, 165 { "virtio-device", "use-disabled-flag", "false" }, 166 }; 167 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2); 168 169 GlobalProperty hw_compat_4_1[] = { 170 { "virtio-pci", "x-pcie-flr-init", "off" }, 171 }; 172 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1); 173 174 GlobalProperty hw_compat_4_0[] = { 175 { "VGA", "edid", "false" }, 176 { "secondary-vga", "edid", "false" }, 177 { "bochs-display", "edid", "false" }, 178 { "virtio-vga", "edid", "false" }, 179 { "virtio-gpu-device", "edid", "false" }, 180 { "virtio-device", "use-started", "false" }, 181 { "virtio-balloon-device", "qemu-4-0-config-size", "true" }, 182 { "pl031", "migrate-tick-offset", "false" }, 183 }; 184 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0); 185 186 GlobalProperty hw_compat_3_1[] = { 187 { "pcie-root-port", "x-speed", "2_5" }, 188 { "pcie-root-port", "x-width", "1" }, 189 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, 190 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, 191 { "tpm-crb", "ppi", "false" }, 192 { "tpm-tis", "ppi", "false" }, 193 { "usb-kbd", "serial", "42" }, 194 { "usb-mouse", "serial", "42" }, 195 { "usb-tablet", "serial", "42" }, 196 { "virtio-blk-device", "discard", "false" }, 197 { "virtio-blk-device", "write-zeroes", "false" }, 198 { "virtio-balloon-device", "qemu-4-0-config-size", "false" }, 199 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */ 200 }; 201 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); 202 203 GlobalProperty hw_compat_3_0[] = {}; 204 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0); 205 206 GlobalProperty hw_compat_2_12[] = { 207 { "hda-audio", "use-timer", "false" }, 208 { "cirrus-vga", "global-vmstate", "true" }, 209 { "VGA", "global-vmstate", "true" }, 210 { "vmware-svga", "global-vmstate", "true" }, 211 { "qxl-vga", "global-vmstate", "true" }, 212 }; 213 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12); 214 215 GlobalProperty hw_compat_2_11[] = { 216 { "hpet", "hpet-offset-saved", "false" }, 217 { "virtio-blk-pci", "vectors", "2" }, 218 { "vhost-user-blk-pci", "vectors", "2" }, 219 { "e1000", "migrate_tso_props", "off" }, 220 }; 221 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11); 222 223 GlobalProperty hw_compat_2_10[] = { 224 { "virtio-mouse-device", "wheel-axis", "false" }, 225 { "virtio-tablet-device", "wheel-axis", "false" }, 226 }; 227 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10); 228 229 GlobalProperty hw_compat_2_9[] = { 230 { "pci-bridge", "shpc", "off" }, 231 { "intel-iommu", "pt", "off" }, 232 { "virtio-net-device", "x-mtu-bypass-backend", "off" }, 233 { "pcie-root-port", "x-migrate-msix", "false" }, 234 }; 235 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9); 236 237 GlobalProperty hw_compat_2_8[] = { 238 { "fw_cfg_mem", "x-file-slots", "0x10" }, 239 { "fw_cfg_io", "x-file-slots", "0x10" }, 240 { "pflash_cfi01", "old-multiple-chip-handling", "on" }, 241 { "pci-bridge", "shpc", "on" }, 242 { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" }, 243 { "virtio-pci", "x-pcie-deverr-init", "off" }, 244 { "virtio-pci", "x-pcie-lnkctl-init", "off" }, 245 { "virtio-pci", "x-pcie-pm-init", "off" }, 246 { "cirrus-vga", "vgamem_mb", "8" }, 247 { "isa-cirrus-vga", "vgamem_mb", "8" }, 248 }; 249 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8); 250 251 GlobalProperty hw_compat_2_7[] = { 252 { "virtio-pci", "page-per-vq", "on" }, 253 { "virtio-serial-device", "emergency-write", "off" }, 254 { "ioapic", "version", "0x11" }, 255 { "intel-iommu", "x-buggy-eim", "true" }, 256 { "virtio-pci", "x-ignore-backend-features", "on" }, 257 }; 258 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7); 259 260 GlobalProperty hw_compat_2_6[] = { 261 { "virtio-mmio", "format_transport_address", "off" }, 262 /* Optional because not all virtio-pci devices support legacy mode */ 263 { "virtio-pci", "disable-modern", "on", .optional = true }, 264 { "virtio-pci", "disable-legacy", "off", .optional = true }, 265 }; 266 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6); 267 268 GlobalProperty hw_compat_2_5[] = { 269 { "isa-fdc", "fallback", "144" }, 270 { "pvscsi", "x-old-pci-configuration", "on" }, 271 { "pvscsi", "x-disable-pcie", "on" }, 272 { "vmxnet3", "x-old-msi-offsets", "on" }, 273 { "vmxnet3", "x-disable-pcie", "on" }, 274 }; 275 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5); 276 277 GlobalProperty hw_compat_2_4[] = { 278 { "e1000", "extra_mac_registers", "off" }, 279 { "virtio-pci", "x-disable-pcie", "on" }, 280 { "virtio-pci", "migrate-extra", "off" }, 281 { "fw_cfg_mem", "dma_enabled", "off" }, 282 { "fw_cfg_io", "dma_enabled", "off" } 283 }; 284 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4); 285 286 GlobalProperty hw_compat_2_3[] = { 287 { "virtio-blk-pci", "any_layout", "off" }, 288 { "virtio-balloon-pci", "any_layout", "off" }, 289 { "virtio-serial-pci", "any_layout", "off" }, 290 { "virtio-9p-pci", "any_layout", "off" }, 291 { "virtio-rng-pci", "any_layout", "off" }, 292 { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" }, 293 { "migration", "send-configuration", "off" }, 294 { "migration", "send-section-footer", "off" }, 295 { "migration", "store-global-state", "off" }, 296 }; 297 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3); 298 299 GlobalProperty hw_compat_2_2[] = {}; 300 const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2); 301 302 GlobalProperty hw_compat_2_1[] = { 303 { "intel-hda", "old_msi_addr", "on" }, 304 { "VGA", "qemu-extended-regs", "off" }, 305 { "secondary-vga", "qemu-extended-regs", "off" }, 306 { "virtio-scsi-pci", "any_layout", "off" }, 307 { "usb-mouse", "usb_version", "1" }, 308 { "usb-kbd", "usb_version", "1" }, 309 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" }, 310 }; 311 const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1); 312 313 MachineState *current_machine; 314 315 static char *machine_get_kernel(Object *obj, Error **errp) 316 { 317 MachineState *ms = MACHINE(obj); 318 319 return g_strdup(ms->kernel_filename); 320 } 321 322 static void machine_set_kernel(Object *obj, const char *value, Error **errp) 323 { 324 MachineState *ms = MACHINE(obj); 325 326 g_free(ms->kernel_filename); 327 ms->kernel_filename = g_strdup(value); 328 } 329 330 static char *machine_get_initrd(Object *obj, Error **errp) 331 { 332 MachineState *ms = MACHINE(obj); 333 334 return g_strdup(ms->initrd_filename); 335 } 336 337 static void machine_set_initrd(Object *obj, const char *value, Error **errp) 338 { 339 MachineState *ms = MACHINE(obj); 340 341 g_free(ms->initrd_filename); 342 ms->initrd_filename = g_strdup(value); 343 } 344 345 static char *machine_get_append(Object *obj, Error **errp) 346 { 347 MachineState *ms = MACHINE(obj); 348 349 return g_strdup(ms->kernel_cmdline); 350 } 351 352 static void machine_set_append(Object *obj, const char *value, Error **errp) 353 { 354 MachineState *ms = MACHINE(obj); 355 356 g_free(ms->kernel_cmdline); 357 ms->kernel_cmdline = g_strdup(value); 358 } 359 360 static char *machine_get_dtb(Object *obj, Error **errp) 361 { 362 MachineState *ms = MACHINE(obj); 363 364 return g_strdup(ms->dtb); 365 } 366 367 static void machine_set_dtb(Object *obj, const char *value, Error **errp) 368 { 369 MachineState *ms = MACHINE(obj); 370 371 g_free(ms->dtb); 372 ms->dtb = g_strdup(value); 373 } 374 375 static char *machine_get_dumpdtb(Object *obj, Error **errp) 376 { 377 MachineState *ms = MACHINE(obj); 378 379 return g_strdup(ms->dumpdtb); 380 } 381 382 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) 383 { 384 MachineState *ms = MACHINE(obj); 385 386 g_free(ms->dumpdtb); 387 ms->dumpdtb = g_strdup(value); 388 } 389 390 static void machine_get_phandle_start(Object *obj, Visitor *v, 391 const char *name, void *opaque, 392 Error **errp) 393 { 394 MachineState *ms = MACHINE(obj); 395 int64_t value = ms->phandle_start; 396 397 visit_type_int(v, name, &value, errp); 398 } 399 400 static void machine_set_phandle_start(Object *obj, Visitor *v, 401 const char *name, void *opaque, 402 Error **errp) 403 { 404 MachineState *ms = MACHINE(obj); 405 int64_t value; 406 407 if (!visit_type_int(v, name, &value, errp)) { 408 return; 409 } 410 411 ms->phandle_start = value; 412 } 413 414 static char *machine_get_dt_compatible(Object *obj, Error **errp) 415 { 416 MachineState *ms = MACHINE(obj); 417 418 return g_strdup(ms->dt_compatible); 419 } 420 421 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) 422 { 423 MachineState *ms = MACHINE(obj); 424 425 g_free(ms->dt_compatible); 426 ms->dt_compatible = g_strdup(value); 427 } 428 429 static bool machine_get_dump_guest_core(Object *obj, Error **errp) 430 { 431 MachineState *ms = MACHINE(obj); 432 433 return ms->dump_guest_core; 434 } 435 436 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) 437 { 438 MachineState *ms = MACHINE(obj); 439 440 if (!value && QEMU_MADV_DONTDUMP == QEMU_MADV_INVALID) { 441 error_setg(errp, "Dumping guest memory cannot be disabled on this host"); 442 return; 443 } 444 ms->dump_guest_core = value; 445 } 446 447 static bool machine_get_mem_merge(Object *obj, Error **errp) 448 { 449 MachineState *ms = MACHINE(obj); 450 451 return ms->mem_merge; 452 } 453 454 static void machine_set_mem_merge(Object *obj, bool value, Error **errp) 455 { 456 MachineState *ms = MACHINE(obj); 457 458 if (value && QEMU_MADV_MERGEABLE == QEMU_MADV_INVALID) { 459 error_setg(errp, "Memory merging is not supported on this host"); 460 return; 461 } 462 ms->mem_merge = value; 463 } 464 465 static bool machine_get_usb(Object *obj, Error **errp) 466 { 467 MachineState *ms = MACHINE(obj); 468 469 return ms->usb; 470 } 471 472 static void machine_set_usb(Object *obj, bool value, Error **errp) 473 { 474 MachineState *ms = MACHINE(obj); 475 476 ms->usb = value; 477 ms->usb_disabled = !value; 478 } 479 480 static bool machine_get_graphics(Object *obj, Error **errp) 481 { 482 MachineState *ms = MACHINE(obj); 483 484 return ms->enable_graphics; 485 } 486 487 static void machine_set_graphics(Object *obj, bool value, Error **errp) 488 { 489 MachineState *ms = MACHINE(obj); 490 491 ms->enable_graphics = value; 492 } 493 494 static char *machine_get_firmware(Object *obj, Error **errp) 495 { 496 MachineState *ms = MACHINE(obj); 497 498 return g_strdup(ms->firmware); 499 } 500 501 static void machine_set_firmware(Object *obj, const char *value, Error **errp) 502 { 503 MachineState *ms = MACHINE(obj); 504 505 g_free(ms->firmware); 506 ms->firmware = g_strdup(value); 507 } 508 509 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) 510 { 511 MachineState *ms = MACHINE(obj); 512 513 ms->suppress_vmdesc = value; 514 } 515 516 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) 517 { 518 MachineState *ms = MACHINE(obj); 519 520 return ms->suppress_vmdesc; 521 } 522 523 static char *machine_get_memory_encryption(Object *obj, Error **errp) 524 { 525 MachineState *ms = MACHINE(obj); 526 527 if (ms->cgs) { 528 return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs))); 529 } 530 531 return NULL; 532 } 533 534 static void machine_set_memory_encryption(Object *obj, const char *value, 535 Error **errp) 536 { 537 Object *cgs = 538 object_resolve_path_component(object_get_objects_root(), value); 539 540 if (!cgs) { 541 error_setg(errp, "No such memory encryption object '%s'", value); 542 return; 543 } 544 545 object_property_set_link(obj, "confidential-guest-support", cgs, errp); 546 } 547 548 static void machine_check_confidential_guest_support(const Object *obj, 549 const char *name, 550 Object *new_target, 551 Error **errp) 552 { 553 /* 554 * So far the only constraint is that the target has the 555 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked 556 * by the QOM core 557 */ 558 } 559 560 static bool machine_get_nvdimm(Object *obj, Error **errp) 561 { 562 MachineState *ms = MACHINE(obj); 563 564 return ms->nvdimms_state->is_enabled; 565 } 566 567 static void machine_set_nvdimm(Object *obj, bool value, Error **errp) 568 { 569 MachineState *ms = MACHINE(obj); 570 571 ms->nvdimms_state->is_enabled = value; 572 } 573 574 static bool machine_get_hmat(Object *obj, Error **errp) 575 { 576 MachineState *ms = MACHINE(obj); 577 578 return ms->numa_state->hmat_enabled; 579 } 580 581 static void machine_set_hmat(Object *obj, bool value, Error **errp) 582 { 583 MachineState *ms = MACHINE(obj); 584 585 ms->numa_state->hmat_enabled = value; 586 } 587 588 static void machine_get_mem(Object *obj, Visitor *v, const char *name, 589 void *opaque, Error **errp) 590 { 591 MachineState *ms = MACHINE(obj); 592 MemorySizeConfiguration mem = { 593 .has_size = true, 594 .size = ms->ram_size, 595 .has_max_size = !!ms->ram_slots, 596 .max_size = ms->maxram_size, 597 .has_slots = !!ms->ram_slots, 598 .slots = ms->ram_slots, 599 }; 600 MemorySizeConfiguration *p_mem = &mem; 601 602 visit_type_MemorySizeConfiguration(v, name, &p_mem, &error_abort); 603 } 604 605 static void machine_set_mem(Object *obj, Visitor *v, const char *name, 606 void *opaque, Error **errp) 607 { 608 ERRP_GUARD(); 609 MachineState *ms = MACHINE(obj); 610 MachineClass *mc = MACHINE_GET_CLASS(obj); 611 MemorySizeConfiguration *mem; 612 613 if (!visit_type_MemorySizeConfiguration(v, name, &mem, errp)) { 614 return; 615 } 616 617 if (!mem->has_size) { 618 mem->has_size = true; 619 mem->size = mc->default_ram_size; 620 } 621 mem->size = QEMU_ALIGN_UP(mem->size, 8192); 622 if (mc->fixup_ram_size) { 623 mem->size = mc->fixup_ram_size(mem->size); 624 } 625 if ((ram_addr_t)mem->size != mem->size) { 626 error_setg(errp, "ram size too large"); 627 goto out_free; 628 } 629 630 if (mem->has_max_size) { 631 if (mem->max_size < mem->size) { 632 error_setg(errp, "invalid value of maxmem: " 633 "maximum memory size (0x%" PRIx64 ") must be at least " 634 "the initial memory size (0x%" PRIx64 ")", 635 mem->max_size, mem->size); 636 goto out_free; 637 } 638 if (mem->has_slots && mem->slots && mem->max_size == mem->size) { 639 error_setg(errp, "invalid value of maxmem: " 640 "memory slots were specified but maximum memory size " 641 "(0x%" PRIx64 ") is equal to the initial memory size " 642 "(0x%" PRIx64 ")", mem->max_size, mem->size); 643 goto out_free; 644 } 645 ms->maxram_size = mem->max_size; 646 } else { 647 if (mem->has_slots) { 648 error_setg(errp, "slots specified but no max-size"); 649 goto out_free; 650 } 651 ms->maxram_size = mem->size; 652 } 653 ms->ram_size = mem->size; 654 ms->ram_slots = mem->has_slots ? mem->slots : 0; 655 out_free: 656 qapi_free_MemorySizeConfiguration(mem); 657 } 658 659 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) 660 { 661 MachineState *ms = MACHINE(obj); 662 663 return g_strdup(ms->nvdimms_state->persistence_string); 664 } 665 666 static void machine_set_nvdimm_persistence(Object *obj, const char *value, 667 Error **errp) 668 { 669 MachineState *ms = MACHINE(obj); 670 NVDIMMState *nvdimms_state = ms->nvdimms_state; 671 672 if (strcmp(value, "cpu") == 0) { 673 nvdimms_state->persistence = 3; 674 } else if (strcmp(value, "mem-ctrl") == 0) { 675 nvdimms_state->persistence = 2; 676 } else { 677 error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", 678 value); 679 return; 680 } 681 682 g_free(nvdimms_state->persistence_string); 683 nvdimms_state->persistence_string = g_strdup(value); 684 } 685 686 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) 687 { 688 QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type)); 689 } 690 691 bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev) 692 { 693 Object *obj = OBJECT(dev); 694 695 if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) { 696 return false; 697 } 698 699 return device_type_is_dynamic_sysbus(mc, object_get_typename(obj)); 700 } 701 702 bool device_type_is_dynamic_sysbus(MachineClass *mc, const char *type) 703 { 704 bool allowed = false; 705 strList *wl; 706 ObjectClass *klass = object_class_by_name(type); 707 708 for (wl = mc->allowed_dynamic_sysbus_devices; 709 !allowed && wl; 710 wl = wl->next) { 711 allowed |= !!object_class_dynamic_cast(klass, wl->value); 712 } 713 714 return allowed; 715 } 716 717 static char *machine_get_audiodev(Object *obj, Error **errp) 718 { 719 MachineState *ms = MACHINE(obj); 720 721 return g_strdup(ms->audiodev); 722 } 723 724 static void machine_set_audiodev(Object *obj, const char *value, 725 Error **errp) 726 { 727 MachineState *ms = MACHINE(obj); 728 729 if (!audio_state_by_name(value, errp)) { 730 return; 731 } 732 733 g_free(ms->audiodev); 734 ms->audiodev = g_strdup(value); 735 } 736 737 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) 738 { 739 int i; 740 HotpluggableCPUList *head = NULL; 741 MachineClass *mc = MACHINE_GET_CLASS(machine); 742 743 /* force board to initialize possible_cpus if it hasn't been done yet */ 744 mc->possible_cpu_arch_ids(machine); 745 746 for (i = 0; i < machine->possible_cpus->len; i++) { 747 CPUState *cpu; 748 HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); 749 750 cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); 751 cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; 752 cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, 753 sizeof(*cpu_item->props)); 754 755 cpu = machine->possible_cpus->cpus[i].cpu; 756 if (cpu) { 757 cpu_item->qom_path = object_get_canonical_path(OBJECT(cpu)); 758 } 759 QAPI_LIST_PREPEND(head, cpu_item); 760 } 761 return head; 762 } 763 764 /** 765 * machine_set_cpu_numa_node: 766 * @machine: machine object to modify 767 * @props: specifies which cpu objects to assign to 768 * numa node specified by @props.node_id 769 * @errp: if an error occurs, a pointer to an area to store the error 770 * 771 * Associate NUMA node specified by @props.node_id with cpu slots that 772 * match socket/core/thread-ids specified by @props. It's recommended to use 773 * query-hotpluggable-cpus.props values to specify affected cpu slots, 774 * which would lead to exact 1:1 mapping of cpu slots to NUMA node. 775 * 776 * However for CLI convenience it's possible to pass in subset of properties, 777 * which would affect all cpu slots that match it. 778 * Ex for pc machine: 779 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ 780 * -numa cpu,node-id=0,socket_id=0 \ 781 * -numa cpu,node-id=1,socket_id=1 782 * will assign all child cores of socket 0 to node 0 and 783 * of socket 1 to node 1. 784 * 785 * On attempt of reassigning (already assigned) cpu slot to another NUMA node, 786 * return error. 787 * Empty subset is disallowed and function will return with error in this case. 788 */ 789 void machine_set_cpu_numa_node(MachineState *machine, 790 const CpuInstanceProperties *props, Error **errp) 791 { 792 MachineClass *mc = MACHINE_GET_CLASS(machine); 793 NodeInfo *numa_info = machine->numa_state->nodes; 794 bool match = false; 795 int i; 796 797 if (!mc->possible_cpu_arch_ids) { 798 error_setg(errp, "mapping of CPUs to NUMA node is not supported"); 799 return; 800 } 801 802 /* disabling node mapping is not supported, forbid it */ 803 assert(props->has_node_id); 804 805 /* force board to initialize possible_cpus if it hasn't been done yet */ 806 mc->possible_cpu_arch_ids(machine); 807 808 for (i = 0; i < machine->possible_cpus->len; i++) { 809 CPUArchId *slot = &machine->possible_cpus->cpus[i]; 810 811 /* reject unsupported by board properties */ 812 if (props->has_thread_id && !slot->props.has_thread_id) { 813 error_setg(errp, "thread-id is not supported"); 814 return; 815 } 816 817 if (props->has_core_id && !slot->props.has_core_id) { 818 error_setg(errp, "core-id is not supported"); 819 return; 820 } 821 822 if (props->has_module_id && !slot->props.has_module_id) { 823 error_setg(errp, "module-id is not supported"); 824 return; 825 } 826 827 if (props->has_cluster_id && !slot->props.has_cluster_id) { 828 error_setg(errp, "cluster-id is not supported"); 829 return; 830 } 831 832 if (props->has_socket_id && !slot->props.has_socket_id) { 833 error_setg(errp, "socket-id is not supported"); 834 return; 835 } 836 837 if (props->has_die_id && !slot->props.has_die_id) { 838 error_setg(errp, "die-id is not supported"); 839 return; 840 } 841 842 /* skip slots with explicit mismatch */ 843 if (props->has_thread_id && props->thread_id != slot->props.thread_id) { 844 continue; 845 } 846 847 if (props->has_core_id && props->core_id != slot->props.core_id) { 848 continue; 849 } 850 851 if (props->has_module_id && 852 props->module_id != slot->props.module_id) { 853 continue; 854 } 855 856 if (props->has_cluster_id && 857 props->cluster_id != slot->props.cluster_id) { 858 continue; 859 } 860 861 if (props->has_die_id && props->die_id != slot->props.die_id) { 862 continue; 863 } 864 865 if (props->has_socket_id && props->socket_id != slot->props.socket_id) { 866 continue; 867 } 868 869 /* reject assignment if slot is already assigned, for compatibility 870 * of legacy cpu_index mapping with SPAPR core based mapping do not 871 * error out if cpu thread and matched core have the same node-id */ 872 if (slot->props.has_node_id && 873 slot->props.node_id != props->node_id) { 874 error_setg(errp, "CPU is already assigned to node-id: %" PRId64, 875 slot->props.node_id); 876 return; 877 } 878 879 /* assign slot to node as it's matched '-numa cpu' key */ 880 match = true; 881 slot->props.node_id = props->node_id; 882 slot->props.has_node_id = props->has_node_id; 883 884 if (machine->numa_state->hmat_enabled) { 885 if ((numa_info[props->node_id].initiator < MAX_NODES) && 886 (props->node_id != numa_info[props->node_id].initiator)) { 887 error_setg(errp, "The initiator of CPU NUMA node %" PRId64 888 " should be itself (got %" PRIu16 ")", 889 props->node_id, numa_info[props->node_id].initiator); 890 return; 891 } 892 numa_info[props->node_id].has_cpu = true; 893 numa_info[props->node_id].initiator = props->node_id; 894 } 895 } 896 897 if (!match) { 898 error_setg(errp, "no match found"); 899 } 900 } 901 902 static void machine_get_smp(Object *obj, Visitor *v, const char *name, 903 void *opaque, Error **errp) 904 { 905 MachineState *ms = MACHINE(obj); 906 SMPConfiguration *config = &(SMPConfiguration){ 907 .has_cpus = true, .cpus = ms->smp.cpus, 908 .has_drawers = true, .drawers = ms->smp.drawers, 909 .has_books = true, .books = ms->smp.books, 910 .has_sockets = true, .sockets = ms->smp.sockets, 911 .has_dies = true, .dies = ms->smp.dies, 912 .has_clusters = true, .clusters = ms->smp.clusters, 913 .has_modules = true, .modules = ms->smp.modules, 914 .has_cores = true, .cores = ms->smp.cores, 915 .has_threads = true, .threads = ms->smp.threads, 916 .has_maxcpus = true, .maxcpus = ms->smp.max_cpus, 917 }; 918 919 if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) { 920 return; 921 } 922 } 923 924 static void machine_set_smp(Object *obj, Visitor *v, const char *name, 925 void *opaque, Error **errp) 926 { 927 MachineState *ms = MACHINE(obj); 928 g_autoptr(SMPConfiguration) config = NULL; 929 930 if (!visit_type_SMPConfiguration(v, name, &config, errp)) { 931 return; 932 } 933 934 machine_parse_smp_config(ms, config, errp); 935 } 936 937 static void machine_get_boot(Object *obj, Visitor *v, const char *name, 938 void *opaque, Error **errp) 939 { 940 MachineState *ms = MACHINE(obj); 941 BootConfiguration *config = &ms->boot_config; 942 visit_type_BootConfiguration(v, name, &config, &error_abort); 943 } 944 945 static void machine_free_boot_config(MachineState *ms) 946 { 947 g_free(ms->boot_config.order); 948 g_free(ms->boot_config.once); 949 g_free(ms->boot_config.splash); 950 } 951 952 static void machine_copy_boot_config(MachineState *ms, BootConfiguration *config) 953 { 954 MachineClass *machine_class = MACHINE_GET_CLASS(ms); 955 956 machine_free_boot_config(ms); 957 ms->boot_config = *config; 958 if (!config->order) { 959 ms->boot_config.order = g_strdup(machine_class->default_boot_order); 960 } 961 } 962 963 static void machine_set_boot(Object *obj, Visitor *v, const char *name, 964 void *opaque, Error **errp) 965 { 966 ERRP_GUARD(); 967 MachineState *ms = MACHINE(obj); 968 BootConfiguration *config = NULL; 969 970 if (!visit_type_BootConfiguration(v, name, &config, errp)) { 971 return; 972 } 973 if (config->order) { 974 validate_bootdevices(config->order, errp); 975 if (*errp) { 976 goto out_free; 977 } 978 } 979 if (config->once) { 980 validate_bootdevices(config->once, errp); 981 if (*errp) { 982 goto out_free; 983 } 984 } 985 986 machine_copy_boot_config(ms, config); 987 /* Strings live in ms->boot_config. */ 988 free(config); 989 return; 990 991 out_free: 992 qapi_free_BootConfiguration(config); 993 } 994 995 void machine_add_audiodev_property(MachineClass *mc) 996 { 997 ObjectClass *oc = OBJECT_CLASS(mc); 998 999 object_class_property_add_str(oc, "audiodev", 1000 machine_get_audiodev, 1001 machine_set_audiodev); 1002 object_class_property_set_description(oc, "audiodev", 1003 "Audiodev to use for default machine devices"); 1004 } 1005 1006 static void machine_class_init(ObjectClass *oc, void *data) 1007 { 1008 MachineClass *mc = MACHINE_CLASS(oc); 1009 1010 /* Default 128 MB as guest ram size */ 1011 mc->default_ram_size = 128 * MiB; 1012 mc->rom_file_has_mr = true; 1013 /* 1014 * SMBIOS 3.1.0 7.18.5 Memory Device — Extended Size 1015 * use max possible value that could be encoded into 1016 * 'Extended Size' field (2047Tb). 1017 */ 1018 mc->smbios_memory_device_size = 2047 * TiB; 1019 1020 /* numa node memory size aligned on 8MB by default. 1021 * On Linux, each node's border has to be 8MB aligned 1022 */ 1023 mc->numa_mem_align_shift = 23; 1024 1025 object_class_property_add_str(oc, "kernel", 1026 machine_get_kernel, machine_set_kernel); 1027 object_class_property_set_description(oc, "kernel", 1028 "Linux kernel image file"); 1029 1030 object_class_property_add_str(oc, "initrd", 1031 machine_get_initrd, machine_set_initrd); 1032 object_class_property_set_description(oc, "initrd", 1033 "Linux initial ramdisk file"); 1034 1035 object_class_property_add_str(oc, "append", 1036 machine_get_append, machine_set_append); 1037 object_class_property_set_description(oc, "append", 1038 "Linux kernel command line"); 1039 1040 object_class_property_add_str(oc, "dtb", 1041 machine_get_dtb, machine_set_dtb); 1042 object_class_property_set_description(oc, "dtb", 1043 "Linux kernel device tree file"); 1044 1045 object_class_property_add_str(oc, "dumpdtb", 1046 machine_get_dumpdtb, machine_set_dumpdtb); 1047 object_class_property_set_description(oc, "dumpdtb", 1048 "Dump current dtb to a file and quit"); 1049 1050 object_class_property_add(oc, "boot", "BootConfiguration", 1051 machine_get_boot, machine_set_boot, 1052 NULL, NULL); 1053 object_class_property_set_description(oc, "boot", 1054 "Boot configuration"); 1055 1056 object_class_property_add(oc, "smp", "SMPConfiguration", 1057 machine_get_smp, machine_set_smp, 1058 NULL, NULL); 1059 object_class_property_set_description(oc, "smp", 1060 "CPU topology"); 1061 1062 object_class_property_add(oc, "phandle-start", "int", 1063 machine_get_phandle_start, machine_set_phandle_start, 1064 NULL, NULL); 1065 object_class_property_set_description(oc, "phandle-start", 1066 "The first phandle ID we may generate dynamically"); 1067 1068 object_class_property_add_str(oc, "dt-compatible", 1069 machine_get_dt_compatible, machine_set_dt_compatible); 1070 object_class_property_set_description(oc, "dt-compatible", 1071 "Overrides the \"compatible\" property of the dt root node"); 1072 1073 object_class_property_add_bool(oc, "dump-guest-core", 1074 machine_get_dump_guest_core, machine_set_dump_guest_core); 1075 object_class_property_set_description(oc, "dump-guest-core", 1076 "Include guest memory in a core dump"); 1077 1078 object_class_property_add_bool(oc, "mem-merge", 1079 machine_get_mem_merge, machine_set_mem_merge); 1080 object_class_property_set_description(oc, "mem-merge", 1081 "Enable/disable memory merge support"); 1082 1083 object_class_property_add_bool(oc, "usb", 1084 machine_get_usb, machine_set_usb); 1085 object_class_property_set_description(oc, "usb", 1086 "Set on/off to enable/disable usb"); 1087 1088 object_class_property_add_bool(oc, "graphics", 1089 machine_get_graphics, machine_set_graphics); 1090 object_class_property_set_description(oc, "graphics", 1091 "Set on/off to enable/disable graphics emulation"); 1092 1093 object_class_property_add_str(oc, "firmware", 1094 machine_get_firmware, machine_set_firmware); 1095 object_class_property_set_description(oc, "firmware", 1096 "Firmware image"); 1097 1098 object_class_property_add_bool(oc, "suppress-vmdesc", 1099 machine_get_suppress_vmdesc, machine_set_suppress_vmdesc); 1100 object_class_property_set_description(oc, "suppress-vmdesc", 1101 "Set on to disable self-describing migration"); 1102 1103 object_class_property_add_link(oc, "confidential-guest-support", 1104 TYPE_CONFIDENTIAL_GUEST_SUPPORT, 1105 offsetof(MachineState, cgs), 1106 machine_check_confidential_guest_support, 1107 OBJ_PROP_LINK_STRONG); 1108 object_class_property_set_description(oc, "confidential-guest-support", 1109 "Set confidential guest scheme to support"); 1110 1111 /* For compatibility */ 1112 object_class_property_add_str(oc, "memory-encryption", 1113 machine_get_memory_encryption, machine_set_memory_encryption); 1114 object_class_property_set_description(oc, "memory-encryption", 1115 "Set memory encryption object to use"); 1116 1117 object_class_property_add_link(oc, "memory-backend", TYPE_MEMORY_BACKEND, 1118 offsetof(MachineState, memdev), object_property_allow_set_link, 1119 OBJ_PROP_LINK_STRONG); 1120 object_class_property_set_description(oc, "memory-backend", 1121 "Set RAM backend" 1122 "Valid value is ID of hostmem based backend"); 1123 1124 object_class_property_add(oc, "memory", "MemorySizeConfiguration", 1125 machine_get_mem, machine_set_mem, 1126 NULL, NULL); 1127 object_class_property_set_description(oc, "memory", 1128 "Memory size configuration"); 1129 } 1130 1131 static void machine_class_base_init(ObjectClass *oc, void *data) 1132 { 1133 MachineClass *mc = MACHINE_CLASS(oc); 1134 mc->max_cpus = mc->max_cpus ?: 1; 1135 mc->min_cpus = mc->min_cpus ?: 1; 1136 mc->default_cpus = mc->default_cpus ?: 1; 1137 1138 if (!object_class_is_abstract(oc)) { 1139 const char *cname = object_class_get_name(oc); 1140 assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); 1141 mc->name = g_strndup(cname, 1142 strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); 1143 mc->compat_props = g_ptr_array_new(); 1144 } 1145 } 1146 1147 static void machine_initfn(Object *obj) 1148 { 1149 MachineState *ms = MACHINE(obj); 1150 MachineClass *mc = MACHINE_GET_CLASS(obj); 1151 1152 container_get(obj, "/peripheral"); 1153 container_get(obj, "/peripheral-anon"); 1154 1155 ms->dump_guest_core = true; 1156 ms->mem_merge = (QEMU_MADV_MERGEABLE != QEMU_MADV_INVALID); 1157 ms->enable_graphics = true; 1158 ms->kernel_cmdline = g_strdup(""); 1159 ms->ram_size = mc->default_ram_size; 1160 ms->maxram_size = mc->default_ram_size; 1161 1162 if (mc->nvdimm_supported) { 1163 ms->nvdimms_state = g_new0(NVDIMMState, 1); 1164 object_property_add_bool(obj, "nvdimm", 1165 machine_get_nvdimm, machine_set_nvdimm); 1166 object_property_set_description(obj, "nvdimm", 1167 "Set on/off to enable/disable " 1168 "NVDIMM instantiation"); 1169 1170 object_property_add_str(obj, "nvdimm-persistence", 1171 machine_get_nvdimm_persistence, 1172 machine_set_nvdimm_persistence); 1173 object_property_set_description(obj, "nvdimm-persistence", 1174 "Set NVDIMM persistence" 1175 "Valid values are cpu, mem-ctrl"); 1176 } 1177 1178 if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { 1179 ms->numa_state = g_new0(NumaState, 1); 1180 object_property_add_bool(obj, "hmat", 1181 machine_get_hmat, machine_set_hmat); 1182 object_property_set_description(obj, "hmat", 1183 "Set on/off to enable/disable " 1184 "ACPI Heterogeneous Memory Attribute " 1185 "Table (HMAT)"); 1186 } 1187 1188 /* default to mc->default_cpus */ 1189 ms->smp.cpus = mc->default_cpus; 1190 ms->smp.max_cpus = mc->default_cpus; 1191 ms->smp.drawers = 1; 1192 ms->smp.books = 1; 1193 ms->smp.sockets = 1; 1194 ms->smp.dies = 1; 1195 ms->smp.clusters = 1; 1196 ms->smp.modules = 1; 1197 ms->smp.cores = 1; 1198 ms->smp.threads = 1; 1199 1200 machine_copy_boot_config(ms, &(BootConfiguration){ 0 }); 1201 } 1202 1203 static void machine_finalize(Object *obj) 1204 { 1205 MachineState *ms = MACHINE(obj); 1206 1207 machine_free_boot_config(ms); 1208 g_free(ms->kernel_filename); 1209 g_free(ms->initrd_filename); 1210 g_free(ms->kernel_cmdline); 1211 g_free(ms->dtb); 1212 g_free(ms->dumpdtb); 1213 g_free(ms->dt_compatible); 1214 g_free(ms->firmware); 1215 g_free(ms->device_memory); 1216 g_free(ms->nvdimms_state); 1217 g_free(ms->numa_state); 1218 g_free(ms->audiodev); 1219 } 1220 1221 bool machine_usb(MachineState *machine) 1222 { 1223 return machine->usb; 1224 } 1225 1226 int machine_phandle_start(MachineState *machine) 1227 { 1228 return machine->phandle_start; 1229 } 1230 1231 bool machine_dump_guest_core(MachineState *machine) 1232 { 1233 return machine->dump_guest_core; 1234 } 1235 1236 bool machine_mem_merge(MachineState *machine) 1237 { 1238 return machine->mem_merge; 1239 } 1240 1241 bool machine_require_guest_memfd(MachineState *machine) 1242 { 1243 return machine->cgs && machine->cgs->require_guest_memfd; 1244 } 1245 1246 static char *cpu_slot_to_string(const CPUArchId *cpu) 1247 { 1248 GString *s = g_string_new(NULL); 1249 if (cpu->props.has_socket_id) { 1250 g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); 1251 } 1252 if (cpu->props.has_die_id) { 1253 if (s->len) { 1254 g_string_append_printf(s, ", "); 1255 } 1256 g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id); 1257 } 1258 if (cpu->props.has_cluster_id) { 1259 if (s->len) { 1260 g_string_append_printf(s, ", "); 1261 } 1262 g_string_append_printf(s, "cluster-id: %"PRId64, cpu->props.cluster_id); 1263 } 1264 if (cpu->props.has_module_id) { 1265 if (s->len) { 1266 g_string_append_printf(s, ", "); 1267 } 1268 g_string_append_printf(s, "module-id: %"PRId64, cpu->props.module_id); 1269 } 1270 if (cpu->props.has_core_id) { 1271 if (s->len) { 1272 g_string_append_printf(s, ", "); 1273 } 1274 g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); 1275 } 1276 if (cpu->props.has_thread_id) { 1277 if (s->len) { 1278 g_string_append_printf(s, ", "); 1279 } 1280 g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); 1281 } 1282 return g_string_free(s, false); 1283 } 1284 1285 static void numa_validate_initiator(NumaState *numa_state) 1286 { 1287 int i; 1288 NodeInfo *numa_info = numa_state->nodes; 1289 1290 for (i = 0; i < numa_state->num_nodes; i++) { 1291 if (numa_info[i].initiator == MAX_NODES) { 1292 continue; 1293 } 1294 1295 if (!numa_info[numa_info[i].initiator].present) { 1296 error_report("NUMA node %" PRIu16 " is missing, use " 1297 "'-numa node' option to declare it first", 1298 numa_info[i].initiator); 1299 exit(1); 1300 } 1301 1302 if (!numa_info[numa_info[i].initiator].has_cpu) { 1303 error_report("The initiator of NUMA node %d is invalid", i); 1304 exit(1); 1305 } 1306 } 1307 } 1308 1309 static void machine_numa_finish_cpu_init(MachineState *machine) 1310 { 1311 int i; 1312 bool default_mapping; 1313 GString *s = g_string_new(NULL); 1314 MachineClass *mc = MACHINE_GET_CLASS(machine); 1315 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); 1316 1317 assert(machine->numa_state->num_nodes); 1318 for (i = 0; i < possible_cpus->len; i++) { 1319 if (possible_cpus->cpus[i].props.has_node_id) { 1320 break; 1321 } 1322 } 1323 default_mapping = (i == possible_cpus->len); 1324 1325 for (i = 0; i < possible_cpus->len; i++) { 1326 const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; 1327 1328 if (!cpu_slot->props.has_node_id) { 1329 /* fetch default mapping from board and enable it */ 1330 CpuInstanceProperties props = cpu_slot->props; 1331 1332 props.node_id = mc->get_default_cpu_node_id(machine, i); 1333 if (!default_mapping) { 1334 /* record slots with not set mapping, 1335 * TODO: make it hard error in future */ 1336 char *cpu_str = cpu_slot_to_string(cpu_slot); 1337 g_string_append_printf(s, "%sCPU %d [%s]", 1338 s->len ? ", " : "", i, cpu_str); 1339 g_free(cpu_str); 1340 1341 /* non mapped cpus used to fallback to node 0 */ 1342 props.node_id = 0; 1343 } 1344 1345 props.has_node_id = true; 1346 machine_set_cpu_numa_node(machine, &props, &error_fatal); 1347 } 1348 } 1349 1350 if (machine->numa_state->hmat_enabled) { 1351 numa_validate_initiator(machine->numa_state); 1352 } 1353 1354 if (s->len && !qtest_enabled()) { 1355 warn_report("CPU(s) not present in any NUMA nodes: %s", 1356 s->str); 1357 warn_report("All CPU(s) up to maxcpus should be described " 1358 "in NUMA config, ability to start up with partial NUMA " 1359 "mappings is obsoleted and will be removed in future"); 1360 } 1361 g_string_free(s, true); 1362 } 1363 1364 static void validate_cpu_cluster_to_numa_boundary(MachineState *ms) 1365 { 1366 MachineClass *mc = MACHINE_GET_CLASS(ms); 1367 NumaState *state = ms->numa_state; 1368 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(ms); 1369 const CPUArchId *cpus = possible_cpus->cpus; 1370 int i, j; 1371 1372 if (qtest_enabled() || state->num_nodes <= 1 || possible_cpus->len <= 1) { 1373 return; 1374 } 1375 1376 /* 1377 * The Linux scheduling domain can't be parsed when the multiple CPUs 1378 * in one cluster have been associated with different NUMA nodes. However, 1379 * it's fine to associate one NUMA node with CPUs in different clusters. 1380 */ 1381 for (i = 0; i < possible_cpus->len; i++) { 1382 for (j = i + 1; j < possible_cpus->len; j++) { 1383 if (cpus[i].props.has_socket_id && 1384 cpus[i].props.has_cluster_id && 1385 cpus[i].props.has_node_id && 1386 cpus[j].props.has_socket_id && 1387 cpus[j].props.has_cluster_id && 1388 cpus[j].props.has_node_id && 1389 cpus[i].props.socket_id == cpus[j].props.socket_id && 1390 cpus[i].props.cluster_id == cpus[j].props.cluster_id && 1391 cpus[i].props.node_id != cpus[j].props.node_id) { 1392 warn_report("CPU-%d and CPU-%d in socket-%" PRId64 "-cluster-%" PRId64 1393 " have been associated with node-%" PRId64 " and node-%" PRId64 1394 " respectively. It can cause OSes like Linux to" 1395 " misbehave", i, j, cpus[i].props.socket_id, 1396 cpus[i].props.cluster_id, cpus[i].props.node_id, 1397 cpus[j].props.node_id); 1398 } 1399 } 1400 } 1401 } 1402 1403 MemoryRegion *machine_consume_memdev(MachineState *machine, 1404 HostMemoryBackend *backend) 1405 { 1406 MemoryRegion *ret = host_memory_backend_get_memory(backend); 1407 1408 if (host_memory_backend_is_mapped(backend)) { 1409 error_report("memory backend %s can't be used multiple times.", 1410 object_get_canonical_path_component(OBJECT(backend))); 1411 exit(EXIT_FAILURE); 1412 } 1413 host_memory_backend_set_mapped(backend, true); 1414 vmstate_register_ram_global(ret); 1415 return ret; 1416 } 1417 1418 static bool create_default_memdev(MachineState *ms, const char *path, Error **errp) 1419 { 1420 Object *obj; 1421 MachineClass *mc = MACHINE_GET_CLASS(ms); 1422 bool r = false; 1423 1424 obj = object_new(path ? TYPE_MEMORY_BACKEND_FILE : TYPE_MEMORY_BACKEND_RAM); 1425 if (path) { 1426 if (!object_property_set_str(obj, "mem-path", path, errp)) { 1427 goto out; 1428 } 1429 } 1430 if (!object_property_set_int(obj, "size", ms->ram_size, errp)) { 1431 goto out; 1432 } 1433 object_property_add_child(object_get_objects_root(), mc->default_ram_id, 1434 obj); 1435 /* Ensure backend's memory region name is equal to mc->default_ram_id */ 1436 if (!object_property_set_bool(obj, "x-use-canonical-path-for-ramblock-id", 1437 false, errp)) { 1438 goto out; 1439 } 1440 if (!user_creatable_complete(USER_CREATABLE(obj), errp)) { 1441 goto out; 1442 } 1443 r = object_property_set_link(OBJECT(ms), "memory-backend", obj, errp); 1444 1445 out: 1446 object_unref(obj); 1447 return r; 1448 } 1449 1450 const char *machine_class_default_cpu_type(MachineClass *mc) 1451 { 1452 if (mc->valid_cpu_types && !mc->valid_cpu_types[1]) { 1453 /* Only a single CPU type allowed: use it as default. */ 1454 return mc->valid_cpu_types[0]; 1455 } 1456 return mc->default_cpu_type; 1457 } 1458 1459 static bool is_cpu_type_supported(const MachineState *machine, Error **errp) 1460 { 1461 MachineClass *mc = MACHINE_GET_CLASS(machine); 1462 ObjectClass *oc = object_class_by_name(machine->cpu_type); 1463 CPUClass *cc; 1464 int i; 1465 1466 /* 1467 * Check if the user specified CPU type is supported when the valid 1468 * CPU types have been determined. Note that the user specified CPU 1469 * type is provided through '-cpu' option. 1470 */ 1471 if (mc->valid_cpu_types) { 1472 assert(mc->valid_cpu_types[0] != NULL); 1473 for (i = 0; mc->valid_cpu_types[i]; i++) { 1474 if (object_class_dynamic_cast(oc, mc->valid_cpu_types[i])) { 1475 break; 1476 } 1477 } 1478 1479 /* The user specified CPU type isn't valid */ 1480 if (!mc->valid_cpu_types[i]) { 1481 g_autofree char *requested = cpu_model_from_type(machine->cpu_type); 1482 error_setg(errp, "Invalid CPU model: %s", requested); 1483 if (!mc->valid_cpu_types[1]) { 1484 g_autofree char *model = cpu_model_from_type( 1485 mc->valid_cpu_types[0]); 1486 error_append_hint(errp, "The only valid type is: %s\n", model); 1487 } else { 1488 error_append_hint(errp, "The valid models are: "); 1489 for (i = 0; mc->valid_cpu_types[i]; i++) { 1490 g_autofree char *model = cpu_model_from_type( 1491 mc->valid_cpu_types[i]); 1492 error_append_hint(errp, "%s%s", 1493 model, 1494 mc->valid_cpu_types[i + 1] ? ", " : ""); 1495 } 1496 error_append_hint(errp, "\n"); 1497 } 1498 1499 return false; 1500 } 1501 } 1502 1503 /* Check if CPU type is deprecated and warn if so */ 1504 cc = CPU_CLASS(oc); 1505 assert(cc != NULL); 1506 if (cc->deprecation_note) { 1507 warn_report("CPU model %s is deprecated -- %s", 1508 machine->cpu_type, cc->deprecation_note); 1509 } 1510 1511 return true; 1512 } 1513 1514 void machine_run_board_init(MachineState *machine, const char *mem_path, Error **errp) 1515 { 1516 ERRP_GUARD(); 1517 MachineClass *machine_class = MACHINE_GET_CLASS(machine); 1518 1519 /* This checkpoint is required by replay to separate prior clock 1520 reading from the other reads, because timer polling functions query 1521 clock values from the log. */ 1522 replay_checkpoint(CHECKPOINT_INIT); 1523 1524 if (!xen_enabled()) { 1525 /* On 32-bit hosts, QEMU is limited by virtual address space */ 1526 if (machine->ram_size > (2047 << 20) && HOST_LONG_BITS == 32) { 1527 error_setg(errp, "at most 2047 MB RAM can be simulated"); 1528 return; 1529 } 1530 } 1531 1532 if (machine->memdev) { 1533 ram_addr_t backend_size = object_property_get_uint(OBJECT(machine->memdev), 1534 "size", &error_abort); 1535 if (backend_size != machine->ram_size) { 1536 error_setg(errp, "Machine memory size does not match the size of the memory backend"); 1537 return; 1538 } 1539 } else if (machine_class->default_ram_id && machine->ram_size && 1540 numa_uses_legacy_mem()) { 1541 if (object_property_find(object_get_objects_root(), 1542 machine_class->default_ram_id)) { 1543 error_setg(errp, "object's id '%s' is reserved for the default" 1544 " RAM backend, it can't be used for any other purposes", 1545 machine_class->default_ram_id); 1546 error_append_hint(errp, 1547 "Change the object's 'id' to something else or disable" 1548 " automatic creation of the default RAM backend by setting" 1549 " 'memory-backend=%s' with '-machine'.\n", 1550 machine_class->default_ram_id); 1551 return; 1552 } 1553 if (!create_default_memdev(current_machine, mem_path, errp)) { 1554 return; 1555 } 1556 } 1557 1558 if (machine->numa_state) { 1559 numa_complete_configuration(machine); 1560 if (machine->numa_state->num_nodes) { 1561 machine_numa_finish_cpu_init(machine); 1562 if (machine_class->cpu_cluster_has_numa_boundary) { 1563 validate_cpu_cluster_to_numa_boundary(machine); 1564 } 1565 } 1566 } 1567 1568 if (!machine->ram && machine->memdev) { 1569 machine->ram = machine_consume_memdev(machine, machine->memdev); 1570 } 1571 1572 /* Check if the CPU type is supported */ 1573 if (machine->cpu_type && !is_cpu_type_supported(machine, errp)) { 1574 return; 1575 } 1576 1577 if (machine->cgs) { 1578 /* 1579 * With confidential guests, the host can't see the real 1580 * contents of RAM, so there's no point in it trying to merge 1581 * areas. 1582 */ 1583 machine_set_mem_merge(OBJECT(machine), false, &error_abort); 1584 1585 /* 1586 * Virtio devices can't count on directly accessing guest 1587 * memory, so they need iommu_platform=on to use normal DMA 1588 * mechanisms. That requires also disabling legacy virtio 1589 * support for those virtio pci devices which allow it. 1590 */ 1591 object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy", 1592 "on", true); 1593 object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform", 1594 "on", false); 1595 } 1596 1597 accel_init_interfaces(ACCEL_GET_CLASS(machine->accelerator)); 1598 machine_class->init(machine); 1599 phase_advance(PHASE_MACHINE_INITIALIZED); 1600 } 1601 1602 static NotifierList machine_init_done_notifiers = 1603 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers); 1604 1605 void qemu_add_machine_init_done_notifier(Notifier *notify) 1606 { 1607 notifier_list_add(&machine_init_done_notifiers, notify); 1608 if (phase_check(PHASE_MACHINE_READY)) { 1609 notify->notify(notify, NULL); 1610 } 1611 } 1612 1613 void qemu_remove_machine_init_done_notifier(Notifier *notify) 1614 { 1615 notifier_remove(notify); 1616 } 1617 1618 void qdev_machine_creation_done(void) 1619 { 1620 cpu_synchronize_all_post_init(); 1621 1622 if (current_machine->boot_config.once) { 1623 qemu_boot_set(current_machine->boot_config.once, &error_fatal); 1624 qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_config.order)); 1625 } 1626 1627 /* 1628 * ok, initial machine setup is done, starting from now we can 1629 * only create hotpluggable devices 1630 */ 1631 phase_advance(PHASE_MACHINE_READY); 1632 qdev_assert_realized_properly(); 1633 1634 /* TODO: once all bus devices are qdevified, this should be done 1635 * when bus is created by qdev.c */ 1636 /* 1637 * This is where we arrange for the sysbus to be reset when the 1638 * whole simulation is reset. In turn, resetting the sysbus will cause 1639 * all devices hanging off it (and all their child buses, recursively) 1640 * to be reset. Note that this will *not* reset any Device objects 1641 * which are not attached to some part of the qbus tree! 1642 */ 1643 qemu_register_resettable(OBJECT(sysbus_get_default())); 1644 1645 notifier_list_notify(&machine_init_done_notifiers, NULL); 1646 1647 if (rom_check_and_register_reset() != 0) { 1648 exit(1); 1649 } 1650 1651 replay_start(); 1652 1653 /* This checkpoint is required by replay to separate prior clock 1654 reading from the other reads, because timer polling functions query 1655 clock values from the log. */ 1656 replay_checkpoint(CHECKPOINT_RESET); 1657 qemu_system_reset(SHUTDOWN_CAUSE_NONE); 1658 register_global_state(); 1659 } 1660 1661 static const TypeInfo machine_info = { 1662 .name = TYPE_MACHINE, 1663 .parent = TYPE_OBJECT, 1664 .abstract = true, 1665 .class_size = sizeof(MachineClass), 1666 .class_init = machine_class_init, 1667 .class_base_init = machine_class_base_init, 1668 .instance_size = sizeof(MachineState), 1669 .instance_init = machine_initfn, 1670 .instance_finalize = machine_finalize, 1671 }; 1672 1673 static void machine_register_types(void) 1674 { 1675 type_register_static(&machine_info); 1676 } 1677 1678 type_init(machine_register_types) 1679