xref: /openbmc/qemu/hw/core/machine.c (revision 3539d84d)
1 /*
2  * QEMU Machine
3  *
4  * Copyright (C) 2014 Red Hat Inc
5  *
6  * Authors:
7  *   Marcel Apfelbaum <marcel.a@redhat.com>
8  *
9  * This work is licensed under the terms of the GNU GPL, version 2 or later.
10  * See the COPYING file in the top-level directory.
11  */
12 
13 #include "qemu/osdep.h"
14 #include "qemu/option.h"
15 #include "qapi/qmp/qerror.h"
16 #include "sysemu/replay.h"
17 #include "qemu/units.h"
18 #include "hw/boards.h"
19 #include "hw/loader.h"
20 #include "qapi/error.h"
21 #include "qapi/qapi-visit-common.h"
22 #include "qapi/visitor.h"
23 #include "hw/sysbus.h"
24 #include "sysemu/cpus.h"
25 #include "sysemu/sysemu.h"
26 #include "sysemu/reset.h"
27 #include "sysemu/runstate.h"
28 #include "sysemu/numa.h"
29 #include "qemu/error-report.h"
30 #include "sysemu/qtest.h"
31 #include "hw/pci/pci.h"
32 #include "hw/mem/nvdimm.h"
33 #include "migration/global_state.h"
34 #include "migration/vmstate.h"
35 #include "exec/confidential-guest-support.h"
36 #include "hw/virtio/virtio.h"
37 #include "hw/virtio/virtio-pci.h"
38 
39 GlobalProperty hw_compat_5_2[] = {
40     { "ICH9-LPC", "smm-compat", "on"},
41     { "PIIX4_PM", "smm-compat", "on"},
42     { "virtio-blk-device", "report-discard-granularity", "off" },
43     { "virtio-net-pci", "vectors", "3"},
44 };
45 const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2);
46 
47 GlobalProperty hw_compat_5_1[] = {
48     { "vhost-scsi", "num_queues", "1"},
49     { "vhost-user-blk", "num-queues", "1"},
50     { "vhost-user-scsi", "num_queues", "1"},
51     { "virtio-blk-device", "num-queues", "1"},
52     { "virtio-scsi-device", "num_queues", "1"},
53     { "nvme", "use-intel-id", "on"},
54     { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
55     { "pl011", "migrate-clk", "off" },
56 };
57 const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1);
58 
59 GlobalProperty hw_compat_5_0[] = {
60     { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
61     { "virtio-balloon-device", "page-poison", "false" },
62     { "vmport", "x-read-set-eax", "off" },
63     { "vmport", "x-signal-unsupported-cmd", "off" },
64     { "vmport", "x-report-vmx-type", "off" },
65     { "vmport", "x-cmds-v2", "off" },
66     { "virtio-device", "x-disable-legacy-check", "true" },
67 };
68 const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0);
69 
70 GlobalProperty hw_compat_4_2[] = {
71     { "virtio-blk-device", "queue-size", "128"},
72     { "virtio-scsi-device", "virtqueue_size", "128"},
73     { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
74     { "virtio-blk-device", "seg-max-adjust", "off"},
75     { "virtio-scsi-device", "seg_max_adjust", "off"},
76     { "vhost-blk-device", "seg_max_adjust", "off"},
77     { "usb-host", "suppress-remote-wake", "off" },
78     { "usb-redir", "suppress-remote-wake", "off" },
79     { "qxl", "revision", "4" },
80     { "qxl-vga", "revision", "4" },
81     { "fw_cfg", "acpi-mr-restore", "false" },
82     { "virtio-device", "use-disabled-flag", "false" },
83 };
84 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2);
85 
86 GlobalProperty hw_compat_4_1[] = {
87     { "virtio-pci", "x-pcie-flr-init", "off" },
88 };
89 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1);
90 
91 GlobalProperty hw_compat_4_0[] = {
92     { "VGA",            "edid", "false" },
93     { "secondary-vga",  "edid", "false" },
94     { "bochs-display",  "edid", "false" },
95     { "virtio-vga",     "edid", "false" },
96     { "virtio-gpu-device", "edid", "false" },
97     { "virtio-device", "use-started", "false" },
98     { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
99     { "pl031", "migrate-tick-offset", "false" },
100 };
101 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0);
102 
103 GlobalProperty hw_compat_3_1[] = {
104     { "pcie-root-port", "x-speed", "2_5" },
105     { "pcie-root-port", "x-width", "1" },
106     { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
107     { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
108     { "tpm-crb", "ppi", "false" },
109     { "tpm-tis", "ppi", "false" },
110     { "usb-kbd", "serial", "42" },
111     { "usb-mouse", "serial", "42" },
112     { "usb-tablet", "serial", "42" },
113     { "virtio-blk-device", "discard", "false" },
114     { "virtio-blk-device", "write-zeroes", "false" },
115     { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
116     { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
117 };
118 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1);
119 
120 GlobalProperty hw_compat_3_0[] = {};
121 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0);
122 
123 GlobalProperty hw_compat_2_12[] = {
124     { "migration", "decompress-error-check", "off" },
125     { "hda-audio", "use-timer", "false" },
126     { "cirrus-vga", "global-vmstate", "true" },
127     { "VGA", "global-vmstate", "true" },
128     { "vmware-svga", "global-vmstate", "true" },
129     { "qxl-vga", "global-vmstate", "true" },
130 };
131 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12);
132 
133 GlobalProperty hw_compat_2_11[] = {
134     { "hpet", "hpet-offset-saved", "false" },
135     { "virtio-blk-pci", "vectors", "2" },
136     { "vhost-user-blk-pci", "vectors", "2" },
137     { "e1000", "migrate_tso_props", "off" },
138 };
139 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11);
140 
141 GlobalProperty hw_compat_2_10[] = {
142     { "virtio-mouse-device", "wheel-axis", "false" },
143     { "virtio-tablet-device", "wheel-axis", "false" },
144 };
145 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10);
146 
147 GlobalProperty hw_compat_2_9[] = {
148     { "pci-bridge", "shpc", "off" },
149     { "intel-iommu", "pt", "off" },
150     { "virtio-net-device", "x-mtu-bypass-backend", "off" },
151     { "pcie-root-port", "x-migrate-msix", "false" },
152 };
153 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9);
154 
155 GlobalProperty hw_compat_2_8[] = {
156     { "fw_cfg_mem", "x-file-slots", "0x10" },
157     { "fw_cfg_io", "x-file-slots", "0x10" },
158     { "pflash_cfi01", "old-multiple-chip-handling", "on" },
159     { "pci-bridge", "shpc", "on" },
160     { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" },
161     { "virtio-pci", "x-pcie-deverr-init", "off" },
162     { "virtio-pci", "x-pcie-lnkctl-init", "off" },
163     { "virtio-pci", "x-pcie-pm-init", "off" },
164     { "cirrus-vga", "vgamem_mb", "8" },
165     { "isa-cirrus-vga", "vgamem_mb", "8" },
166 };
167 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8);
168 
169 GlobalProperty hw_compat_2_7[] = {
170     { "virtio-pci", "page-per-vq", "on" },
171     { "virtio-serial-device", "emergency-write", "off" },
172     { "ioapic", "version", "0x11" },
173     { "intel-iommu", "x-buggy-eim", "true" },
174     { "virtio-pci", "x-ignore-backend-features", "on" },
175 };
176 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7);
177 
178 GlobalProperty hw_compat_2_6[] = {
179     { "virtio-mmio", "format_transport_address", "off" },
180     /* Optional because not all virtio-pci devices support legacy mode */
181     { "virtio-pci", "disable-modern", "on",  .optional = true },
182     { "virtio-pci", "disable-legacy", "off", .optional = true },
183 };
184 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6);
185 
186 GlobalProperty hw_compat_2_5[] = {
187     { "isa-fdc", "fallback", "144" },
188     { "pvscsi", "x-old-pci-configuration", "on" },
189     { "pvscsi", "x-disable-pcie", "on" },
190     { "vmxnet3", "x-old-msi-offsets", "on" },
191     { "vmxnet3", "x-disable-pcie", "on" },
192 };
193 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5);
194 
195 GlobalProperty hw_compat_2_4[] = {
196     /* Optional because the 'scsi' property is Linux-only */
197     { "virtio-blk-device", "scsi", "true", .optional = true },
198     { "e1000", "extra_mac_registers", "off" },
199     { "virtio-pci", "x-disable-pcie", "on" },
200     { "virtio-pci", "migrate-extra", "off" },
201     { "fw_cfg_mem", "dma_enabled", "off" },
202     { "fw_cfg_io", "dma_enabled", "off" }
203 };
204 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4);
205 
206 GlobalProperty hw_compat_2_3[] = {
207     { "virtio-blk-pci", "any_layout", "off" },
208     { "virtio-balloon-pci", "any_layout", "off" },
209     { "virtio-serial-pci", "any_layout", "off" },
210     { "virtio-9p-pci", "any_layout", "off" },
211     { "virtio-rng-pci", "any_layout", "off" },
212     { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" },
213     { "migration", "send-configuration", "off" },
214     { "migration", "send-section-footer", "off" },
215     { "migration", "store-global-state", "off" },
216 };
217 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3);
218 
219 GlobalProperty hw_compat_2_2[] = {};
220 const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2);
221 
222 GlobalProperty hw_compat_2_1[] = {
223     { "intel-hda", "old_msi_addr", "on" },
224     { "VGA", "qemu-extended-regs", "off" },
225     { "secondary-vga", "qemu-extended-regs", "off" },
226     { "virtio-scsi-pci", "any_layout", "off" },
227     { "usb-mouse", "usb_version", "1" },
228     { "usb-kbd", "usb_version", "1" },
229     { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
230 };
231 const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1);
232 
233 MachineState *current_machine;
234 
235 static char *machine_get_kernel(Object *obj, Error **errp)
236 {
237     MachineState *ms = MACHINE(obj);
238 
239     return g_strdup(ms->kernel_filename);
240 }
241 
242 static void machine_set_kernel(Object *obj, const char *value, Error **errp)
243 {
244     MachineState *ms = MACHINE(obj);
245 
246     g_free(ms->kernel_filename);
247     ms->kernel_filename = g_strdup(value);
248 }
249 
250 static char *machine_get_initrd(Object *obj, Error **errp)
251 {
252     MachineState *ms = MACHINE(obj);
253 
254     return g_strdup(ms->initrd_filename);
255 }
256 
257 static void machine_set_initrd(Object *obj, const char *value, Error **errp)
258 {
259     MachineState *ms = MACHINE(obj);
260 
261     g_free(ms->initrd_filename);
262     ms->initrd_filename = g_strdup(value);
263 }
264 
265 static char *machine_get_append(Object *obj, Error **errp)
266 {
267     MachineState *ms = MACHINE(obj);
268 
269     return g_strdup(ms->kernel_cmdline);
270 }
271 
272 static void machine_set_append(Object *obj, const char *value, Error **errp)
273 {
274     MachineState *ms = MACHINE(obj);
275 
276     g_free(ms->kernel_cmdline);
277     ms->kernel_cmdline = g_strdup(value);
278 }
279 
280 static char *machine_get_dtb(Object *obj, Error **errp)
281 {
282     MachineState *ms = MACHINE(obj);
283 
284     return g_strdup(ms->dtb);
285 }
286 
287 static void machine_set_dtb(Object *obj, const char *value, Error **errp)
288 {
289     MachineState *ms = MACHINE(obj);
290 
291     g_free(ms->dtb);
292     ms->dtb = g_strdup(value);
293 }
294 
295 static char *machine_get_dumpdtb(Object *obj, Error **errp)
296 {
297     MachineState *ms = MACHINE(obj);
298 
299     return g_strdup(ms->dumpdtb);
300 }
301 
302 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp)
303 {
304     MachineState *ms = MACHINE(obj);
305 
306     g_free(ms->dumpdtb);
307     ms->dumpdtb = g_strdup(value);
308 }
309 
310 static void machine_get_phandle_start(Object *obj, Visitor *v,
311                                       const char *name, void *opaque,
312                                       Error **errp)
313 {
314     MachineState *ms = MACHINE(obj);
315     int64_t value = ms->phandle_start;
316 
317     visit_type_int(v, name, &value, errp);
318 }
319 
320 static void machine_set_phandle_start(Object *obj, Visitor *v,
321                                       const char *name, void *opaque,
322                                       Error **errp)
323 {
324     MachineState *ms = MACHINE(obj);
325     int64_t value;
326 
327     if (!visit_type_int(v, name, &value, errp)) {
328         return;
329     }
330 
331     ms->phandle_start = value;
332 }
333 
334 static char *machine_get_dt_compatible(Object *obj, Error **errp)
335 {
336     MachineState *ms = MACHINE(obj);
337 
338     return g_strdup(ms->dt_compatible);
339 }
340 
341 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp)
342 {
343     MachineState *ms = MACHINE(obj);
344 
345     g_free(ms->dt_compatible);
346     ms->dt_compatible = g_strdup(value);
347 }
348 
349 static bool machine_get_dump_guest_core(Object *obj, Error **errp)
350 {
351     MachineState *ms = MACHINE(obj);
352 
353     return ms->dump_guest_core;
354 }
355 
356 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp)
357 {
358     MachineState *ms = MACHINE(obj);
359 
360     ms->dump_guest_core = value;
361 }
362 
363 static bool machine_get_mem_merge(Object *obj, Error **errp)
364 {
365     MachineState *ms = MACHINE(obj);
366 
367     return ms->mem_merge;
368 }
369 
370 static void machine_set_mem_merge(Object *obj, bool value, Error **errp)
371 {
372     MachineState *ms = MACHINE(obj);
373 
374     ms->mem_merge = value;
375 }
376 
377 static bool machine_get_usb(Object *obj, Error **errp)
378 {
379     MachineState *ms = MACHINE(obj);
380 
381     return ms->usb;
382 }
383 
384 static void machine_set_usb(Object *obj, bool value, Error **errp)
385 {
386     MachineState *ms = MACHINE(obj);
387 
388     ms->usb = value;
389     ms->usb_disabled = !value;
390 }
391 
392 static bool machine_get_graphics(Object *obj, Error **errp)
393 {
394     MachineState *ms = MACHINE(obj);
395 
396     return ms->enable_graphics;
397 }
398 
399 static void machine_set_graphics(Object *obj, bool value, Error **errp)
400 {
401     MachineState *ms = MACHINE(obj);
402 
403     ms->enable_graphics = value;
404 }
405 
406 static char *machine_get_firmware(Object *obj, Error **errp)
407 {
408     MachineState *ms = MACHINE(obj);
409 
410     return g_strdup(ms->firmware);
411 }
412 
413 static void machine_set_firmware(Object *obj, const char *value, Error **errp)
414 {
415     MachineState *ms = MACHINE(obj);
416 
417     g_free(ms->firmware);
418     ms->firmware = g_strdup(value);
419 }
420 
421 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp)
422 {
423     MachineState *ms = MACHINE(obj);
424 
425     ms->suppress_vmdesc = value;
426 }
427 
428 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp)
429 {
430     MachineState *ms = MACHINE(obj);
431 
432     return ms->suppress_vmdesc;
433 }
434 
435 static char *machine_get_memory_encryption(Object *obj, Error **errp)
436 {
437     MachineState *ms = MACHINE(obj);
438 
439     if (ms->cgs) {
440         return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs)));
441     }
442 
443     return NULL;
444 }
445 
446 static void machine_set_memory_encryption(Object *obj, const char *value,
447                                         Error **errp)
448 {
449     Object *cgs =
450         object_resolve_path_component(object_get_objects_root(), value);
451 
452     if (!cgs) {
453         error_setg(errp, "No such memory encryption object '%s'", value);
454         return;
455     }
456 
457     object_property_set_link(obj, "confidential-guest-support", cgs, errp);
458 }
459 
460 static void machine_check_confidential_guest_support(const Object *obj,
461                                                      const char *name,
462                                                      Object *new_target,
463                                                      Error **errp)
464 {
465     /*
466      * So far the only constraint is that the target has the
467      * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked
468      * by the QOM core
469      */
470 }
471 
472 static bool machine_get_nvdimm(Object *obj, Error **errp)
473 {
474     MachineState *ms = MACHINE(obj);
475 
476     return ms->nvdimms_state->is_enabled;
477 }
478 
479 static void machine_set_nvdimm(Object *obj, bool value, Error **errp)
480 {
481     MachineState *ms = MACHINE(obj);
482 
483     ms->nvdimms_state->is_enabled = value;
484 }
485 
486 static bool machine_get_hmat(Object *obj, Error **errp)
487 {
488     MachineState *ms = MACHINE(obj);
489 
490     return ms->numa_state->hmat_enabled;
491 }
492 
493 static void machine_set_hmat(Object *obj, bool value, Error **errp)
494 {
495     MachineState *ms = MACHINE(obj);
496 
497     ms->numa_state->hmat_enabled = value;
498 }
499 
500 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp)
501 {
502     MachineState *ms = MACHINE(obj);
503 
504     return g_strdup(ms->nvdimms_state->persistence_string);
505 }
506 
507 static void machine_set_nvdimm_persistence(Object *obj, const char *value,
508                                            Error **errp)
509 {
510     MachineState *ms = MACHINE(obj);
511     NVDIMMState *nvdimms_state = ms->nvdimms_state;
512 
513     if (strcmp(value, "cpu") == 0) {
514         nvdimms_state->persistence = 3;
515     } else if (strcmp(value, "mem-ctrl") == 0) {
516         nvdimms_state->persistence = 2;
517     } else {
518         error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option",
519                    value);
520         return;
521     }
522 
523     g_free(nvdimms_state->persistence_string);
524     nvdimms_state->persistence_string = g_strdup(value);
525 }
526 
527 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type)
528 {
529     QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type));
530 }
531 
532 static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque)
533 {
534     MachineState *machine = opaque;
535     MachineClass *mc = MACHINE_GET_CLASS(machine);
536     bool allowed = false;
537     strList *wl;
538 
539     for (wl = mc->allowed_dynamic_sysbus_devices;
540          !allowed && wl;
541          wl = wl->next) {
542         allowed |= !!object_dynamic_cast(OBJECT(sbdev), wl->value);
543     }
544 
545     if (!allowed) {
546         error_report("Option '-device %s' cannot be handled by this machine",
547                      object_class_get_name(object_get_class(OBJECT(sbdev))));
548         exit(1);
549     }
550 }
551 
552 static char *machine_get_memdev(Object *obj, Error **errp)
553 {
554     MachineState *ms = MACHINE(obj);
555 
556     return g_strdup(ms->ram_memdev_id);
557 }
558 
559 static void machine_set_memdev(Object *obj, const char *value, Error **errp)
560 {
561     MachineState *ms = MACHINE(obj);
562 
563     g_free(ms->ram_memdev_id);
564     ms->ram_memdev_id = g_strdup(value);
565 }
566 
567 
568 static void machine_init_notify(Notifier *notifier, void *data)
569 {
570     MachineState *machine = MACHINE(qdev_get_machine());
571 
572     /*
573      * Loop through all dynamically created sysbus devices and check if they are
574      * all allowed.  If a device is not allowed, error out.
575      */
576     foreach_dynamic_sysbus_device(validate_sysbus_device, machine);
577 }
578 
579 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine)
580 {
581     int i;
582     HotpluggableCPUList *head = NULL;
583     MachineClass *mc = MACHINE_GET_CLASS(machine);
584 
585     /* force board to initialize possible_cpus if it hasn't been done yet */
586     mc->possible_cpu_arch_ids(machine);
587 
588     for (i = 0; i < machine->possible_cpus->len; i++) {
589         Object *cpu;
590         HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1);
591 
592         cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type);
593         cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count;
594         cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props,
595                                    sizeof(*cpu_item->props));
596 
597         cpu = machine->possible_cpus->cpus[i].cpu;
598         if (cpu) {
599             cpu_item->has_qom_path = true;
600             cpu_item->qom_path = object_get_canonical_path(cpu);
601         }
602         QAPI_LIST_PREPEND(head, cpu_item);
603     }
604     return head;
605 }
606 
607 /**
608  * machine_set_cpu_numa_node:
609  * @machine: machine object to modify
610  * @props: specifies which cpu objects to assign to
611  *         numa node specified by @props.node_id
612  * @errp: if an error occurs, a pointer to an area to store the error
613  *
614  * Associate NUMA node specified by @props.node_id with cpu slots that
615  * match socket/core/thread-ids specified by @props. It's recommended to use
616  * query-hotpluggable-cpus.props values to specify affected cpu slots,
617  * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
618  *
619  * However for CLI convenience it's possible to pass in subset of properties,
620  * which would affect all cpu slots that match it.
621  * Ex for pc machine:
622  *    -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
623  *    -numa cpu,node-id=0,socket_id=0 \
624  *    -numa cpu,node-id=1,socket_id=1
625  * will assign all child cores of socket 0 to node 0 and
626  * of socket 1 to node 1.
627  *
628  * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
629  * return error.
630  * Empty subset is disallowed and function will return with error in this case.
631  */
632 void machine_set_cpu_numa_node(MachineState *machine,
633                                const CpuInstanceProperties *props, Error **errp)
634 {
635     MachineClass *mc = MACHINE_GET_CLASS(machine);
636     NodeInfo *numa_info = machine->numa_state->nodes;
637     bool match = false;
638     int i;
639 
640     if (!mc->possible_cpu_arch_ids) {
641         error_setg(errp, "mapping of CPUs to NUMA node is not supported");
642         return;
643     }
644 
645     /* disabling node mapping is not supported, forbid it */
646     assert(props->has_node_id);
647 
648     /* force board to initialize possible_cpus if it hasn't been done yet */
649     mc->possible_cpu_arch_ids(machine);
650 
651     for (i = 0; i < machine->possible_cpus->len; i++) {
652         CPUArchId *slot = &machine->possible_cpus->cpus[i];
653 
654         /* reject unsupported by board properties */
655         if (props->has_thread_id && !slot->props.has_thread_id) {
656             error_setg(errp, "thread-id is not supported");
657             return;
658         }
659 
660         if (props->has_core_id && !slot->props.has_core_id) {
661             error_setg(errp, "core-id is not supported");
662             return;
663         }
664 
665         if (props->has_socket_id && !slot->props.has_socket_id) {
666             error_setg(errp, "socket-id is not supported");
667             return;
668         }
669 
670         if (props->has_die_id && !slot->props.has_die_id) {
671             error_setg(errp, "die-id is not supported");
672             return;
673         }
674 
675         /* skip slots with explicit mismatch */
676         if (props->has_thread_id && props->thread_id != slot->props.thread_id) {
677                 continue;
678         }
679 
680         if (props->has_core_id && props->core_id != slot->props.core_id) {
681                 continue;
682         }
683 
684         if (props->has_die_id && props->die_id != slot->props.die_id) {
685                 continue;
686         }
687 
688         if (props->has_socket_id && props->socket_id != slot->props.socket_id) {
689                 continue;
690         }
691 
692         /* reject assignment if slot is already assigned, for compatibility
693          * of legacy cpu_index mapping with SPAPR core based mapping do not
694          * error out if cpu thread and matched core have the same node-id */
695         if (slot->props.has_node_id &&
696             slot->props.node_id != props->node_id) {
697             error_setg(errp, "CPU is already assigned to node-id: %" PRId64,
698                        slot->props.node_id);
699             return;
700         }
701 
702         /* assign slot to node as it's matched '-numa cpu' key */
703         match = true;
704         slot->props.node_id = props->node_id;
705         slot->props.has_node_id = props->has_node_id;
706 
707         if (machine->numa_state->hmat_enabled) {
708             if ((numa_info[props->node_id].initiator < MAX_NODES) &&
709                 (props->node_id != numa_info[props->node_id].initiator)) {
710                 error_setg(errp, "The initiator of CPU NUMA node %" PRId64
711                         " should be itself", props->node_id);
712                 return;
713             }
714             numa_info[props->node_id].has_cpu = true;
715             numa_info[props->node_id].initiator = props->node_id;
716         }
717     }
718 
719     if (!match) {
720         error_setg(errp, "no match found");
721     }
722 }
723 
724 static void smp_parse(MachineState *ms, QemuOpts *opts)
725 {
726     if (opts) {
727         unsigned cpus    = qemu_opt_get_number(opts, "cpus", 0);
728         unsigned sockets = qemu_opt_get_number(opts, "sockets", 0);
729         unsigned cores   = qemu_opt_get_number(opts, "cores", 0);
730         unsigned threads = qemu_opt_get_number(opts, "threads", 0);
731 
732         /* compute missing values, prefer sockets over cores over threads */
733         if (cpus == 0 || sockets == 0) {
734             cores = cores > 0 ? cores : 1;
735             threads = threads > 0 ? threads : 1;
736             if (cpus == 0) {
737                 sockets = sockets > 0 ? sockets : 1;
738                 cpus = cores * threads * sockets;
739             } else {
740                 ms->smp.max_cpus =
741                         qemu_opt_get_number(opts, "maxcpus", cpus);
742                 sockets = ms->smp.max_cpus / (cores * threads);
743             }
744         } else if (cores == 0) {
745             threads = threads > 0 ? threads : 1;
746             cores = cpus / (sockets * threads);
747             cores = cores > 0 ? cores : 1;
748         } else if (threads == 0) {
749             threads = cpus / (cores * sockets);
750             threads = threads > 0 ? threads : 1;
751         } else if (sockets * cores * threads < cpus) {
752             error_report("cpu topology: "
753                          "sockets (%u) * cores (%u) * threads (%u) < "
754                          "smp_cpus (%u)",
755                          sockets, cores, threads, cpus);
756             exit(1);
757         }
758 
759         ms->smp.max_cpus =
760                 qemu_opt_get_number(opts, "maxcpus", cpus);
761 
762         if (ms->smp.max_cpus < cpus) {
763             error_report("maxcpus must be equal to or greater than smp");
764             exit(1);
765         }
766 
767         if (sockets * cores * threads != ms->smp.max_cpus) {
768             error_report("Invalid CPU topology: "
769                          "sockets (%u) * cores (%u) * threads (%u) "
770                          "!= maxcpus (%u)",
771                          sockets, cores, threads,
772                          ms->smp.max_cpus);
773             exit(1);
774         }
775 
776         ms->smp.cpus = cpus;
777         ms->smp.cores = cores;
778         ms->smp.threads = threads;
779         ms->smp.sockets = sockets;
780     }
781 
782     if (ms->smp.cpus > 1) {
783         Error *blocker = NULL;
784         error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp");
785         replay_add_blocker(blocker);
786     }
787 }
788 
789 static void machine_class_init(ObjectClass *oc, void *data)
790 {
791     MachineClass *mc = MACHINE_CLASS(oc);
792 
793     /* Default 128 MB as guest ram size */
794     mc->default_ram_size = 128 * MiB;
795     mc->rom_file_has_mr = true;
796     mc->smp_parse = smp_parse;
797 
798     /* numa node memory size aligned on 8MB by default.
799      * On Linux, each node's border has to be 8MB aligned
800      */
801     mc->numa_mem_align_shift = 23;
802 
803     object_class_property_add_str(oc, "kernel",
804         machine_get_kernel, machine_set_kernel);
805     object_class_property_set_description(oc, "kernel",
806         "Linux kernel image file");
807 
808     object_class_property_add_str(oc, "initrd",
809         machine_get_initrd, machine_set_initrd);
810     object_class_property_set_description(oc, "initrd",
811         "Linux initial ramdisk file");
812 
813     object_class_property_add_str(oc, "append",
814         machine_get_append, machine_set_append);
815     object_class_property_set_description(oc, "append",
816         "Linux kernel command line");
817 
818     object_class_property_add_str(oc, "dtb",
819         machine_get_dtb, machine_set_dtb);
820     object_class_property_set_description(oc, "dtb",
821         "Linux kernel device tree file");
822 
823     object_class_property_add_str(oc, "dumpdtb",
824         machine_get_dumpdtb, machine_set_dumpdtb);
825     object_class_property_set_description(oc, "dumpdtb",
826         "Dump current dtb to a file and quit");
827 
828     object_class_property_add(oc, "phandle-start", "int",
829         machine_get_phandle_start, machine_set_phandle_start,
830         NULL, NULL);
831     object_class_property_set_description(oc, "phandle-start",
832         "The first phandle ID we may generate dynamically");
833 
834     object_class_property_add_str(oc, "dt-compatible",
835         machine_get_dt_compatible, machine_set_dt_compatible);
836     object_class_property_set_description(oc, "dt-compatible",
837         "Overrides the \"compatible\" property of the dt root node");
838 
839     object_class_property_add_bool(oc, "dump-guest-core",
840         machine_get_dump_guest_core, machine_set_dump_guest_core);
841     object_class_property_set_description(oc, "dump-guest-core",
842         "Include guest memory in a core dump");
843 
844     object_class_property_add_bool(oc, "mem-merge",
845         machine_get_mem_merge, machine_set_mem_merge);
846     object_class_property_set_description(oc, "mem-merge",
847         "Enable/disable memory merge support");
848 
849     object_class_property_add_bool(oc, "usb",
850         machine_get_usb, machine_set_usb);
851     object_class_property_set_description(oc, "usb",
852         "Set on/off to enable/disable usb");
853 
854     object_class_property_add_bool(oc, "graphics",
855         machine_get_graphics, machine_set_graphics);
856     object_class_property_set_description(oc, "graphics",
857         "Set on/off to enable/disable graphics emulation");
858 
859     object_class_property_add_str(oc, "firmware",
860         machine_get_firmware, machine_set_firmware);
861     object_class_property_set_description(oc, "firmware",
862         "Firmware image");
863 
864     object_class_property_add_bool(oc, "suppress-vmdesc",
865         machine_get_suppress_vmdesc, machine_set_suppress_vmdesc);
866     object_class_property_set_description(oc, "suppress-vmdesc",
867         "Set on to disable self-describing migration");
868 
869     object_class_property_add_link(oc, "confidential-guest-support",
870                                    TYPE_CONFIDENTIAL_GUEST_SUPPORT,
871                                    offsetof(MachineState, cgs),
872                                    machine_check_confidential_guest_support,
873                                    OBJ_PROP_LINK_STRONG);
874     object_class_property_set_description(oc, "confidential-guest-support",
875                                           "Set confidential guest scheme to support");
876 
877     /* For compatibility */
878     object_class_property_add_str(oc, "memory-encryption",
879         machine_get_memory_encryption, machine_set_memory_encryption);
880     object_class_property_set_description(oc, "memory-encryption",
881         "Set memory encryption object to use");
882 
883     object_class_property_add_str(oc, "memory-backend",
884                                   machine_get_memdev, machine_set_memdev);
885     object_class_property_set_description(oc, "memory-backend",
886                                           "Set RAM backend"
887                                           "Valid value is ID of hostmem based backend");
888 }
889 
890 static void machine_class_base_init(ObjectClass *oc, void *data)
891 {
892     MachineClass *mc = MACHINE_CLASS(oc);
893     mc->max_cpus = mc->max_cpus ?: 1;
894     mc->min_cpus = mc->min_cpus ?: 1;
895     mc->default_cpus = mc->default_cpus ?: 1;
896 
897     if (!object_class_is_abstract(oc)) {
898         const char *cname = object_class_get_name(oc);
899         assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX));
900         mc->name = g_strndup(cname,
901                             strlen(cname) - strlen(TYPE_MACHINE_SUFFIX));
902         mc->compat_props = g_ptr_array_new();
903     }
904 }
905 
906 static void machine_initfn(Object *obj)
907 {
908     MachineState *ms = MACHINE(obj);
909     MachineClass *mc = MACHINE_GET_CLASS(obj);
910 
911     container_get(obj, "/peripheral");
912     container_get(obj, "/peripheral-anon");
913 
914     ms->dump_guest_core = true;
915     ms->mem_merge = true;
916     ms->enable_graphics = true;
917     ms->kernel_cmdline = g_strdup("");
918 
919     if (mc->nvdimm_supported) {
920         Object *obj = OBJECT(ms);
921 
922         ms->nvdimms_state = g_new0(NVDIMMState, 1);
923         object_property_add_bool(obj, "nvdimm",
924                                  machine_get_nvdimm, machine_set_nvdimm);
925         object_property_set_description(obj, "nvdimm",
926                                         "Set on/off to enable/disable "
927                                         "NVDIMM instantiation");
928 
929         object_property_add_str(obj, "nvdimm-persistence",
930                                 machine_get_nvdimm_persistence,
931                                 machine_set_nvdimm_persistence);
932         object_property_set_description(obj, "nvdimm-persistence",
933                                         "Set NVDIMM persistence"
934                                         "Valid values are cpu, mem-ctrl");
935     }
936 
937     if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) {
938         ms->numa_state = g_new0(NumaState, 1);
939         object_property_add_bool(obj, "hmat",
940                                  machine_get_hmat, machine_set_hmat);
941         object_property_set_description(obj, "hmat",
942                                         "Set on/off to enable/disable "
943                                         "ACPI Heterogeneous Memory Attribute "
944                                         "Table (HMAT)");
945     }
946 
947     /* Register notifier when init is done for sysbus sanity checks */
948     ms->sysbus_notifier.notify = machine_init_notify;
949     qemu_add_machine_init_done_notifier(&ms->sysbus_notifier);
950 
951     /* default to mc->default_cpus */
952     ms->smp.cpus = mc->default_cpus;
953     ms->smp.max_cpus = mc->default_cpus;
954     ms->smp.cores = 1;
955     ms->smp.threads = 1;
956     ms->smp.sockets = 1;
957 }
958 
959 static void machine_finalize(Object *obj)
960 {
961     MachineState *ms = MACHINE(obj);
962 
963     g_free(ms->kernel_filename);
964     g_free(ms->initrd_filename);
965     g_free(ms->kernel_cmdline);
966     g_free(ms->dtb);
967     g_free(ms->dumpdtb);
968     g_free(ms->dt_compatible);
969     g_free(ms->firmware);
970     g_free(ms->device_memory);
971     g_free(ms->nvdimms_state);
972     g_free(ms->numa_state);
973 }
974 
975 bool machine_usb(MachineState *machine)
976 {
977     return machine->usb;
978 }
979 
980 int machine_phandle_start(MachineState *machine)
981 {
982     return machine->phandle_start;
983 }
984 
985 bool machine_dump_guest_core(MachineState *machine)
986 {
987     return machine->dump_guest_core;
988 }
989 
990 bool machine_mem_merge(MachineState *machine)
991 {
992     return machine->mem_merge;
993 }
994 
995 static char *cpu_slot_to_string(const CPUArchId *cpu)
996 {
997     GString *s = g_string_new(NULL);
998     if (cpu->props.has_socket_id) {
999         g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id);
1000     }
1001     if (cpu->props.has_die_id) {
1002         g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id);
1003     }
1004     if (cpu->props.has_core_id) {
1005         if (s->len) {
1006             g_string_append_printf(s, ", ");
1007         }
1008         g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id);
1009     }
1010     if (cpu->props.has_thread_id) {
1011         if (s->len) {
1012             g_string_append_printf(s, ", ");
1013         }
1014         g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id);
1015     }
1016     return g_string_free(s, false);
1017 }
1018 
1019 static void numa_validate_initiator(NumaState *numa_state)
1020 {
1021     int i;
1022     NodeInfo *numa_info = numa_state->nodes;
1023 
1024     for (i = 0; i < numa_state->num_nodes; i++) {
1025         if (numa_info[i].initiator == MAX_NODES) {
1026             error_report("The initiator of NUMA node %d is missing, use "
1027                          "'-numa node,initiator' option to declare it", i);
1028             exit(1);
1029         }
1030 
1031         if (!numa_info[numa_info[i].initiator].present) {
1032             error_report("NUMA node %" PRIu16 " is missing, use "
1033                          "'-numa node' option to declare it first",
1034                          numa_info[i].initiator);
1035             exit(1);
1036         }
1037 
1038         if (!numa_info[numa_info[i].initiator].has_cpu) {
1039             error_report("The initiator of NUMA node %d is invalid", i);
1040             exit(1);
1041         }
1042     }
1043 }
1044 
1045 static void machine_numa_finish_cpu_init(MachineState *machine)
1046 {
1047     int i;
1048     bool default_mapping;
1049     GString *s = g_string_new(NULL);
1050     MachineClass *mc = MACHINE_GET_CLASS(machine);
1051     const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine);
1052 
1053     assert(machine->numa_state->num_nodes);
1054     for (i = 0; i < possible_cpus->len; i++) {
1055         if (possible_cpus->cpus[i].props.has_node_id) {
1056             break;
1057         }
1058     }
1059     default_mapping = (i == possible_cpus->len);
1060 
1061     for (i = 0; i < possible_cpus->len; i++) {
1062         const CPUArchId *cpu_slot = &possible_cpus->cpus[i];
1063 
1064         if (!cpu_slot->props.has_node_id) {
1065             /* fetch default mapping from board and enable it */
1066             CpuInstanceProperties props = cpu_slot->props;
1067 
1068             props.node_id = mc->get_default_cpu_node_id(machine, i);
1069             if (!default_mapping) {
1070                 /* record slots with not set mapping,
1071                  * TODO: make it hard error in future */
1072                 char *cpu_str = cpu_slot_to_string(cpu_slot);
1073                 g_string_append_printf(s, "%sCPU %d [%s]",
1074                                        s->len ? ", " : "", i, cpu_str);
1075                 g_free(cpu_str);
1076 
1077                 /* non mapped cpus used to fallback to node 0 */
1078                 props.node_id = 0;
1079             }
1080 
1081             props.has_node_id = true;
1082             machine_set_cpu_numa_node(machine, &props, &error_fatal);
1083         }
1084     }
1085 
1086     if (machine->numa_state->hmat_enabled) {
1087         numa_validate_initiator(machine->numa_state);
1088     }
1089 
1090     if (s->len && !qtest_enabled()) {
1091         warn_report("CPU(s) not present in any NUMA nodes: %s",
1092                     s->str);
1093         warn_report("All CPU(s) up to maxcpus should be described "
1094                     "in NUMA config, ability to start up with partial NUMA "
1095                     "mappings is obsoleted and will be removed in future");
1096     }
1097     g_string_free(s, true);
1098 }
1099 
1100 MemoryRegion *machine_consume_memdev(MachineState *machine,
1101                                      HostMemoryBackend *backend)
1102 {
1103     MemoryRegion *ret = host_memory_backend_get_memory(backend);
1104 
1105     if (memory_region_is_mapped(ret)) {
1106         error_report("memory backend %s can't be used multiple times.",
1107                      object_get_canonical_path_component(OBJECT(backend)));
1108         exit(EXIT_FAILURE);
1109     }
1110     host_memory_backend_set_mapped(backend, true);
1111     vmstate_register_ram_global(ret);
1112     return ret;
1113 }
1114 
1115 bool machine_smp_parse(MachineState *ms, QemuOpts *opts, Error **errp)
1116 {
1117     MachineClass *mc = MACHINE_GET_CLASS(ms);
1118 
1119     mc->smp_parse(ms, opts);
1120 
1121     /* sanity-check smp_cpus and max_cpus against mc */
1122     if (ms->smp.cpus < mc->min_cpus) {
1123         error_setg(errp, "Invalid SMP CPUs %d. The min CPUs "
1124                    "supported by machine '%s' is %d",
1125                    ms->smp.cpus,
1126                    mc->name, mc->min_cpus);
1127         return false;
1128     } else if (ms->smp.max_cpus > mc->max_cpus) {
1129         error_setg(errp, "Invalid SMP CPUs %d. The max CPUs "
1130                    "supported by machine '%s' is %d",
1131                    current_machine->smp.max_cpus,
1132                    mc->name, mc->max_cpus);
1133         return false;
1134     }
1135     return true;
1136 }
1137 
1138 void machine_run_board_init(MachineState *machine)
1139 {
1140     MachineClass *machine_class = MACHINE_GET_CLASS(machine);
1141     ObjectClass *oc = object_class_by_name(machine->cpu_type);
1142     CPUClass *cc;
1143 
1144     /* This checkpoint is required by replay to separate prior clock
1145        reading from the other reads, because timer polling functions query
1146        clock values from the log. */
1147     replay_checkpoint(CHECKPOINT_INIT);
1148 
1149     if (machine->ram_memdev_id) {
1150         Object *o;
1151         o = object_resolve_path_type(machine->ram_memdev_id,
1152                                      TYPE_MEMORY_BACKEND, NULL);
1153         machine->ram = machine_consume_memdev(machine, MEMORY_BACKEND(o));
1154     }
1155 
1156     if (machine->numa_state) {
1157         numa_complete_configuration(machine);
1158         if (machine->numa_state->num_nodes) {
1159             machine_numa_finish_cpu_init(machine);
1160         }
1161     }
1162 
1163     /* If the machine supports the valid_cpu_types check and the user
1164      * specified a CPU with -cpu check here that the user CPU is supported.
1165      */
1166     if (machine_class->valid_cpu_types && machine->cpu_type) {
1167         int i;
1168 
1169         for (i = 0; machine_class->valid_cpu_types[i]; i++) {
1170             if (object_class_dynamic_cast(oc,
1171                                           machine_class->valid_cpu_types[i])) {
1172                 /* The user specificed CPU is in the valid field, we are
1173                  * good to go.
1174                  */
1175                 break;
1176             }
1177         }
1178 
1179         if (!machine_class->valid_cpu_types[i]) {
1180             /* The user specified CPU is not valid */
1181             error_report("Invalid CPU type: %s", machine->cpu_type);
1182             error_printf("The valid types are: %s",
1183                          machine_class->valid_cpu_types[0]);
1184             for (i = 1; machine_class->valid_cpu_types[i]; i++) {
1185                 error_printf(", %s", machine_class->valid_cpu_types[i]);
1186             }
1187             error_printf("\n");
1188 
1189             exit(1);
1190         }
1191     }
1192 
1193     /* Check if CPU type is deprecated and warn if so */
1194     cc = CPU_CLASS(oc);
1195     if (cc && cc->deprecation_note) {
1196         warn_report("CPU model %s is deprecated -- %s", machine->cpu_type,
1197                     cc->deprecation_note);
1198     }
1199 
1200     if (machine->cgs) {
1201         /*
1202          * With confidential guests, the host can't see the real
1203          * contents of RAM, so there's no point in it trying to merge
1204          * areas.
1205          */
1206         machine_set_mem_merge(OBJECT(machine), false, &error_abort);
1207 
1208         /*
1209          * Virtio devices can't count on directly accessing guest
1210          * memory, so they need iommu_platform=on to use normal DMA
1211          * mechanisms.  That requires also disabling legacy virtio
1212          * support for those virtio pci devices which allow it.
1213          */
1214         object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy",
1215                                    "on", true);
1216         object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform",
1217                                    "on", false);
1218     }
1219 
1220     machine_class->init(machine);
1221     phase_advance(PHASE_MACHINE_INITIALIZED);
1222 }
1223 
1224 static NotifierList machine_init_done_notifiers =
1225     NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers);
1226 
1227 void qemu_add_machine_init_done_notifier(Notifier *notify)
1228 {
1229     notifier_list_add(&machine_init_done_notifiers, notify);
1230     if (phase_check(PHASE_MACHINE_READY)) {
1231         notify->notify(notify, NULL);
1232     }
1233 }
1234 
1235 void qemu_remove_machine_init_done_notifier(Notifier *notify)
1236 {
1237     notifier_remove(notify);
1238 }
1239 
1240 void qdev_machine_creation_done(void)
1241 {
1242     cpu_synchronize_all_post_init();
1243 
1244     if (current_machine->boot_once) {
1245         qemu_boot_set(current_machine->boot_once, &error_fatal);
1246         qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_order));
1247     }
1248 
1249     /*
1250      * ok, initial machine setup is done, starting from now we can
1251      * only create hotpluggable devices
1252      */
1253     phase_advance(PHASE_MACHINE_READY);
1254     qdev_assert_realized_properly();
1255 
1256     /* TODO: once all bus devices are qdevified, this should be done
1257      * when bus is created by qdev.c */
1258     /*
1259      * TODO: If we had a main 'reset container' that the whole system
1260      * lived in, we could reset that using the multi-phase reset
1261      * APIs. For the moment, we just reset the sysbus, which will cause
1262      * all devices hanging off it (and all their child buses, recursively)
1263      * to be reset. Note that this will *not* reset any Device objects
1264      * which are not attached to some part of the qbus tree!
1265      */
1266     qemu_register_reset(resettable_cold_reset_fn, sysbus_get_default());
1267 
1268     notifier_list_notify(&machine_init_done_notifiers, NULL);
1269 
1270     if (rom_check_and_register_reset() != 0) {
1271         exit(1);
1272     }
1273 
1274     replay_start();
1275 
1276     /* This checkpoint is required by replay to separate prior clock
1277        reading from the other reads, because timer polling functions query
1278        clock values from the log. */
1279     replay_checkpoint(CHECKPOINT_RESET);
1280     qemu_system_reset(SHUTDOWN_CAUSE_NONE);
1281     register_global_state();
1282 }
1283 
1284 static const TypeInfo machine_info = {
1285     .name = TYPE_MACHINE,
1286     .parent = TYPE_OBJECT,
1287     .abstract = true,
1288     .class_size = sizeof(MachineClass),
1289     .class_init    = machine_class_init,
1290     .class_base_init = machine_class_base_init,
1291     .instance_size = sizeof(MachineState),
1292     .instance_init = machine_initfn,
1293     .instance_finalize = machine_finalize,
1294 };
1295 
1296 static void machine_register_types(void)
1297 {
1298     type_register_static(&machine_info);
1299 }
1300 
1301 type_init(machine_register_types)
1302