xref: /openbmc/qemu/hw/core/machine.c (revision 21063bce)
1 /*
2  * QEMU Machine
3  *
4  * Copyright (C) 2014 Red Hat Inc
5  *
6  * Authors:
7  *   Marcel Apfelbaum <marcel.a@redhat.com>
8  *
9  * This work is licensed under the terms of the GNU GPL, version 2 or later.
10  * See the COPYING file in the top-level directory.
11  */
12 
13 #include "qemu/osdep.h"
14 #include "qemu/option.h"
15 #include "qemu/accel.h"
16 #include "sysemu/replay.h"
17 #include "qemu/units.h"
18 #include "hw/boards.h"
19 #include "hw/loader.h"
20 #include "qapi/error.h"
21 #include "qapi/qapi-visit-common.h"
22 #include "qapi/qapi-visit-machine.h"
23 #include "qapi/visitor.h"
24 #include "qom/object_interfaces.h"
25 #include "hw/sysbus.h"
26 #include "sysemu/cpus.h"
27 #include "sysemu/sysemu.h"
28 #include "sysemu/reset.h"
29 #include "sysemu/runstate.h"
30 #include "sysemu/numa.h"
31 #include "sysemu/xen.h"
32 #include "qemu/error-report.h"
33 #include "sysemu/qtest.h"
34 #include "hw/pci/pci.h"
35 #include "hw/mem/nvdimm.h"
36 #include "migration/global_state.h"
37 #include "migration/vmstate.h"
38 #include "exec/confidential-guest-support.h"
39 #include "hw/virtio/virtio.h"
40 #include "hw/virtio/virtio-pci.h"
41 
42 GlobalProperty hw_compat_7_2[] = {
43     { "virtio-mem", "x-early-migration", "false" },
44 };
45 const size_t hw_compat_7_2_len = G_N_ELEMENTS(hw_compat_7_2);
46 
47 GlobalProperty hw_compat_7_1[] = {
48     { "virtio-device", "queue_reset", "false" },
49     { "virtio-rng-pci", "vectors", "0" },
50     { "virtio-rng-pci-transitional", "vectors", "0" },
51     { "virtio-rng-pci-non-transitional", "vectors", "0" },
52 };
53 const size_t hw_compat_7_1_len = G_N_ELEMENTS(hw_compat_7_1);
54 
55 GlobalProperty hw_compat_7_0[] = {
56     { "arm-gicv3-common", "force-8-bit-prio", "on" },
57     { "nvme-ns", "eui64-default", "on"},
58 };
59 const size_t hw_compat_7_0_len = G_N_ELEMENTS(hw_compat_7_0);
60 
61 GlobalProperty hw_compat_6_2[] = {
62     { "PIIX4_PM", "x-not-migrate-acpi-index", "on"},
63 };
64 const size_t hw_compat_6_2_len = G_N_ELEMENTS(hw_compat_6_2);
65 
66 GlobalProperty hw_compat_6_1[] = {
67     { "vhost-user-vsock-device", "seqpacket", "off" },
68     { "nvme-ns", "shared", "off" },
69 };
70 const size_t hw_compat_6_1_len = G_N_ELEMENTS(hw_compat_6_1);
71 
72 GlobalProperty hw_compat_6_0[] = {
73     { "gpex-pcihost", "allow-unmapped-accesses", "false" },
74     { "i8042", "extended-state", "false"},
75     { "nvme-ns", "eui64-default", "off"},
76     { "e1000", "init-vet", "off" },
77     { "e1000e", "init-vet", "off" },
78     { "vhost-vsock-device", "seqpacket", "off" },
79 };
80 const size_t hw_compat_6_0_len = G_N_ELEMENTS(hw_compat_6_0);
81 
82 GlobalProperty hw_compat_5_2[] = {
83     { "ICH9-LPC", "smm-compat", "on"},
84     { "PIIX4_PM", "smm-compat", "on"},
85     { "virtio-blk-device", "report-discard-granularity", "off" },
86     { "virtio-net-pci-base", "vectors", "3"},
87 };
88 const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2);
89 
90 GlobalProperty hw_compat_5_1[] = {
91     { "vhost-scsi", "num_queues", "1"},
92     { "vhost-user-blk", "num-queues", "1"},
93     { "vhost-user-scsi", "num_queues", "1"},
94     { "virtio-blk-device", "num-queues", "1"},
95     { "virtio-scsi-device", "num_queues", "1"},
96     { "nvme", "use-intel-id", "on"},
97     { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
98     { "pl011", "migrate-clk", "off" },
99     { "virtio-pci", "x-ats-page-aligned", "off"},
100 };
101 const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1);
102 
103 GlobalProperty hw_compat_5_0[] = {
104     { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
105     { "virtio-balloon-device", "page-poison", "false" },
106     { "vmport", "x-read-set-eax", "off" },
107     { "vmport", "x-signal-unsupported-cmd", "off" },
108     { "vmport", "x-report-vmx-type", "off" },
109     { "vmport", "x-cmds-v2", "off" },
110     { "virtio-device", "x-disable-legacy-check", "true" },
111 };
112 const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0);
113 
114 GlobalProperty hw_compat_4_2[] = {
115     { "virtio-blk-device", "queue-size", "128"},
116     { "virtio-scsi-device", "virtqueue_size", "128"},
117     { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
118     { "virtio-blk-device", "seg-max-adjust", "off"},
119     { "virtio-scsi-device", "seg_max_adjust", "off"},
120     { "vhost-blk-device", "seg_max_adjust", "off"},
121     { "usb-host", "suppress-remote-wake", "off" },
122     { "usb-redir", "suppress-remote-wake", "off" },
123     { "qxl", "revision", "4" },
124     { "qxl-vga", "revision", "4" },
125     { "fw_cfg", "acpi-mr-restore", "false" },
126     { "virtio-device", "use-disabled-flag", "false" },
127 };
128 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2);
129 
130 GlobalProperty hw_compat_4_1[] = {
131     { "virtio-pci", "x-pcie-flr-init", "off" },
132 };
133 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1);
134 
135 GlobalProperty hw_compat_4_0[] = {
136     { "VGA",            "edid", "false" },
137     { "secondary-vga",  "edid", "false" },
138     { "bochs-display",  "edid", "false" },
139     { "virtio-vga",     "edid", "false" },
140     { "virtio-gpu-device", "edid", "false" },
141     { "virtio-device", "use-started", "false" },
142     { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
143     { "pl031", "migrate-tick-offset", "false" },
144 };
145 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0);
146 
147 GlobalProperty hw_compat_3_1[] = {
148     { "pcie-root-port", "x-speed", "2_5" },
149     { "pcie-root-port", "x-width", "1" },
150     { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
151     { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
152     { "tpm-crb", "ppi", "false" },
153     { "tpm-tis", "ppi", "false" },
154     { "usb-kbd", "serial", "42" },
155     { "usb-mouse", "serial", "42" },
156     { "usb-tablet", "serial", "42" },
157     { "virtio-blk-device", "discard", "false" },
158     { "virtio-blk-device", "write-zeroes", "false" },
159     { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
160     { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
161 };
162 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1);
163 
164 GlobalProperty hw_compat_3_0[] = {};
165 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0);
166 
167 GlobalProperty hw_compat_2_12[] = {
168     { "migration", "decompress-error-check", "off" },
169     { "hda-audio", "use-timer", "false" },
170     { "cirrus-vga", "global-vmstate", "true" },
171     { "VGA", "global-vmstate", "true" },
172     { "vmware-svga", "global-vmstate", "true" },
173     { "qxl-vga", "global-vmstate", "true" },
174 };
175 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12);
176 
177 GlobalProperty hw_compat_2_11[] = {
178     { "hpet", "hpet-offset-saved", "false" },
179     { "virtio-blk-pci", "vectors", "2" },
180     { "vhost-user-blk-pci", "vectors", "2" },
181     { "e1000", "migrate_tso_props", "off" },
182 };
183 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11);
184 
185 GlobalProperty hw_compat_2_10[] = {
186     { "virtio-mouse-device", "wheel-axis", "false" },
187     { "virtio-tablet-device", "wheel-axis", "false" },
188 };
189 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10);
190 
191 GlobalProperty hw_compat_2_9[] = {
192     { "pci-bridge", "shpc", "off" },
193     { "intel-iommu", "pt", "off" },
194     { "virtio-net-device", "x-mtu-bypass-backend", "off" },
195     { "pcie-root-port", "x-migrate-msix", "false" },
196 };
197 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9);
198 
199 GlobalProperty hw_compat_2_8[] = {
200     { "fw_cfg_mem", "x-file-slots", "0x10" },
201     { "fw_cfg_io", "x-file-slots", "0x10" },
202     { "pflash_cfi01", "old-multiple-chip-handling", "on" },
203     { "pci-bridge", "shpc", "on" },
204     { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" },
205     { "virtio-pci", "x-pcie-deverr-init", "off" },
206     { "virtio-pci", "x-pcie-lnkctl-init", "off" },
207     { "virtio-pci", "x-pcie-pm-init", "off" },
208     { "cirrus-vga", "vgamem_mb", "8" },
209     { "isa-cirrus-vga", "vgamem_mb", "8" },
210 };
211 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8);
212 
213 GlobalProperty hw_compat_2_7[] = {
214     { "virtio-pci", "page-per-vq", "on" },
215     { "virtio-serial-device", "emergency-write", "off" },
216     { "ioapic", "version", "0x11" },
217     { "intel-iommu", "x-buggy-eim", "true" },
218     { "virtio-pci", "x-ignore-backend-features", "on" },
219 };
220 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7);
221 
222 GlobalProperty hw_compat_2_6[] = {
223     { "virtio-mmio", "format_transport_address", "off" },
224     /* Optional because not all virtio-pci devices support legacy mode */
225     { "virtio-pci", "disable-modern", "on",  .optional = true },
226     { "virtio-pci", "disable-legacy", "off", .optional = true },
227 };
228 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6);
229 
230 GlobalProperty hw_compat_2_5[] = {
231     { "isa-fdc", "fallback", "144" },
232     { "pvscsi", "x-old-pci-configuration", "on" },
233     { "pvscsi", "x-disable-pcie", "on" },
234     { "vmxnet3", "x-old-msi-offsets", "on" },
235     { "vmxnet3", "x-disable-pcie", "on" },
236 };
237 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5);
238 
239 GlobalProperty hw_compat_2_4[] = {
240     /* Optional because the 'scsi' property is Linux-only */
241     { "virtio-blk-device", "scsi", "true", .optional = true },
242     { "e1000", "extra_mac_registers", "off" },
243     { "virtio-pci", "x-disable-pcie", "on" },
244     { "virtio-pci", "migrate-extra", "off" },
245     { "fw_cfg_mem", "dma_enabled", "off" },
246     { "fw_cfg_io", "dma_enabled", "off" }
247 };
248 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4);
249 
250 GlobalProperty hw_compat_2_3[] = {
251     { "virtio-blk-pci", "any_layout", "off" },
252     { "virtio-balloon-pci", "any_layout", "off" },
253     { "virtio-serial-pci", "any_layout", "off" },
254     { "virtio-9p-pci", "any_layout", "off" },
255     { "virtio-rng-pci", "any_layout", "off" },
256     { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" },
257     { "migration", "send-configuration", "off" },
258     { "migration", "send-section-footer", "off" },
259     { "migration", "store-global-state", "off" },
260 };
261 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3);
262 
263 GlobalProperty hw_compat_2_2[] = {};
264 const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2);
265 
266 GlobalProperty hw_compat_2_1[] = {
267     { "intel-hda", "old_msi_addr", "on" },
268     { "VGA", "qemu-extended-regs", "off" },
269     { "secondary-vga", "qemu-extended-regs", "off" },
270     { "virtio-scsi-pci", "any_layout", "off" },
271     { "usb-mouse", "usb_version", "1" },
272     { "usb-kbd", "usb_version", "1" },
273     { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
274 };
275 const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1);
276 
277 MachineState *current_machine;
278 
279 static char *machine_get_kernel(Object *obj, Error **errp)
280 {
281     MachineState *ms = MACHINE(obj);
282 
283     return g_strdup(ms->kernel_filename);
284 }
285 
286 static void machine_set_kernel(Object *obj, const char *value, Error **errp)
287 {
288     MachineState *ms = MACHINE(obj);
289 
290     g_free(ms->kernel_filename);
291     ms->kernel_filename = g_strdup(value);
292 }
293 
294 static char *machine_get_initrd(Object *obj, Error **errp)
295 {
296     MachineState *ms = MACHINE(obj);
297 
298     return g_strdup(ms->initrd_filename);
299 }
300 
301 static void machine_set_initrd(Object *obj, const char *value, Error **errp)
302 {
303     MachineState *ms = MACHINE(obj);
304 
305     g_free(ms->initrd_filename);
306     ms->initrd_filename = g_strdup(value);
307 }
308 
309 static char *machine_get_append(Object *obj, Error **errp)
310 {
311     MachineState *ms = MACHINE(obj);
312 
313     return g_strdup(ms->kernel_cmdline);
314 }
315 
316 static void machine_set_append(Object *obj, const char *value, Error **errp)
317 {
318     MachineState *ms = MACHINE(obj);
319 
320     g_free(ms->kernel_cmdline);
321     ms->kernel_cmdline = g_strdup(value);
322 }
323 
324 static char *machine_get_dtb(Object *obj, Error **errp)
325 {
326     MachineState *ms = MACHINE(obj);
327 
328     return g_strdup(ms->dtb);
329 }
330 
331 static void machine_set_dtb(Object *obj, const char *value, Error **errp)
332 {
333     MachineState *ms = MACHINE(obj);
334 
335     g_free(ms->dtb);
336     ms->dtb = g_strdup(value);
337 }
338 
339 static char *machine_get_dumpdtb(Object *obj, Error **errp)
340 {
341     MachineState *ms = MACHINE(obj);
342 
343     return g_strdup(ms->dumpdtb);
344 }
345 
346 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp)
347 {
348     MachineState *ms = MACHINE(obj);
349 
350     g_free(ms->dumpdtb);
351     ms->dumpdtb = g_strdup(value);
352 }
353 
354 static void machine_get_phandle_start(Object *obj, Visitor *v,
355                                       const char *name, void *opaque,
356                                       Error **errp)
357 {
358     MachineState *ms = MACHINE(obj);
359     int64_t value = ms->phandle_start;
360 
361     visit_type_int(v, name, &value, errp);
362 }
363 
364 static void machine_set_phandle_start(Object *obj, Visitor *v,
365                                       const char *name, void *opaque,
366                                       Error **errp)
367 {
368     MachineState *ms = MACHINE(obj);
369     int64_t value;
370 
371     if (!visit_type_int(v, name, &value, errp)) {
372         return;
373     }
374 
375     ms->phandle_start = value;
376 }
377 
378 static char *machine_get_dt_compatible(Object *obj, Error **errp)
379 {
380     MachineState *ms = MACHINE(obj);
381 
382     return g_strdup(ms->dt_compatible);
383 }
384 
385 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp)
386 {
387     MachineState *ms = MACHINE(obj);
388 
389     g_free(ms->dt_compatible);
390     ms->dt_compatible = g_strdup(value);
391 }
392 
393 static bool machine_get_dump_guest_core(Object *obj, Error **errp)
394 {
395     MachineState *ms = MACHINE(obj);
396 
397     return ms->dump_guest_core;
398 }
399 
400 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp)
401 {
402     MachineState *ms = MACHINE(obj);
403 
404     ms->dump_guest_core = value;
405 }
406 
407 static bool machine_get_mem_merge(Object *obj, Error **errp)
408 {
409     MachineState *ms = MACHINE(obj);
410 
411     return ms->mem_merge;
412 }
413 
414 static void machine_set_mem_merge(Object *obj, bool value, Error **errp)
415 {
416     MachineState *ms = MACHINE(obj);
417 
418     ms->mem_merge = value;
419 }
420 
421 static bool machine_get_usb(Object *obj, Error **errp)
422 {
423     MachineState *ms = MACHINE(obj);
424 
425     return ms->usb;
426 }
427 
428 static void machine_set_usb(Object *obj, bool value, Error **errp)
429 {
430     MachineState *ms = MACHINE(obj);
431 
432     ms->usb = value;
433     ms->usb_disabled = !value;
434 }
435 
436 static bool machine_get_graphics(Object *obj, Error **errp)
437 {
438     MachineState *ms = MACHINE(obj);
439 
440     return ms->enable_graphics;
441 }
442 
443 static void machine_set_graphics(Object *obj, bool value, Error **errp)
444 {
445     MachineState *ms = MACHINE(obj);
446 
447     ms->enable_graphics = value;
448 }
449 
450 static char *machine_get_firmware(Object *obj, Error **errp)
451 {
452     MachineState *ms = MACHINE(obj);
453 
454     return g_strdup(ms->firmware);
455 }
456 
457 static void machine_set_firmware(Object *obj, const char *value, Error **errp)
458 {
459     MachineState *ms = MACHINE(obj);
460 
461     g_free(ms->firmware);
462     ms->firmware = g_strdup(value);
463 }
464 
465 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp)
466 {
467     MachineState *ms = MACHINE(obj);
468 
469     ms->suppress_vmdesc = value;
470 }
471 
472 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp)
473 {
474     MachineState *ms = MACHINE(obj);
475 
476     return ms->suppress_vmdesc;
477 }
478 
479 static char *machine_get_memory_encryption(Object *obj, Error **errp)
480 {
481     MachineState *ms = MACHINE(obj);
482 
483     if (ms->cgs) {
484         return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs)));
485     }
486 
487     return NULL;
488 }
489 
490 static void machine_set_memory_encryption(Object *obj, const char *value,
491                                         Error **errp)
492 {
493     Object *cgs =
494         object_resolve_path_component(object_get_objects_root(), value);
495 
496     if (!cgs) {
497         error_setg(errp, "No such memory encryption object '%s'", value);
498         return;
499     }
500 
501     object_property_set_link(obj, "confidential-guest-support", cgs, errp);
502 }
503 
504 static void machine_check_confidential_guest_support(const Object *obj,
505                                                      const char *name,
506                                                      Object *new_target,
507                                                      Error **errp)
508 {
509     /*
510      * So far the only constraint is that the target has the
511      * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked
512      * by the QOM core
513      */
514 }
515 
516 static bool machine_get_nvdimm(Object *obj, Error **errp)
517 {
518     MachineState *ms = MACHINE(obj);
519 
520     return ms->nvdimms_state->is_enabled;
521 }
522 
523 static void machine_set_nvdimm(Object *obj, bool value, Error **errp)
524 {
525     MachineState *ms = MACHINE(obj);
526 
527     ms->nvdimms_state->is_enabled = value;
528 }
529 
530 static bool machine_get_hmat(Object *obj, Error **errp)
531 {
532     MachineState *ms = MACHINE(obj);
533 
534     return ms->numa_state->hmat_enabled;
535 }
536 
537 static void machine_set_hmat(Object *obj, bool value, Error **errp)
538 {
539     MachineState *ms = MACHINE(obj);
540 
541     ms->numa_state->hmat_enabled = value;
542 }
543 
544 static void machine_get_mem(Object *obj, Visitor *v, const char *name,
545                             void *opaque, Error **errp)
546 {
547     MachineState *ms = MACHINE(obj);
548     MemorySizeConfiguration mem = {
549         .has_size = true,
550         .size = ms->ram_size,
551         .has_max_size = !!ms->ram_slots,
552         .max_size = ms->maxram_size,
553         .has_slots = !!ms->ram_slots,
554         .slots = ms->ram_slots,
555     };
556     MemorySizeConfiguration *p_mem = &mem;
557 
558     visit_type_MemorySizeConfiguration(v, name, &p_mem, &error_abort);
559 }
560 
561 static void machine_set_mem(Object *obj, Visitor *v, const char *name,
562                             void *opaque, Error **errp)
563 {
564     ERRP_GUARD();
565     MachineState *ms = MACHINE(obj);
566     MachineClass *mc = MACHINE_GET_CLASS(obj);
567     MemorySizeConfiguration *mem;
568 
569     if (!visit_type_MemorySizeConfiguration(v, name, &mem, errp)) {
570         return;
571     }
572 
573     if (!mem->has_size) {
574         mem->has_size = true;
575         mem->size = mc->default_ram_size;
576     }
577     mem->size = QEMU_ALIGN_UP(mem->size, 8192);
578     if (mc->fixup_ram_size) {
579         mem->size = mc->fixup_ram_size(mem->size);
580     }
581     if ((ram_addr_t)mem->size != mem->size) {
582         error_setg(errp, "ram size too large");
583         goto out_free;
584     }
585 
586     if (mem->has_max_size) {
587         if (mem->max_size < mem->size) {
588             error_setg(errp, "invalid value of maxmem: "
589                        "maximum memory size (0x%" PRIx64 ") must be at least "
590                        "the initial memory size (0x%" PRIx64 ")",
591                        mem->max_size, mem->size);
592             goto out_free;
593         }
594         if (mem->has_slots && mem->slots && mem->max_size == mem->size) {
595             error_setg(errp, "invalid value of maxmem: "
596                        "memory slots were specified but maximum memory size "
597                        "(0x%" PRIx64 ") is equal to the initial memory size "
598                        "(0x%" PRIx64 ")", mem->max_size, mem->size);
599             goto out_free;
600         }
601         ms->maxram_size = mem->max_size;
602     } else {
603         if (mem->has_slots) {
604             error_setg(errp, "slots specified but no max-size");
605             goto out_free;
606         }
607         ms->maxram_size = mem->size;
608     }
609     ms->ram_size = mem->size;
610     ms->ram_slots = mem->has_slots ? mem->slots : 0;
611 out_free:
612     qapi_free_MemorySizeConfiguration(mem);
613 }
614 
615 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp)
616 {
617     MachineState *ms = MACHINE(obj);
618 
619     return g_strdup(ms->nvdimms_state->persistence_string);
620 }
621 
622 static void machine_set_nvdimm_persistence(Object *obj, const char *value,
623                                            Error **errp)
624 {
625     MachineState *ms = MACHINE(obj);
626     NVDIMMState *nvdimms_state = ms->nvdimms_state;
627 
628     if (strcmp(value, "cpu") == 0) {
629         nvdimms_state->persistence = 3;
630     } else if (strcmp(value, "mem-ctrl") == 0) {
631         nvdimms_state->persistence = 2;
632     } else {
633         error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option",
634                    value);
635         return;
636     }
637 
638     g_free(nvdimms_state->persistence_string);
639     nvdimms_state->persistence_string = g_strdup(value);
640 }
641 
642 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type)
643 {
644     QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type));
645 }
646 
647 bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev)
648 {
649     Object *obj = OBJECT(dev);
650 
651     if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) {
652         return false;
653     }
654 
655     return device_type_is_dynamic_sysbus(mc, object_get_typename(obj));
656 }
657 
658 bool device_type_is_dynamic_sysbus(MachineClass *mc, const char *type)
659 {
660     bool allowed = false;
661     strList *wl;
662     ObjectClass *klass = object_class_by_name(type);
663 
664     for (wl = mc->allowed_dynamic_sysbus_devices;
665          !allowed && wl;
666          wl = wl->next) {
667         allowed |= !!object_class_dynamic_cast(klass, wl->value);
668     }
669 
670     return allowed;
671 }
672 
673 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine)
674 {
675     int i;
676     HotpluggableCPUList *head = NULL;
677     MachineClass *mc = MACHINE_GET_CLASS(machine);
678 
679     /* force board to initialize possible_cpus if it hasn't been done yet */
680     mc->possible_cpu_arch_ids(machine);
681 
682     for (i = 0; i < machine->possible_cpus->len; i++) {
683         Object *cpu;
684         HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1);
685 
686         cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type);
687         cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count;
688         cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props,
689                                    sizeof(*cpu_item->props));
690 
691         cpu = machine->possible_cpus->cpus[i].cpu;
692         if (cpu) {
693             cpu_item->qom_path = object_get_canonical_path(cpu);
694         }
695         QAPI_LIST_PREPEND(head, cpu_item);
696     }
697     return head;
698 }
699 
700 /**
701  * machine_set_cpu_numa_node:
702  * @machine: machine object to modify
703  * @props: specifies which cpu objects to assign to
704  *         numa node specified by @props.node_id
705  * @errp: if an error occurs, a pointer to an area to store the error
706  *
707  * Associate NUMA node specified by @props.node_id with cpu slots that
708  * match socket/core/thread-ids specified by @props. It's recommended to use
709  * query-hotpluggable-cpus.props values to specify affected cpu slots,
710  * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
711  *
712  * However for CLI convenience it's possible to pass in subset of properties,
713  * which would affect all cpu slots that match it.
714  * Ex for pc machine:
715  *    -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
716  *    -numa cpu,node-id=0,socket_id=0 \
717  *    -numa cpu,node-id=1,socket_id=1
718  * will assign all child cores of socket 0 to node 0 and
719  * of socket 1 to node 1.
720  *
721  * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
722  * return error.
723  * Empty subset is disallowed and function will return with error in this case.
724  */
725 void machine_set_cpu_numa_node(MachineState *machine,
726                                const CpuInstanceProperties *props, Error **errp)
727 {
728     MachineClass *mc = MACHINE_GET_CLASS(machine);
729     NodeInfo *numa_info = machine->numa_state->nodes;
730     bool match = false;
731     int i;
732 
733     if (!mc->possible_cpu_arch_ids) {
734         error_setg(errp, "mapping of CPUs to NUMA node is not supported");
735         return;
736     }
737 
738     /* disabling node mapping is not supported, forbid it */
739     assert(props->has_node_id);
740 
741     /* force board to initialize possible_cpus if it hasn't been done yet */
742     mc->possible_cpu_arch_ids(machine);
743 
744     for (i = 0; i < machine->possible_cpus->len; i++) {
745         CPUArchId *slot = &machine->possible_cpus->cpus[i];
746 
747         /* reject unsupported by board properties */
748         if (props->has_thread_id && !slot->props.has_thread_id) {
749             error_setg(errp, "thread-id is not supported");
750             return;
751         }
752 
753         if (props->has_core_id && !slot->props.has_core_id) {
754             error_setg(errp, "core-id is not supported");
755             return;
756         }
757 
758         if (props->has_cluster_id && !slot->props.has_cluster_id) {
759             error_setg(errp, "cluster-id is not supported");
760             return;
761         }
762 
763         if (props->has_socket_id && !slot->props.has_socket_id) {
764             error_setg(errp, "socket-id is not supported");
765             return;
766         }
767 
768         if (props->has_die_id && !slot->props.has_die_id) {
769             error_setg(errp, "die-id is not supported");
770             return;
771         }
772 
773         /* skip slots with explicit mismatch */
774         if (props->has_thread_id && props->thread_id != slot->props.thread_id) {
775                 continue;
776         }
777 
778         if (props->has_core_id && props->core_id != slot->props.core_id) {
779                 continue;
780         }
781 
782         if (props->has_cluster_id &&
783             props->cluster_id != slot->props.cluster_id) {
784                 continue;
785         }
786 
787         if (props->has_die_id && props->die_id != slot->props.die_id) {
788                 continue;
789         }
790 
791         if (props->has_socket_id && props->socket_id != slot->props.socket_id) {
792                 continue;
793         }
794 
795         /* reject assignment if slot is already assigned, for compatibility
796          * of legacy cpu_index mapping with SPAPR core based mapping do not
797          * error out if cpu thread and matched core have the same node-id */
798         if (slot->props.has_node_id &&
799             slot->props.node_id != props->node_id) {
800             error_setg(errp, "CPU is already assigned to node-id: %" PRId64,
801                        slot->props.node_id);
802             return;
803         }
804 
805         /* assign slot to node as it's matched '-numa cpu' key */
806         match = true;
807         slot->props.node_id = props->node_id;
808         slot->props.has_node_id = props->has_node_id;
809 
810         if (machine->numa_state->hmat_enabled) {
811             if ((numa_info[props->node_id].initiator < MAX_NODES) &&
812                 (props->node_id != numa_info[props->node_id].initiator)) {
813                 error_setg(errp, "The initiator of CPU NUMA node %" PRId64
814                            " should be itself (got %" PRIu16 ")",
815                            props->node_id, numa_info[props->node_id].initiator);
816                 return;
817             }
818             numa_info[props->node_id].has_cpu = true;
819             numa_info[props->node_id].initiator = props->node_id;
820         }
821     }
822 
823     if (!match) {
824         error_setg(errp, "no match found");
825     }
826 }
827 
828 static void machine_get_smp(Object *obj, Visitor *v, const char *name,
829                             void *opaque, Error **errp)
830 {
831     MachineState *ms = MACHINE(obj);
832     SMPConfiguration *config = &(SMPConfiguration){
833         .has_cpus = true, .cpus = ms->smp.cpus,
834         .has_sockets = true, .sockets = ms->smp.sockets,
835         .has_dies = true, .dies = ms->smp.dies,
836         .has_clusters = true, .clusters = ms->smp.clusters,
837         .has_cores = true, .cores = ms->smp.cores,
838         .has_threads = true, .threads = ms->smp.threads,
839         .has_maxcpus = true, .maxcpus = ms->smp.max_cpus,
840     };
841 
842     if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) {
843         return;
844     }
845 }
846 
847 static void machine_set_smp(Object *obj, Visitor *v, const char *name,
848                             void *opaque, Error **errp)
849 {
850     MachineState *ms = MACHINE(obj);
851     g_autoptr(SMPConfiguration) config = NULL;
852 
853     if (!visit_type_SMPConfiguration(v, name, &config, errp)) {
854         return;
855     }
856 
857     machine_parse_smp_config(ms, config, errp);
858 }
859 
860 static void machine_get_boot(Object *obj, Visitor *v, const char *name,
861                             void *opaque, Error **errp)
862 {
863     MachineState *ms = MACHINE(obj);
864     BootConfiguration *config = &ms->boot_config;
865     visit_type_BootConfiguration(v, name, &config, &error_abort);
866 }
867 
868 static void machine_free_boot_config(MachineState *ms)
869 {
870     g_free(ms->boot_config.order);
871     g_free(ms->boot_config.once);
872     g_free(ms->boot_config.splash);
873 }
874 
875 static void machine_copy_boot_config(MachineState *ms, BootConfiguration *config)
876 {
877     MachineClass *machine_class = MACHINE_GET_CLASS(ms);
878 
879     machine_free_boot_config(ms);
880     ms->boot_config = *config;
881     if (!config->order) {
882         ms->boot_config.order = g_strdup(machine_class->default_boot_order);
883     }
884 }
885 
886 static void machine_set_boot(Object *obj, Visitor *v, const char *name,
887                             void *opaque, Error **errp)
888 {
889     ERRP_GUARD();
890     MachineState *ms = MACHINE(obj);
891     BootConfiguration *config = NULL;
892 
893     if (!visit_type_BootConfiguration(v, name, &config, errp)) {
894         return;
895     }
896     if (config->order) {
897         validate_bootdevices(config->order, errp);
898         if (*errp) {
899             goto out_free;
900         }
901     }
902     if (config->once) {
903         validate_bootdevices(config->once, errp);
904         if (*errp) {
905             goto out_free;
906         }
907     }
908 
909     machine_copy_boot_config(ms, config);
910     /* Strings live in ms->boot_config.  */
911     free(config);
912     return;
913 
914 out_free:
915     qapi_free_BootConfiguration(config);
916 }
917 
918 static void machine_class_init(ObjectClass *oc, void *data)
919 {
920     MachineClass *mc = MACHINE_CLASS(oc);
921 
922     /* Default 128 MB as guest ram size */
923     mc->default_ram_size = 128 * MiB;
924     mc->rom_file_has_mr = true;
925 
926     /* numa node memory size aligned on 8MB by default.
927      * On Linux, each node's border has to be 8MB aligned
928      */
929     mc->numa_mem_align_shift = 23;
930 
931     object_class_property_add_str(oc, "kernel",
932         machine_get_kernel, machine_set_kernel);
933     object_class_property_set_description(oc, "kernel",
934         "Linux kernel image file");
935 
936     object_class_property_add_str(oc, "initrd",
937         machine_get_initrd, machine_set_initrd);
938     object_class_property_set_description(oc, "initrd",
939         "Linux initial ramdisk file");
940 
941     object_class_property_add_str(oc, "append",
942         machine_get_append, machine_set_append);
943     object_class_property_set_description(oc, "append",
944         "Linux kernel command line");
945 
946     object_class_property_add_str(oc, "dtb",
947         machine_get_dtb, machine_set_dtb);
948     object_class_property_set_description(oc, "dtb",
949         "Linux kernel device tree file");
950 
951     object_class_property_add_str(oc, "dumpdtb",
952         machine_get_dumpdtb, machine_set_dumpdtb);
953     object_class_property_set_description(oc, "dumpdtb",
954         "Dump current dtb to a file and quit");
955 
956     object_class_property_add(oc, "boot", "BootConfiguration",
957         machine_get_boot, machine_set_boot,
958         NULL, NULL);
959     object_class_property_set_description(oc, "boot",
960         "Boot configuration");
961 
962     object_class_property_add(oc, "smp", "SMPConfiguration",
963         machine_get_smp, machine_set_smp,
964         NULL, NULL);
965     object_class_property_set_description(oc, "smp",
966         "CPU topology");
967 
968     object_class_property_add(oc, "phandle-start", "int",
969         machine_get_phandle_start, machine_set_phandle_start,
970         NULL, NULL);
971     object_class_property_set_description(oc, "phandle-start",
972         "The first phandle ID we may generate dynamically");
973 
974     object_class_property_add_str(oc, "dt-compatible",
975         machine_get_dt_compatible, machine_set_dt_compatible);
976     object_class_property_set_description(oc, "dt-compatible",
977         "Overrides the \"compatible\" property of the dt root node");
978 
979     object_class_property_add_bool(oc, "dump-guest-core",
980         machine_get_dump_guest_core, machine_set_dump_guest_core);
981     object_class_property_set_description(oc, "dump-guest-core",
982         "Include guest memory in a core dump");
983 
984     object_class_property_add_bool(oc, "mem-merge",
985         machine_get_mem_merge, machine_set_mem_merge);
986     object_class_property_set_description(oc, "mem-merge",
987         "Enable/disable memory merge support");
988 
989     object_class_property_add_bool(oc, "usb",
990         machine_get_usb, machine_set_usb);
991     object_class_property_set_description(oc, "usb",
992         "Set on/off to enable/disable usb");
993 
994     object_class_property_add_bool(oc, "graphics",
995         machine_get_graphics, machine_set_graphics);
996     object_class_property_set_description(oc, "graphics",
997         "Set on/off to enable/disable graphics emulation");
998 
999     object_class_property_add_str(oc, "firmware",
1000         machine_get_firmware, machine_set_firmware);
1001     object_class_property_set_description(oc, "firmware",
1002         "Firmware image");
1003 
1004     object_class_property_add_bool(oc, "suppress-vmdesc",
1005         machine_get_suppress_vmdesc, machine_set_suppress_vmdesc);
1006     object_class_property_set_description(oc, "suppress-vmdesc",
1007         "Set on to disable self-describing migration");
1008 
1009     object_class_property_add_link(oc, "confidential-guest-support",
1010                                    TYPE_CONFIDENTIAL_GUEST_SUPPORT,
1011                                    offsetof(MachineState, cgs),
1012                                    machine_check_confidential_guest_support,
1013                                    OBJ_PROP_LINK_STRONG);
1014     object_class_property_set_description(oc, "confidential-guest-support",
1015                                           "Set confidential guest scheme to support");
1016 
1017     /* For compatibility */
1018     object_class_property_add_str(oc, "memory-encryption",
1019         machine_get_memory_encryption, machine_set_memory_encryption);
1020     object_class_property_set_description(oc, "memory-encryption",
1021         "Set memory encryption object to use");
1022 
1023     object_class_property_add_link(oc, "memory-backend", TYPE_MEMORY_BACKEND,
1024                                    offsetof(MachineState, memdev), object_property_allow_set_link,
1025                                    OBJ_PROP_LINK_STRONG);
1026     object_class_property_set_description(oc, "memory-backend",
1027                                           "Set RAM backend"
1028                                           "Valid value is ID of hostmem based backend");
1029 
1030     object_class_property_add(oc, "memory", "MemorySizeConfiguration",
1031         machine_get_mem, machine_set_mem,
1032         NULL, NULL);
1033     object_class_property_set_description(oc, "memory",
1034         "Memory size configuration");
1035 }
1036 
1037 static void machine_class_base_init(ObjectClass *oc, void *data)
1038 {
1039     MachineClass *mc = MACHINE_CLASS(oc);
1040     mc->max_cpus = mc->max_cpus ?: 1;
1041     mc->min_cpus = mc->min_cpus ?: 1;
1042     mc->default_cpus = mc->default_cpus ?: 1;
1043 
1044     if (!object_class_is_abstract(oc)) {
1045         const char *cname = object_class_get_name(oc);
1046         assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX));
1047         mc->name = g_strndup(cname,
1048                             strlen(cname) - strlen(TYPE_MACHINE_SUFFIX));
1049         mc->compat_props = g_ptr_array_new();
1050     }
1051 }
1052 
1053 static void machine_initfn(Object *obj)
1054 {
1055     MachineState *ms = MACHINE(obj);
1056     MachineClass *mc = MACHINE_GET_CLASS(obj);
1057 
1058     container_get(obj, "/peripheral");
1059     container_get(obj, "/peripheral-anon");
1060 
1061     ms->dump_guest_core = true;
1062     ms->mem_merge = true;
1063     ms->enable_graphics = true;
1064     ms->kernel_cmdline = g_strdup("");
1065     ms->ram_size = mc->default_ram_size;
1066     ms->maxram_size = mc->default_ram_size;
1067 
1068     if (mc->nvdimm_supported) {
1069         Object *obj = OBJECT(ms);
1070 
1071         ms->nvdimms_state = g_new0(NVDIMMState, 1);
1072         object_property_add_bool(obj, "nvdimm",
1073                                  machine_get_nvdimm, machine_set_nvdimm);
1074         object_property_set_description(obj, "nvdimm",
1075                                         "Set on/off to enable/disable "
1076                                         "NVDIMM instantiation");
1077 
1078         object_property_add_str(obj, "nvdimm-persistence",
1079                                 machine_get_nvdimm_persistence,
1080                                 machine_set_nvdimm_persistence);
1081         object_property_set_description(obj, "nvdimm-persistence",
1082                                         "Set NVDIMM persistence"
1083                                         "Valid values are cpu, mem-ctrl");
1084     }
1085 
1086     if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) {
1087         ms->numa_state = g_new0(NumaState, 1);
1088         object_property_add_bool(obj, "hmat",
1089                                  machine_get_hmat, machine_set_hmat);
1090         object_property_set_description(obj, "hmat",
1091                                         "Set on/off to enable/disable "
1092                                         "ACPI Heterogeneous Memory Attribute "
1093                                         "Table (HMAT)");
1094     }
1095 
1096     /* default to mc->default_cpus */
1097     ms->smp.cpus = mc->default_cpus;
1098     ms->smp.max_cpus = mc->default_cpus;
1099     ms->smp.sockets = 1;
1100     ms->smp.dies = 1;
1101     ms->smp.clusters = 1;
1102     ms->smp.cores = 1;
1103     ms->smp.threads = 1;
1104 
1105     machine_copy_boot_config(ms, &(BootConfiguration){ 0 });
1106 }
1107 
1108 static void machine_finalize(Object *obj)
1109 {
1110     MachineState *ms = MACHINE(obj);
1111 
1112     machine_free_boot_config(ms);
1113     g_free(ms->kernel_filename);
1114     g_free(ms->initrd_filename);
1115     g_free(ms->kernel_cmdline);
1116     g_free(ms->dtb);
1117     g_free(ms->dumpdtb);
1118     g_free(ms->dt_compatible);
1119     g_free(ms->firmware);
1120     g_free(ms->device_memory);
1121     g_free(ms->nvdimms_state);
1122     g_free(ms->numa_state);
1123 }
1124 
1125 bool machine_usb(MachineState *machine)
1126 {
1127     return machine->usb;
1128 }
1129 
1130 int machine_phandle_start(MachineState *machine)
1131 {
1132     return machine->phandle_start;
1133 }
1134 
1135 bool machine_dump_guest_core(MachineState *machine)
1136 {
1137     return machine->dump_guest_core;
1138 }
1139 
1140 bool machine_mem_merge(MachineState *machine)
1141 {
1142     return machine->mem_merge;
1143 }
1144 
1145 static char *cpu_slot_to_string(const CPUArchId *cpu)
1146 {
1147     GString *s = g_string_new(NULL);
1148     if (cpu->props.has_socket_id) {
1149         g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id);
1150     }
1151     if (cpu->props.has_die_id) {
1152         if (s->len) {
1153             g_string_append_printf(s, ", ");
1154         }
1155         g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id);
1156     }
1157     if (cpu->props.has_cluster_id) {
1158         if (s->len) {
1159             g_string_append_printf(s, ", ");
1160         }
1161         g_string_append_printf(s, "cluster-id: %"PRId64, cpu->props.cluster_id);
1162     }
1163     if (cpu->props.has_core_id) {
1164         if (s->len) {
1165             g_string_append_printf(s, ", ");
1166         }
1167         g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id);
1168     }
1169     if (cpu->props.has_thread_id) {
1170         if (s->len) {
1171             g_string_append_printf(s, ", ");
1172         }
1173         g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id);
1174     }
1175     return g_string_free(s, false);
1176 }
1177 
1178 static void numa_validate_initiator(NumaState *numa_state)
1179 {
1180     int i;
1181     NodeInfo *numa_info = numa_state->nodes;
1182 
1183     for (i = 0; i < numa_state->num_nodes; i++) {
1184         if (numa_info[i].initiator == MAX_NODES) {
1185             continue;
1186         }
1187 
1188         if (!numa_info[numa_info[i].initiator].present) {
1189             error_report("NUMA node %" PRIu16 " is missing, use "
1190                          "'-numa node' option to declare it first",
1191                          numa_info[i].initiator);
1192             exit(1);
1193         }
1194 
1195         if (!numa_info[numa_info[i].initiator].has_cpu) {
1196             error_report("The initiator of NUMA node %d is invalid", i);
1197             exit(1);
1198         }
1199     }
1200 }
1201 
1202 static void machine_numa_finish_cpu_init(MachineState *machine)
1203 {
1204     int i;
1205     bool default_mapping;
1206     GString *s = g_string_new(NULL);
1207     MachineClass *mc = MACHINE_GET_CLASS(machine);
1208     const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine);
1209 
1210     assert(machine->numa_state->num_nodes);
1211     for (i = 0; i < possible_cpus->len; i++) {
1212         if (possible_cpus->cpus[i].props.has_node_id) {
1213             break;
1214         }
1215     }
1216     default_mapping = (i == possible_cpus->len);
1217 
1218     for (i = 0; i < possible_cpus->len; i++) {
1219         const CPUArchId *cpu_slot = &possible_cpus->cpus[i];
1220 
1221         if (!cpu_slot->props.has_node_id) {
1222             /* fetch default mapping from board and enable it */
1223             CpuInstanceProperties props = cpu_slot->props;
1224 
1225             props.node_id = mc->get_default_cpu_node_id(machine, i);
1226             if (!default_mapping) {
1227                 /* record slots with not set mapping,
1228                  * TODO: make it hard error in future */
1229                 char *cpu_str = cpu_slot_to_string(cpu_slot);
1230                 g_string_append_printf(s, "%sCPU %d [%s]",
1231                                        s->len ? ", " : "", i, cpu_str);
1232                 g_free(cpu_str);
1233 
1234                 /* non mapped cpus used to fallback to node 0 */
1235                 props.node_id = 0;
1236             }
1237 
1238             props.has_node_id = true;
1239             machine_set_cpu_numa_node(machine, &props, &error_fatal);
1240         }
1241     }
1242 
1243     if (machine->numa_state->hmat_enabled) {
1244         numa_validate_initiator(machine->numa_state);
1245     }
1246 
1247     if (s->len && !qtest_enabled()) {
1248         warn_report("CPU(s) not present in any NUMA nodes: %s",
1249                     s->str);
1250         warn_report("All CPU(s) up to maxcpus should be described "
1251                     "in NUMA config, ability to start up with partial NUMA "
1252                     "mappings is obsoleted and will be removed in future");
1253     }
1254     g_string_free(s, true);
1255 }
1256 
1257 MemoryRegion *machine_consume_memdev(MachineState *machine,
1258                                      HostMemoryBackend *backend)
1259 {
1260     MemoryRegion *ret = host_memory_backend_get_memory(backend);
1261 
1262     if (host_memory_backend_is_mapped(backend)) {
1263         error_report("memory backend %s can't be used multiple times.",
1264                      object_get_canonical_path_component(OBJECT(backend)));
1265         exit(EXIT_FAILURE);
1266     }
1267     host_memory_backend_set_mapped(backend, true);
1268     vmstate_register_ram_global(ret);
1269     return ret;
1270 }
1271 
1272 static bool create_default_memdev(MachineState *ms, const char *path, Error **errp)
1273 {
1274     Object *obj;
1275     MachineClass *mc = MACHINE_GET_CLASS(ms);
1276     bool r = false;
1277 
1278     obj = object_new(path ? TYPE_MEMORY_BACKEND_FILE : TYPE_MEMORY_BACKEND_RAM);
1279     if (path) {
1280         if (!object_property_set_str(obj, "mem-path", path, errp)) {
1281             goto out;
1282         }
1283     }
1284     if (!object_property_set_int(obj, "size", ms->ram_size, errp)) {
1285         goto out;
1286     }
1287     object_property_add_child(object_get_objects_root(), mc->default_ram_id,
1288                               obj);
1289     /* Ensure backend's memory region name is equal to mc->default_ram_id */
1290     if (!object_property_set_bool(obj, "x-use-canonical-path-for-ramblock-id",
1291                              false, errp)) {
1292         goto out;
1293     }
1294     if (!user_creatable_complete(USER_CREATABLE(obj), errp)) {
1295         goto out;
1296     }
1297     r = object_property_set_link(OBJECT(ms), "memory-backend", obj, errp);
1298 
1299 out:
1300     object_unref(obj);
1301     return r;
1302 }
1303 
1304 
1305 void machine_run_board_init(MachineState *machine, const char *mem_path, Error **errp)
1306 {
1307     MachineClass *machine_class = MACHINE_GET_CLASS(machine);
1308     ObjectClass *oc = object_class_by_name(machine->cpu_type);
1309     CPUClass *cc;
1310 
1311     /* This checkpoint is required by replay to separate prior clock
1312        reading from the other reads, because timer polling functions query
1313        clock values from the log. */
1314     replay_checkpoint(CHECKPOINT_INIT);
1315 
1316     if (!xen_enabled()) {
1317         /* On 32-bit hosts, QEMU is limited by virtual address space */
1318         if (machine->ram_size > (2047 << 20) && HOST_LONG_BITS == 32) {
1319             error_setg(errp, "at most 2047 MB RAM can be simulated");
1320             return;
1321         }
1322     }
1323 
1324     if (machine->memdev) {
1325         ram_addr_t backend_size = object_property_get_uint(OBJECT(machine->memdev),
1326                                                            "size",  &error_abort);
1327         if (backend_size != machine->ram_size) {
1328             error_setg(errp, "Machine memory size does not match the size of the memory backend");
1329             return;
1330         }
1331     } else if (machine_class->default_ram_id && machine->ram_size &&
1332                numa_uses_legacy_mem()) {
1333         if (!create_default_memdev(current_machine, mem_path, errp)) {
1334             return;
1335         }
1336     }
1337 
1338     if (machine->numa_state) {
1339         numa_complete_configuration(machine);
1340         if (machine->numa_state->num_nodes) {
1341             machine_numa_finish_cpu_init(machine);
1342         }
1343     }
1344 
1345     if (!machine->ram && machine->memdev) {
1346         machine->ram = machine_consume_memdev(machine, machine->memdev);
1347     }
1348 
1349     /* If the machine supports the valid_cpu_types check and the user
1350      * specified a CPU with -cpu check here that the user CPU is supported.
1351      */
1352     if (machine_class->valid_cpu_types && machine->cpu_type) {
1353         int i;
1354 
1355         for (i = 0; machine_class->valid_cpu_types[i]; i++) {
1356             if (object_class_dynamic_cast(oc,
1357                                           machine_class->valid_cpu_types[i])) {
1358                 /* The user specificed CPU is in the valid field, we are
1359                  * good to go.
1360                  */
1361                 break;
1362             }
1363         }
1364 
1365         if (!machine_class->valid_cpu_types[i]) {
1366             /* The user specified CPU is not valid */
1367             error_report("Invalid CPU type: %s", machine->cpu_type);
1368             error_printf("The valid types are: %s",
1369                          machine_class->valid_cpu_types[0]);
1370             for (i = 1; machine_class->valid_cpu_types[i]; i++) {
1371                 error_printf(", %s", machine_class->valid_cpu_types[i]);
1372             }
1373             error_printf("\n");
1374 
1375             exit(1);
1376         }
1377     }
1378 
1379     /* Check if CPU type is deprecated and warn if so */
1380     cc = CPU_CLASS(oc);
1381     if (cc && cc->deprecation_note) {
1382         warn_report("CPU model %s is deprecated -- %s", machine->cpu_type,
1383                     cc->deprecation_note);
1384     }
1385 
1386     if (machine->cgs) {
1387         /*
1388          * With confidential guests, the host can't see the real
1389          * contents of RAM, so there's no point in it trying to merge
1390          * areas.
1391          */
1392         machine_set_mem_merge(OBJECT(machine), false, &error_abort);
1393 
1394         /*
1395          * Virtio devices can't count on directly accessing guest
1396          * memory, so they need iommu_platform=on to use normal DMA
1397          * mechanisms.  That requires also disabling legacy virtio
1398          * support for those virtio pci devices which allow it.
1399          */
1400         object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy",
1401                                    "on", true);
1402         object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform",
1403                                    "on", false);
1404     }
1405 
1406     accel_init_interfaces(ACCEL_GET_CLASS(machine->accelerator));
1407     machine_class->init(machine);
1408     phase_advance(PHASE_MACHINE_INITIALIZED);
1409 }
1410 
1411 static NotifierList machine_init_done_notifiers =
1412     NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers);
1413 
1414 void qemu_add_machine_init_done_notifier(Notifier *notify)
1415 {
1416     notifier_list_add(&machine_init_done_notifiers, notify);
1417     if (phase_check(PHASE_MACHINE_READY)) {
1418         notify->notify(notify, NULL);
1419     }
1420 }
1421 
1422 void qemu_remove_machine_init_done_notifier(Notifier *notify)
1423 {
1424     notifier_remove(notify);
1425 }
1426 
1427 void qdev_machine_creation_done(void)
1428 {
1429     cpu_synchronize_all_post_init();
1430 
1431     if (current_machine->boot_config.once) {
1432         qemu_boot_set(current_machine->boot_config.once, &error_fatal);
1433         qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_config.order));
1434     }
1435 
1436     /*
1437      * ok, initial machine setup is done, starting from now we can
1438      * only create hotpluggable devices
1439      */
1440     phase_advance(PHASE_MACHINE_READY);
1441     qdev_assert_realized_properly();
1442 
1443     /* TODO: once all bus devices are qdevified, this should be done
1444      * when bus is created by qdev.c */
1445     /*
1446      * TODO: If we had a main 'reset container' that the whole system
1447      * lived in, we could reset that using the multi-phase reset
1448      * APIs. For the moment, we just reset the sysbus, which will cause
1449      * all devices hanging off it (and all their child buses, recursively)
1450      * to be reset. Note that this will *not* reset any Device objects
1451      * which are not attached to some part of the qbus tree!
1452      */
1453     qemu_register_reset(resettable_cold_reset_fn, sysbus_get_default());
1454 
1455     notifier_list_notify(&machine_init_done_notifiers, NULL);
1456 
1457     if (rom_check_and_register_reset() != 0) {
1458         exit(1);
1459     }
1460 
1461     replay_start();
1462 
1463     /* This checkpoint is required by replay to separate prior clock
1464        reading from the other reads, because timer polling functions query
1465        clock values from the log. */
1466     replay_checkpoint(CHECKPOINT_RESET);
1467     qemu_system_reset(SHUTDOWN_CAUSE_NONE);
1468     register_global_state();
1469 }
1470 
1471 static const TypeInfo machine_info = {
1472     .name = TYPE_MACHINE,
1473     .parent = TYPE_OBJECT,
1474     .abstract = true,
1475     .class_size = sizeof(MachineClass),
1476     .class_init    = machine_class_init,
1477     .class_base_init = machine_class_base_init,
1478     .instance_size = sizeof(MachineState),
1479     .instance_init = machine_initfn,
1480     .instance_finalize = machine_finalize,
1481 };
1482 
1483 static void machine_register_types(void)
1484 {
1485     type_register_static(&machine_info);
1486 }
1487 
1488 type_init(machine_register_types)
1489