xref: /openbmc/qemu/hw/core/machine.c (revision 1580b897)
1 /*
2  * QEMU Machine
3  *
4  * Copyright (C) 2014 Red Hat Inc
5  *
6  * Authors:
7  *   Marcel Apfelbaum <marcel.a@redhat.com>
8  *
9  * This work is licensed under the terms of the GNU GPL, version 2 or later.
10  * See the COPYING file in the top-level directory.
11  */
12 
13 #include "qemu/osdep.h"
14 #include "qemu/option.h"
15 #include "qapi/qmp/qerror.h"
16 #include "sysemu/replay.h"
17 #include "qemu/units.h"
18 #include "hw/boards.h"
19 #include "hw/loader.h"
20 #include "qapi/error.h"
21 #include "qapi/qapi-visit-common.h"
22 #include "qapi/qapi-visit-machine.h"
23 #include "qapi/visitor.h"
24 #include "hw/sysbus.h"
25 #include "sysemu/cpus.h"
26 #include "sysemu/sysemu.h"
27 #include "sysemu/reset.h"
28 #include "sysemu/runstate.h"
29 #include "sysemu/numa.h"
30 #include "qemu/error-report.h"
31 #include "sysemu/qtest.h"
32 #include "hw/pci/pci.h"
33 #include "hw/mem/nvdimm.h"
34 #include "migration/global_state.h"
35 #include "migration/vmstate.h"
36 #include "exec/confidential-guest-support.h"
37 #include "hw/virtio/virtio.h"
38 #include "hw/virtio/virtio-pci.h"
39 
40 GlobalProperty hw_compat_6_0[] = {
41     { "gpex-pcihost", "allow-unmapped-accesses", "false" },
42     { "i8042", "extended-state", "false"},
43     { "nvme-ns", "eui64-default", "off"},
44 };
45 const size_t hw_compat_6_0_len = G_N_ELEMENTS(hw_compat_6_0);
46 
47 GlobalProperty hw_compat_5_2[] = {
48     { "ICH9-LPC", "smm-compat", "on"},
49     { "PIIX4_PM", "smm-compat", "on"},
50     { "virtio-blk-device", "report-discard-granularity", "off" },
51     { "virtio-net-pci", "vectors", "3"},
52 };
53 const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2);
54 
55 GlobalProperty hw_compat_5_1[] = {
56     { "vhost-scsi", "num_queues", "1"},
57     { "vhost-user-blk", "num-queues", "1"},
58     { "vhost-user-scsi", "num_queues", "1"},
59     { "virtio-blk-device", "num-queues", "1"},
60     { "virtio-scsi-device", "num_queues", "1"},
61     { "nvme", "use-intel-id", "on"},
62     { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
63     { "pl011", "migrate-clk", "off" },
64     { "virtio-pci", "x-ats-page-aligned", "off"},
65 };
66 const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1);
67 
68 GlobalProperty hw_compat_5_0[] = {
69     { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
70     { "virtio-balloon-device", "page-poison", "false" },
71     { "vmport", "x-read-set-eax", "off" },
72     { "vmport", "x-signal-unsupported-cmd", "off" },
73     { "vmport", "x-report-vmx-type", "off" },
74     { "vmport", "x-cmds-v2", "off" },
75     { "virtio-device", "x-disable-legacy-check", "true" },
76 };
77 const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0);
78 
79 GlobalProperty hw_compat_4_2[] = {
80     { "virtio-blk-device", "queue-size", "128"},
81     { "virtio-scsi-device", "virtqueue_size", "128"},
82     { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
83     { "virtio-blk-device", "seg-max-adjust", "off"},
84     { "virtio-scsi-device", "seg_max_adjust", "off"},
85     { "vhost-blk-device", "seg_max_adjust", "off"},
86     { "usb-host", "suppress-remote-wake", "off" },
87     { "usb-redir", "suppress-remote-wake", "off" },
88     { "qxl", "revision", "4" },
89     { "qxl-vga", "revision", "4" },
90     { "fw_cfg", "acpi-mr-restore", "false" },
91     { "virtio-device", "use-disabled-flag", "false" },
92 };
93 const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2);
94 
95 GlobalProperty hw_compat_4_1[] = {
96     { "virtio-pci", "x-pcie-flr-init", "off" },
97 };
98 const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1);
99 
100 GlobalProperty hw_compat_4_0[] = {
101     { "VGA",            "edid", "false" },
102     { "secondary-vga",  "edid", "false" },
103     { "bochs-display",  "edid", "false" },
104     { "virtio-vga",     "edid", "false" },
105     { "virtio-gpu-device", "edid", "false" },
106     { "virtio-device", "use-started", "false" },
107     { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
108     { "pl031", "migrate-tick-offset", "false" },
109 };
110 const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0);
111 
112 GlobalProperty hw_compat_3_1[] = {
113     { "pcie-root-port", "x-speed", "2_5" },
114     { "pcie-root-port", "x-width", "1" },
115     { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
116     { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
117     { "tpm-crb", "ppi", "false" },
118     { "tpm-tis", "ppi", "false" },
119     { "usb-kbd", "serial", "42" },
120     { "usb-mouse", "serial", "42" },
121     { "usb-tablet", "serial", "42" },
122     { "virtio-blk-device", "discard", "false" },
123     { "virtio-blk-device", "write-zeroes", "false" },
124     { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
125     { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
126 };
127 const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1);
128 
129 GlobalProperty hw_compat_3_0[] = {};
130 const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0);
131 
132 GlobalProperty hw_compat_2_12[] = {
133     { "migration", "decompress-error-check", "off" },
134     { "hda-audio", "use-timer", "false" },
135     { "cirrus-vga", "global-vmstate", "true" },
136     { "VGA", "global-vmstate", "true" },
137     { "vmware-svga", "global-vmstate", "true" },
138     { "qxl-vga", "global-vmstate", "true" },
139 };
140 const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12);
141 
142 GlobalProperty hw_compat_2_11[] = {
143     { "hpet", "hpet-offset-saved", "false" },
144     { "virtio-blk-pci", "vectors", "2" },
145     { "vhost-user-blk-pci", "vectors", "2" },
146     { "e1000", "migrate_tso_props", "off" },
147 };
148 const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11);
149 
150 GlobalProperty hw_compat_2_10[] = {
151     { "virtio-mouse-device", "wheel-axis", "false" },
152     { "virtio-tablet-device", "wheel-axis", "false" },
153 };
154 const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10);
155 
156 GlobalProperty hw_compat_2_9[] = {
157     { "pci-bridge", "shpc", "off" },
158     { "intel-iommu", "pt", "off" },
159     { "virtio-net-device", "x-mtu-bypass-backend", "off" },
160     { "pcie-root-port", "x-migrate-msix", "false" },
161 };
162 const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9);
163 
164 GlobalProperty hw_compat_2_8[] = {
165     { "fw_cfg_mem", "x-file-slots", "0x10" },
166     { "fw_cfg_io", "x-file-slots", "0x10" },
167     { "pflash_cfi01", "old-multiple-chip-handling", "on" },
168     { "pci-bridge", "shpc", "on" },
169     { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" },
170     { "virtio-pci", "x-pcie-deverr-init", "off" },
171     { "virtio-pci", "x-pcie-lnkctl-init", "off" },
172     { "virtio-pci", "x-pcie-pm-init", "off" },
173     { "cirrus-vga", "vgamem_mb", "8" },
174     { "isa-cirrus-vga", "vgamem_mb", "8" },
175 };
176 const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8);
177 
178 GlobalProperty hw_compat_2_7[] = {
179     { "virtio-pci", "page-per-vq", "on" },
180     { "virtio-serial-device", "emergency-write", "off" },
181     { "ioapic", "version", "0x11" },
182     { "intel-iommu", "x-buggy-eim", "true" },
183     { "virtio-pci", "x-ignore-backend-features", "on" },
184 };
185 const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7);
186 
187 GlobalProperty hw_compat_2_6[] = {
188     { "virtio-mmio", "format_transport_address", "off" },
189     /* Optional because not all virtio-pci devices support legacy mode */
190     { "virtio-pci", "disable-modern", "on",  .optional = true },
191     { "virtio-pci", "disable-legacy", "off", .optional = true },
192 };
193 const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6);
194 
195 GlobalProperty hw_compat_2_5[] = {
196     { "isa-fdc", "fallback", "144" },
197     { "pvscsi", "x-old-pci-configuration", "on" },
198     { "pvscsi", "x-disable-pcie", "on" },
199     { "vmxnet3", "x-old-msi-offsets", "on" },
200     { "vmxnet3", "x-disable-pcie", "on" },
201 };
202 const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5);
203 
204 GlobalProperty hw_compat_2_4[] = {
205     /* Optional because the 'scsi' property is Linux-only */
206     { "virtio-blk-device", "scsi", "true", .optional = true },
207     { "e1000", "extra_mac_registers", "off" },
208     { "virtio-pci", "x-disable-pcie", "on" },
209     { "virtio-pci", "migrate-extra", "off" },
210     { "fw_cfg_mem", "dma_enabled", "off" },
211     { "fw_cfg_io", "dma_enabled", "off" }
212 };
213 const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4);
214 
215 GlobalProperty hw_compat_2_3[] = {
216     { "virtio-blk-pci", "any_layout", "off" },
217     { "virtio-balloon-pci", "any_layout", "off" },
218     { "virtio-serial-pci", "any_layout", "off" },
219     { "virtio-9p-pci", "any_layout", "off" },
220     { "virtio-rng-pci", "any_layout", "off" },
221     { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" },
222     { "migration", "send-configuration", "off" },
223     { "migration", "send-section-footer", "off" },
224     { "migration", "store-global-state", "off" },
225 };
226 const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3);
227 
228 GlobalProperty hw_compat_2_2[] = {};
229 const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2);
230 
231 GlobalProperty hw_compat_2_1[] = {
232     { "intel-hda", "old_msi_addr", "on" },
233     { "VGA", "qemu-extended-regs", "off" },
234     { "secondary-vga", "qemu-extended-regs", "off" },
235     { "virtio-scsi-pci", "any_layout", "off" },
236     { "usb-mouse", "usb_version", "1" },
237     { "usb-kbd", "usb_version", "1" },
238     { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
239 };
240 const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1);
241 
242 MachineState *current_machine;
243 
244 static char *machine_get_kernel(Object *obj, Error **errp)
245 {
246     MachineState *ms = MACHINE(obj);
247 
248     return g_strdup(ms->kernel_filename);
249 }
250 
251 static void machine_set_kernel(Object *obj, const char *value, Error **errp)
252 {
253     MachineState *ms = MACHINE(obj);
254 
255     g_free(ms->kernel_filename);
256     ms->kernel_filename = g_strdup(value);
257 }
258 
259 static char *machine_get_initrd(Object *obj, Error **errp)
260 {
261     MachineState *ms = MACHINE(obj);
262 
263     return g_strdup(ms->initrd_filename);
264 }
265 
266 static void machine_set_initrd(Object *obj, const char *value, Error **errp)
267 {
268     MachineState *ms = MACHINE(obj);
269 
270     g_free(ms->initrd_filename);
271     ms->initrd_filename = g_strdup(value);
272 }
273 
274 static char *machine_get_append(Object *obj, Error **errp)
275 {
276     MachineState *ms = MACHINE(obj);
277 
278     return g_strdup(ms->kernel_cmdline);
279 }
280 
281 static void machine_set_append(Object *obj, const char *value, Error **errp)
282 {
283     MachineState *ms = MACHINE(obj);
284 
285     g_free(ms->kernel_cmdline);
286     ms->kernel_cmdline = g_strdup(value);
287 }
288 
289 static char *machine_get_dtb(Object *obj, Error **errp)
290 {
291     MachineState *ms = MACHINE(obj);
292 
293     return g_strdup(ms->dtb);
294 }
295 
296 static void machine_set_dtb(Object *obj, const char *value, Error **errp)
297 {
298     MachineState *ms = MACHINE(obj);
299 
300     g_free(ms->dtb);
301     ms->dtb = g_strdup(value);
302 }
303 
304 static char *machine_get_dumpdtb(Object *obj, Error **errp)
305 {
306     MachineState *ms = MACHINE(obj);
307 
308     return g_strdup(ms->dumpdtb);
309 }
310 
311 static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp)
312 {
313     MachineState *ms = MACHINE(obj);
314 
315     g_free(ms->dumpdtb);
316     ms->dumpdtb = g_strdup(value);
317 }
318 
319 static void machine_get_phandle_start(Object *obj, Visitor *v,
320                                       const char *name, void *opaque,
321                                       Error **errp)
322 {
323     MachineState *ms = MACHINE(obj);
324     int64_t value = ms->phandle_start;
325 
326     visit_type_int(v, name, &value, errp);
327 }
328 
329 static void machine_set_phandle_start(Object *obj, Visitor *v,
330                                       const char *name, void *opaque,
331                                       Error **errp)
332 {
333     MachineState *ms = MACHINE(obj);
334     int64_t value;
335 
336     if (!visit_type_int(v, name, &value, errp)) {
337         return;
338     }
339 
340     ms->phandle_start = value;
341 }
342 
343 static char *machine_get_dt_compatible(Object *obj, Error **errp)
344 {
345     MachineState *ms = MACHINE(obj);
346 
347     return g_strdup(ms->dt_compatible);
348 }
349 
350 static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp)
351 {
352     MachineState *ms = MACHINE(obj);
353 
354     g_free(ms->dt_compatible);
355     ms->dt_compatible = g_strdup(value);
356 }
357 
358 static bool machine_get_dump_guest_core(Object *obj, Error **errp)
359 {
360     MachineState *ms = MACHINE(obj);
361 
362     return ms->dump_guest_core;
363 }
364 
365 static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp)
366 {
367     MachineState *ms = MACHINE(obj);
368 
369     ms->dump_guest_core = value;
370 }
371 
372 static bool machine_get_mem_merge(Object *obj, Error **errp)
373 {
374     MachineState *ms = MACHINE(obj);
375 
376     return ms->mem_merge;
377 }
378 
379 static void machine_set_mem_merge(Object *obj, bool value, Error **errp)
380 {
381     MachineState *ms = MACHINE(obj);
382 
383     ms->mem_merge = value;
384 }
385 
386 static bool machine_get_usb(Object *obj, Error **errp)
387 {
388     MachineState *ms = MACHINE(obj);
389 
390     return ms->usb;
391 }
392 
393 static void machine_set_usb(Object *obj, bool value, Error **errp)
394 {
395     MachineState *ms = MACHINE(obj);
396 
397     ms->usb = value;
398     ms->usb_disabled = !value;
399 }
400 
401 static bool machine_get_graphics(Object *obj, Error **errp)
402 {
403     MachineState *ms = MACHINE(obj);
404 
405     return ms->enable_graphics;
406 }
407 
408 static void machine_set_graphics(Object *obj, bool value, Error **errp)
409 {
410     MachineState *ms = MACHINE(obj);
411 
412     ms->enable_graphics = value;
413 }
414 
415 static char *machine_get_firmware(Object *obj, Error **errp)
416 {
417     MachineState *ms = MACHINE(obj);
418 
419     return g_strdup(ms->firmware);
420 }
421 
422 static void machine_set_firmware(Object *obj, const char *value, Error **errp)
423 {
424     MachineState *ms = MACHINE(obj);
425 
426     g_free(ms->firmware);
427     ms->firmware = g_strdup(value);
428 }
429 
430 static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp)
431 {
432     MachineState *ms = MACHINE(obj);
433 
434     ms->suppress_vmdesc = value;
435 }
436 
437 static bool machine_get_suppress_vmdesc(Object *obj, Error **errp)
438 {
439     MachineState *ms = MACHINE(obj);
440 
441     return ms->suppress_vmdesc;
442 }
443 
444 static char *machine_get_memory_encryption(Object *obj, Error **errp)
445 {
446     MachineState *ms = MACHINE(obj);
447 
448     if (ms->cgs) {
449         return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs)));
450     }
451 
452     return NULL;
453 }
454 
455 static void machine_set_memory_encryption(Object *obj, const char *value,
456                                         Error **errp)
457 {
458     Object *cgs =
459         object_resolve_path_component(object_get_objects_root(), value);
460 
461     if (!cgs) {
462         error_setg(errp, "No such memory encryption object '%s'", value);
463         return;
464     }
465 
466     object_property_set_link(obj, "confidential-guest-support", cgs, errp);
467 }
468 
469 static void machine_check_confidential_guest_support(const Object *obj,
470                                                      const char *name,
471                                                      Object *new_target,
472                                                      Error **errp)
473 {
474     /*
475      * So far the only constraint is that the target has the
476      * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked
477      * by the QOM core
478      */
479 }
480 
481 static bool machine_get_nvdimm(Object *obj, Error **errp)
482 {
483     MachineState *ms = MACHINE(obj);
484 
485     return ms->nvdimms_state->is_enabled;
486 }
487 
488 static void machine_set_nvdimm(Object *obj, bool value, Error **errp)
489 {
490     MachineState *ms = MACHINE(obj);
491 
492     ms->nvdimms_state->is_enabled = value;
493 }
494 
495 static bool machine_get_hmat(Object *obj, Error **errp)
496 {
497     MachineState *ms = MACHINE(obj);
498 
499     return ms->numa_state->hmat_enabled;
500 }
501 
502 static void machine_set_hmat(Object *obj, bool value, Error **errp)
503 {
504     MachineState *ms = MACHINE(obj);
505 
506     ms->numa_state->hmat_enabled = value;
507 }
508 
509 static char *machine_get_nvdimm_persistence(Object *obj, Error **errp)
510 {
511     MachineState *ms = MACHINE(obj);
512 
513     return g_strdup(ms->nvdimms_state->persistence_string);
514 }
515 
516 static void machine_set_nvdimm_persistence(Object *obj, const char *value,
517                                            Error **errp)
518 {
519     MachineState *ms = MACHINE(obj);
520     NVDIMMState *nvdimms_state = ms->nvdimms_state;
521 
522     if (strcmp(value, "cpu") == 0) {
523         nvdimms_state->persistence = 3;
524     } else if (strcmp(value, "mem-ctrl") == 0) {
525         nvdimms_state->persistence = 2;
526     } else {
527         error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option",
528                    value);
529         return;
530     }
531 
532     g_free(nvdimms_state->persistence_string);
533     nvdimms_state->persistence_string = g_strdup(value);
534 }
535 
536 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type)
537 {
538     QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type));
539 }
540 
541 bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev)
542 {
543     bool allowed = false;
544     strList *wl;
545     Object *obj = OBJECT(dev);
546 
547     if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) {
548         return false;
549     }
550 
551     for (wl = mc->allowed_dynamic_sysbus_devices;
552          !allowed && wl;
553          wl = wl->next) {
554         allowed |= !!object_dynamic_cast(obj, wl->value);
555     }
556 
557     return allowed;
558 }
559 
560 static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque)
561 {
562     MachineState *machine = opaque;
563     MachineClass *mc = MACHINE_GET_CLASS(machine);
564 
565     if (!device_is_dynamic_sysbus(mc, DEVICE(sbdev))) {
566         error_report("Option '-device %s' cannot be handled by this machine",
567                      object_class_get_name(object_get_class(OBJECT(sbdev))));
568         exit(1);
569     }
570 }
571 
572 static char *machine_get_memdev(Object *obj, Error **errp)
573 {
574     MachineState *ms = MACHINE(obj);
575 
576     return g_strdup(ms->ram_memdev_id);
577 }
578 
579 static void machine_set_memdev(Object *obj, const char *value, Error **errp)
580 {
581     MachineState *ms = MACHINE(obj);
582 
583     g_free(ms->ram_memdev_id);
584     ms->ram_memdev_id = g_strdup(value);
585 }
586 
587 static void machine_init_notify(Notifier *notifier, void *data)
588 {
589     MachineState *machine = MACHINE(qdev_get_machine());
590 
591     /*
592      * Loop through all dynamically created sysbus devices and check if they are
593      * all allowed.  If a device is not allowed, error out.
594      */
595     foreach_dynamic_sysbus_device(validate_sysbus_device, machine);
596 }
597 
598 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine)
599 {
600     int i;
601     HotpluggableCPUList *head = NULL;
602     MachineClass *mc = MACHINE_GET_CLASS(machine);
603 
604     /* force board to initialize possible_cpus if it hasn't been done yet */
605     mc->possible_cpu_arch_ids(machine);
606 
607     for (i = 0; i < machine->possible_cpus->len; i++) {
608         Object *cpu;
609         HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1);
610 
611         cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type);
612         cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count;
613         cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props,
614                                    sizeof(*cpu_item->props));
615 
616         cpu = machine->possible_cpus->cpus[i].cpu;
617         if (cpu) {
618             cpu_item->has_qom_path = true;
619             cpu_item->qom_path = object_get_canonical_path(cpu);
620         }
621         QAPI_LIST_PREPEND(head, cpu_item);
622     }
623     return head;
624 }
625 
626 /**
627  * machine_set_cpu_numa_node:
628  * @machine: machine object to modify
629  * @props: specifies which cpu objects to assign to
630  *         numa node specified by @props.node_id
631  * @errp: if an error occurs, a pointer to an area to store the error
632  *
633  * Associate NUMA node specified by @props.node_id with cpu slots that
634  * match socket/core/thread-ids specified by @props. It's recommended to use
635  * query-hotpluggable-cpus.props values to specify affected cpu slots,
636  * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
637  *
638  * However for CLI convenience it's possible to pass in subset of properties,
639  * which would affect all cpu slots that match it.
640  * Ex for pc machine:
641  *    -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
642  *    -numa cpu,node-id=0,socket_id=0 \
643  *    -numa cpu,node-id=1,socket_id=1
644  * will assign all child cores of socket 0 to node 0 and
645  * of socket 1 to node 1.
646  *
647  * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
648  * return error.
649  * Empty subset is disallowed and function will return with error in this case.
650  */
651 void machine_set_cpu_numa_node(MachineState *machine,
652                                const CpuInstanceProperties *props, Error **errp)
653 {
654     MachineClass *mc = MACHINE_GET_CLASS(machine);
655     NodeInfo *numa_info = machine->numa_state->nodes;
656     bool match = false;
657     int i;
658 
659     if (!mc->possible_cpu_arch_ids) {
660         error_setg(errp, "mapping of CPUs to NUMA node is not supported");
661         return;
662     }
663 
664     /* disabling node mapping is not supported, forbid it */
665     assert(props->has_node_id);
666 
667     /* force board to initialize possible_cpus if it hasn't been done yet */
668     mc->possible_cpu_arch_ids(machine);
669 
670     for (i = 0; i < machine->possible_cpus->len; i++) {
671         CPUArchId *slot = &machine->possible_cpus->cpus[i];
672 
673         /* reject unsupported by board properties */
674         if (props->has_thread_id && !slot->props.has_thread_id) {
675             error_setg(errp, "thread-id is not supported");
676             return;
677         }
678 
679         if (props->has_core_id && !slot->props.has_core_id) {
680             error_setg(errp, "core-id is not supported");
681             return;
682         }
683 
684         if (props->has_socket_id && !slot->props.has_socket_id) {
685             error_setg(errp, "socket-id is not supported");
686             return;
687         }
688 
689         if (props->has_die_id && !slot->props.has_die_id) {
690             error_setg(errp, "die-id is not supported");
691             return;
692         }
693 
694         /* skip slots with explicit mismatch */
695         if (props->has_thread_id && props->thread_id != slot->props.thread_id) {
696                 continue;
697         }
698 
699         if (props->has_core_id && props->core_id != slot->props.core_id) {
700                 continue;
701         }
702 
703         if (props->has_die_id && props->die_id != slot->props.die_id) {
704                 continue;
705         }
706 
707         if (props->has_socket_id && props->socket_id != slot->props.socket_id) {
708                 continue;
709         }
710 
711         /* reject assignment if slot is already assigned, for compatibility
712          * of legacy cpu_index mapping with SPAPR core based mapping do not
713          * error out if cpu thread and matched core have the same node-id */
714         if (slot->props.has_node_id &&
715             slot->props.node_id != props->node_id) {
716             error_setg(errp, "CPU is already assigned to node-id: %" PRId64,
717                        slot->props.node_id);
718             return;
719         }
720 
721         /* assign slot to node as it's matched '-numa cpu' key */
722         match = true;
723         slot->props.node_id = props->node_id;
724         slot->props.has_node_id = props->has_node_id;
725 
726         if (machine->numa_state->hmat_enabled) {
727             if ((numa_info[props->node_id].initiator < MAX_NODES) &&
728                 (props->node_id != numa_info[props->node_id].initiator)) {
729                 error_setg(errp, "The initiator of CPU NUMA node %" PRId64
730                            " should be itself (got %" PRIu16 ")",
731                            props->node_id, numa_info[props->node_id].initiator);
732                 return;
733             }
734             numa_info[props->node_id].has_cpu = true;
735             numa_info[props->node_id].initiator = props->node_id;
736         }
737     }
738 
739     if (!match) {
740         error_setg(errp, "no match found");
741     }
742 }
743 
744 static void smp_parse(MachineState *ms, SMPConfiguration *config, Error **errp)
745 {
746     unsigned cpus    = config->has_cpus ? config->cpus : 0;
747     unsigned sockets = config->has_sockets ? config->sockets : 0;
748     unsigned cores   = config->has_cores ? config->cores : 0;
749     unsigned threads = config->has_threads ? config->threads : 0;
750 
751     if (config->has_dies && config->dies != 0 && config->dies != 1) {
752         error_setg(errp, "dies not supported by this machine's CPU topology");
753     }
754 
755     /* compute missing values, prefer sockets over cores over threads */
756     if (cpus == 0 || sockets == 0) {
757         cores = cores > 0 ? cores : 1;
758         threads = threads > 0 ? threads : 1;
759         if (cpus == 0) {
760             sockets = sockets > 0 ? sockets : 1;
761             cpus = cores * threads * sockets;
762         } else {
763             ms->smp.max_cpus = config->has_maxcpus ? config->maxcpus : cpus;
764             sockets = ms->smp.max_cpus / (cores * threads);
765         }
766     } else if (cores == 0) {
767         threads = threads > 0 ? threads : 1;
768         cores = cpus / (sockets * threads);
769         cores = cores > 0 ? cores : 1;
770     } else if (threads == 0) {
771         threads = cpus / (cores * sockets);
772         threads = threads > 0 ? threads : 1;
773     } else if (sockets * cores * threads < cpus) {
774         error_setg(errp, "cpu topology: "
775                    "sockets (%u) * cores (%u) * threads (%u) < "
776                    "smp_cpus (%u)",
777                    sockets, cores, threads, cpus);
778         return;
779     }
780 
781     ms->smp.max_cpus = config->has_maxcpus ? config->maxcpus : cpus;
782 
783     if (ms->smp.max_cpus < cpus) {
784         error_setg(errp, "maxcpus must be equal to or greater than smp");
785         return;
786     }
787 
788     if (sockets * cores * threads != ms->smp.max_cpus) {
789         error_setg(errp, "Invalid CPU topology: "
790                    "sockets (%u) * cores (%u) * threads (%u) "
791                    "!= maxcpus (%u)",
792                    sockets, cores, threads,
793                    ms->smp.max_cpus);
794         return;
795     }
796 
797     ms->smp.cpus = cpus;
798     ms->smp.cores = cores;
799     ms->smp.threads = threads;
800     ms->smp.sockets = sockets;
801 }
802 
803 static void machine_get_smp(Object *obj, Visitor *v, const char *name,
804                             void *opaque, Error **errp)
805 {
806     MachineState *ms = MACHINE(obj);
807     SMPConfiguration *config = &(SMPConfiguration){
808         .has_cores = true, .cores = ms->smp.cores,
809         .has_sockets = true, .sockets = ms->smp.sockets,
810         .has_dies = true, .dies = ms->smp.dies,
811         .has_threads = true, .threads = ms->smp.threads,
812         .has_cpus = true, .cpus = ms->smp.cpus,
813         .has_maxcpus = true, .maxcpus = ms->smp.max_cpus,
814     };
815     if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) {
816         return;
817     }
818 }
819 
820 static void machine_set_smp(Object *obj, Visitor *v, const char *name,
821                             void *opaque, Error **errp)
822 {
823     MachineClass *mc = MACHINE_GET_CLASS(obj);
824     MachineState *ms = MACHINE(obj);
825     SMPConfiguration *config;
826     ERRP_GUARD();
827 
828     if (!visit_type_SMPConfiguration(v, name, &config, errp)) {
829         return;
830     }
831 
832     mc->smp_parse(ms, config, errp);
833     if (errp) {
834         goto out_free;
835     }
836 
837     /* sanity-check smp_cpus and max_cpus against mc */
838     if (ms->smp.cpus < mc->min_cpus) {
839         error_setg(errp, "Invalid SMP CPUs %d. The min CPUs "
840                    "supported by machine '%s' is %d",
841                    ms->smp.cpus,
842                    mc->name, mc->min_cpus);
843     } else if (ms->smp.max_cpus > mc->max_cpus) {
844         error_setg(errp, "Invalid SMP CPUs %d. The max CPUs "
845                    "supported by machine '%s' is %d",
846                    current_machine->smp.max_cpus,
847                    mc->name, mc->max_cpus);
848     }
849 
850 out_free:
851     qapi_free_SMPConfiguration(config);
852 }
853 
854 static void machine_class_init(ObjectClass *oc, void *data)
855 {
856     MachineClass *mc = MACHINE_CLASS(oc);
857 
858     /* Default 128 MB as guest ram size */
859     mc->default_ram_size = 128 * MiB;
860     mc->rom_file_has_mr = true;
861     mc->smp_parse = smp_parse;
862 
863     /* numa node memory size aligned on 8MB by default.
864      * On Linux, each node's border has to be 8MB aligned
865      */
866     mc->numa_mem_align_shift = 23;
867 
868     object_class_property_add_str(oc, "kernel",
869         machine_get_kernel, machine_set_kernel);
870     object_class_property_set_description(oc, "kernel",
871         "Linux kernel image file");
872 
873     object_class_property_add_str(oc, "initrd",
874         machine_get_initrd, machine_set_initrd);
875     object_class_property_set_description(oc, "initrd",
876         "Linux initial ramdisk file");
877 
878     object_class_property_add_str(oc, "append",
879         machine_get_append, machine_set_append);
880     object_class_property_set_description(oc, "append",
881         "Linux kernel command line");
882 
883     object_class_property_add_str(oc, "dtb",
884         machine_get_dtb, machine_set_dtb);
885     object_class_property_set_description(oc, "dtb",
886         "Linux kernel device tree file");
887 
888     object_class_property_add_str(oc, "dumpdtb",
889         machine_get_dumpdtb, machine_set_dumpdtb);
890     object_class_property_set_description(oc, "dumpdtb",
891         "Dump current dtb to a file and quit");
892 
893     object_class_property_add(oc, "smp", "SMPConfiguration",
894         machine_get_smp, machine_set_smp,
895         NULL, NULL);
896     object_class_property_set_description(oc, "smp",
897         "CPU topology");
898 
899     object_class_property_add(oc, "phandle-start", "int",
900         machine_get_phandle_start, machine_set_phandle_start,
901         NULL, NULL);
902     object_class_property_set_description(oc, "phandle-start",
903         "The first phandle ID we may generate dynamically");
904 
905     object_class_property_add_str(oc, "dt-compatible",
906         machine_get_dt_compatible, machine_set_dt_compatible);
907     object_class_property_set_description(oc, "dt-compatible",
908         "Overrides the \"compatible\" property of the dt root node");
909 
910     object_class_property_add_bool(oc, "dump-guest-core",
911         machine_get_dump_guest_core, machine_set_dump_guest_core);
912     object_class_property_set_description(oc, "dump-guest-core",
913         "Include guest memory in a core dump");
914 
915     object_class_property_add_bool(oc, "mem-merge",
916         machine_get_mem_merge, machine_set_mem_merge);
917     object_class_property_set_description(oc, "mem-merge",
918         "Enable/disable memory merge support");
919 
920     object_class_property_add_bool(oc, "usb",
921         machine_get_usb, machine_set_usb);
922     object_class_property_set_description(oc, "usb",
923         "Set on/off to enable/disable usb");
924 
925     object_class_property_add_bool(oc, "graphics",
926         machine_get_graphics, machine_set_graphics);
927     object_class_property_set_description(oc, "graphics",
928         "Set on/off to enable/disable graphics emulation");
929 
930     object_class_property_add_str(oc, "firmware",
931         machine_get_firmware, machine_set_firmware);
932     object_class_property_set_description(oc, "firmware",
933         "Firmware image");
934 
935     object_class_property_add_bool(oc, "suppress-vmdesc",
936         machine_get_suppress_vmdesc, machine_set_suppress_vmdesc);
937     object_class_property_set_description(oc, "suppress-vmdesc",
938         "Set on to disable self-describing migration");
939 
940     object_class_property_add_link(oc, "confidential-guest-support",
941                                    TYPE_CONFIDENTIAL_GUEST_SUPPORT,
942                                    offsetof(MachineState, cgs),
943                                    machine_check_confidential_guest_support,
944                                    OBJ_PROP_LINK_STRONG);
945     object_class_property_set_description(oc, "confidential-guest-support",
946                                           "Set confidential guest scheme to support");
947 
948     /* For compatibility */
949     object_class_property_add_str(oc, "memory-encryption",
950         machine_get_memory_encryption, machine_set_memory_encryption);
951     object_class_property_set_description(oc, "memory-encryption",
952         "Set memory encryption object to use");
953 
954     object_class_property_add_str(oc, "memory-backend",
955                                   machine_get_memdev, machine_set_memdev);
956     object_class_property_set_description(oc, "memory-backend",
957                                           "Set RAM backend"
958                                           "Valid value is ID of hostmem based backend");
959 }
960 
961 static void machine_class_base_init(ObjectClass *oc, void *data)
962 {
963     MachineClass *mc = MACHINE_CLASS(oc);
964     mc->max_cpus = mc->max_cpus ?: 1;
965     mc->min_cpus = mc->min_cpus ?: 1;
966     mc->default_cpus = mc->default_cpus ?: 1;
967 
968     if (!object_class_is_abstract(oc)) {
969         const char *cname = object_class_get_name(oc);
970         assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX));
971         mc->name = g_strndup(cname,
972                             strlen(cname) - strlen(TYPE_MACHINE_SUFFIX));
973         mc->compat_props = g_ptr_array_new();
974     }
975 }
976 
977 static void machine_initfn(Object *obj)
978 {
979     MachineState *ms = MACHINE(obj);
980     MachineClass *mc = MACHINE_GET_CLASS(obj);
981 
982     container_get(obj, "/peripheral");
983     container_get(obj, "/peripheral-anon");
984 
985     ms->dump_guest_core = true;
986     ms->mem_merge = true;
987     ms->enable_graphics = true;
988     ms->kernel_cmdline = g_strdup("");
989 
990     if (mc->nvdimm_supported) {
991         Object *obj = OBJECT(ms);
992 
993         ms->nvdimms_state = g_new0(NVDIMMState, 1);
994         object_property_add_bool(obj, "nvdimm",
995                                  machine_get_nvdimm, machine_set_nvdimm);
996         object_property_set_description(obj, "nvdimm",
997                                         "Set on/off to enable/disable "
998                                         "NVDIMM instantiation");
999 
1000         object_property_add_str(obj, "nvdimm-persistence",
1001                                 machine_get_nvdimm_persistence,
1002                                 machine_set_nvdimm_persistence);
1003         object_property_set_description(obj, "nvdimm-persistence",
1004                                         "Set NVDIMM persistence"
1005                                         "Valid values are cpu, mem-ctrl");
1006     }
1007 
1008     if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) {
1009         ms->numa_state = g_new0(NumaState, 1);
1010         object_property_add_bool(obj, "hmat",
1011                                  machine_get_hmat, machine_set_hmat);
1012         object_property_set_description(obj, "hmat",
1013                                         "Set on/off to enable/disable "
1014                                         "ACPI Heterogeneous Memory Attribute "
1015                                         "Table (HMAT)");
1016     }
1017 
1018     /* Register notifier when init is done for sysbus sanity checks */
1019     ms->sysbus_notifier.notify = machine_init_notify;
1020     qemu_add_machine_init_done_notifier(&ms->sysbus_notifier);
1021 
1022     /* default to mc->default_cpus */
1023     ms->smp.cpus = mc->default_cpus;
1024     ms->smp.max_cpus = mc->default_cpus;
1025     ms->smp.cores = 1;
1026     ms->smp.dies = 1;
1027     ms->smp.threads = 1;
1028     ms->smp.sockets = 1;
1029 }
1030 
1031 static void machine_finalize(Object *obj)
1032 {
1033     MachineState *ms = MACHINE(obj);
1034 
1035     g_free(ms->kernel_filename);
1036     g_free(ms->initrd_filename);
1037     g_free(ms->kernel_cmdline);
1038     g_free(ms->dtb);
1039     g_free(ms->dumpdtb);
1040     g_free(ms->dt_compatible);
1041     g_free(ms->firmware);
1042     g_free(ms->device_memory);
1043     g_free(ms->nvdimms_state);
1044     g_free(ms->numa_state);
1045 }
1046 
1047 bool machine_usb(MachineState *machine)
1048 {
1049     return machine->usb;
1050 }
1051 
1052 int machine_phandle_start(MachineState *machine)
1053 {
1054     return machine->phandle_start;
1055 }
1056 
1057 bool machine_dump_guest_core(MachineState *machine)
1058 {
1059     return machine->dump_guest_core;
1060 }
1061 
1062 bool machine_mem_merge(MachineState *machine)
1063 {
1064     return machine->mem_merge;
1065 }
1066 
1067 static char *cpu_slot_to_string(const CPUArchId *cpu)
1068 {
1069     GString *s = g_string_new(NULL);
1070     if (cpu->props.has_socket_id) {
1071         g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id);
1072     }
1073     if (cpu->props.has_die_id) {
1074         g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id);
1075     }
1076     if (cpu->props.has_core_id) {
1077         if (s->len) {
1078             g_string_append_printf(s, ", ");
1079         }
1080         g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id);
1081     }
1082     if (cpu->props.has_thread_id) {
1083         if (s->len) {
1084             g_string_append_printf(s, ", ");
1085         }
1086         g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id);
1087     }
1088     return g_string_free(s, false);
1089 }
1090 
1091 static void numa_validate_initiator(NumaState *numa_state)
1092 {
1093     int i;
1094     NodeInfo *numa_info = numa_state->nodes;
1095 
1096     for (i = 0; i < numa_state->num_nodes; i++) {
1097         if (numa_info[i].initiator == MAX_NODES) {
1098             error_report("The initiator of NUMA node %d is missing, use "
1099                          "'-numa node,initiator' option to declare it", i);
1100             exit(1);
1101         }
1102 
1103         if (!numa_info[numa_info[i].initiator].present) {
1104             error_report("NUMA node %" PRIu16 " is missing, use "
1105                          "'-numa node' option to declare it first",
1106                          numa_info[i].initiator);
1107             exit(1);
1108         }
1109 
1110         if (!numa_info[numa_info[i].initiator].has_cpu) {
1111             error_report("The initiator of NUMA node %d is invalid", i);
1112             exit(1);
1113         }
1114     }
1115 }
1116 
1117 static void machine_numa_finish_cpu_init(MachineState *machine)
1118 {
1119     int i;
1120     bool default_mapping;
1121     GString *s = g_string_new(NULL);
1122     MachineClass *mc = MACHINE_GET_CLASS(machine);
1123     const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine);
1124 
1125     assert(machine->numa_state->num_nodes);
1126     for (i = 0; i < possible_cpus->len; i++) {
1127         if (possible_cpus->cpus[i].props.has_node_id) {
1128             break;
1129         }
1130     }
1131     default_mapping = (i == possible_cpus->len);
1132 
1133     for (i = 0; i < possible_cpus->len; i++) {
1134         const CPUArchId *cpu_slot = &possible_cpus->cpus[i];
1135 
1136         if (!cpu_slot->props.has_node_id) {
1137             /* fetch default mapping from board and enable it */
1138             CpuInstanceProperties props = cpu_slot->props;
1139 
1140             props.node_id = mc->get_default_cpu_node_id(machine, i);
1141             if (!default_mapping) {
1142                 /* record slots with not set mapping,
1143                  * TODO: make it hard error in future */
1144                 char *cpu_str = cpu_slot_to_string(cpu_slot);
1145                 g_string_append_printf(s, "%sCPU %d [%s]",
1146                                        s->len ? ", " : "", i, cpu_str);
1147                 g_free(cpu_str);
1148 
1149                 /* non mapped cpus used to fallback to node 0 */
1150                 props.node_id = 0;
1151             }
1152 
1153             props.has_node_id = true;
1154             machine_set_cpu_numa_node(machine, &props, &error_fatal);
1155         }
1156     }
1157 
1158     if (machine->numa_state->hmat_enabled) {
1159         numa_validate_initiator(machine->numa_state);
1160     }
1161 
1162     if (s->len && !qtest_enabled()) {
1163         warn_report("CPU(s) not present in any NUMA nodes: %s",
1164                     s->str);
1165         warn_report("All CPU(s) up to maxcpus should be described "
1166                     "in NUMA config, ability to start up with partial NUMA "
1167                     "mappings is obsoleted and will be removed in future");
1168     }
1169     g_string_free(s, true);
1170 }
1171 
1172 MemoryRegion *machine_consume_memdev(MachineState *machine,
1173                                      HostMemoryBackend *backend)
1174 {
1175     MemoryRegion *ret = host_memory_backend_get_memory(backend);
1176 
1177     if (memory_region_is_mapped(ret)) {
1178         error_report("memory backend %s can't be used multiple times.",
1179                      object_get_canonical_path_component(OBJECT(backend)));
1180         exit(EXIT_FAILURE);
1181     }
1182     host_memory_backend_set_mapped(backend, true);
1183     vmstate_register_ram_global(ret);
1184     return ret;
1185 }
1186 
1187 void machine_run_board_init(MachineState *machine)
1188 {
1189     MachineClass *machine_class = MACHINE_GET_CLASS(machine);
1190     ObjectClass *oc = object_class_by_name(machine->cpu_type);
1191     CPUClass *cc;
1192 
1193     /* This checkpoint is required by replay to separate prior clock
1194        reading from the other reads, because timer polling functions query
1195        clock values from the log. */
1196     replay_checkpoint(CHECKPOINT_INIT);
1197 
1198     if (machine->ram_memdev_id) {
1199         Object *o;
1200         o = object_resolve_path_type(machine->ram_memdev_id,
1201                                      TYPE_MEMORY_BACKEND, NULL);
1202         machine->ram = machine_consume_memdev(machine, MEMORY_BACKEND(o));
1203     }
1204 
1205     if (machine->numa_state) {
1206         numa_complete_configuration(machine);
1207         if (machine->numa_state->num_nodes) {
1208             machine_numa_finish_cpu_init(machine);
1209         }
1210     }
1211 
1212     /* If the machine supports the valid_cpu_types check and the user
1213      * specified a CPU with -cpu check here that the user CPU is supported.
1214      */
1215     if (machine_class->valid_cpu_types && machine->cpu_type) {
1216         int i;
1217 
1218         for (i = 0; machine_class->valid_cpu_types[i]; i++) {
1219             if (object_class_dynamic_cast(oc,
1220                                           machine_class->valid_cpu_types[i])) {
1221                 /* The user specificed CPU is in the valid field, we are
1222                  * good to go.
1223                  */
1224                 break;
1225             }
1226         }
1227 
1228         if (!machine_class->valid_cpu_types[i]) {
1229             /* The user specified CPU is not valid */
1230             error_report("Invalid CPU type: %s", machine->cpu_type);
1231             error_printf("The valid types are: %s",
1232                          machine_class->valid_cpu_types[0]);
1233             for (i = 1; machine_class->valid_cpu_types[i]; i++) {
1234                 error_printf(", %s", machine_class->valid_cpu_types[i]);
1235             }
1236             error_printf("\n");
1237 
1238             exit(1);
1239         }
1240     }
1241 
1242     /* Check if CPU type is deprecated and warn if so */
1243     cc = CPU_CLASS(oc);
1244     if (cc && cc->deprecation_note) {
1245         warn_report("CPU model %s is deprecated -- %s", machine->cpu_type,
1246                     cc->deprecation_note);
1247     }
1248 
1249     if (machine->cgs) {
1250         /*
1251          * With confidential guests, the host can't see the real
1252          * contents of RAM, so there's no point in it trying to merge
1253          * areas.
1254          */
1255         machine_set_mem_merge(OBJECT(machine), false, &error_abort);
1256 
1257         /*
1258          * Virtio devices can't count on directly accessing guest
1259          * memory, so they need iommu_platform=on to use normal DMA
1260          * mechanisms.  That requires also disabling legacy virtio
1261          * support for those virtio pci devices which allow it.
1262          */
1263         object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy",
1264                                    "on", true);
1265         object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform",
1266                                    "on", false);
1267     }
1268 
1269     accel_init_interfaces(ACCEL_GET_CLASS(machine->accelerator));
1270     machine_class->init(machine);
1271     phase_advance(PHASE_MACHINE_INITIALIZED);
1272 }
1273 
1274 static NotifierList machine_init_done_notifiers =
1275     NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers);
1276 
1277 void qemu_add_machine_init_done_notifier(Notifier *notify)
1278 {
1279     notifier_list_add(&machine_init_done_notifiers, notify);
1280     if (phase_check(PHASE_MACHINE_READY)) {
1281         notify->notify(notify, NULL);
1282     }
1283 }
1284 
1285 void qemu_remove_machine_init_done_notifier(Notifier *notify)
1286 {
1287     notifier_remove(notify);
1288 }
1289 
1290 void qdev_machine_creation_done(void)
1291 {
1292     cpu_synchronize_all_post_init();
1293 
1294     if (current_machine->boot_once) {
1295         qemu_boot_set(current_machine->boot_once, &error_fatal);
1296         qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_order));
1297     }
1298 
1299     /*
1300      * ok, initial machine setup is done, starting from now we can
1301      * only create hotpluggable devices
1302      */
1303     phase_advance(PHASE_MACHINE_READY);
1304     qdev_assert_realized_properly();
1305 
1306     /* TODO: once all bus devices are qdevified, this should be done
1307      * when bus is created by qdev.c */
1308     /*
1309      * TODO: If we had a main 'reset container' that the whole system
1310      * lived in, we could reset that using the multi-phase reset
1311      * APIs. For the moment, we just reset the sysbus, which will cause
1312      * all devices hanging off it (and all their child buses, recursively)
1313      * to be reset. Note that this will *not* reset any Device objects
1314      * which are not attached to some part of the qbus tree!
1315      */
1316     qemu_register_reset(resettable_cold_reset_fn, sysbus_get_default());
1317 
1318     notifier_list_notify(&machine_init_done_notifiers, NULL);
1319 
1320     if (rom_check_and_register_reset() != 0) {
1321         exit(1);
1322     }
1323 
1324     replay_start();
1325 
1326     /* This checkpoint is required by replay to separate prior clock
1327        reading from the other reads, because timer polling functions query
1328        clock values from the log. */
1329     replay_checkpoint(CHECKPOINT_RESET);
1330     qemu_system_reset(SHUTDOWN_CAUSE_NONE);
1331     register_global_state();
1332 }
1333 
1334 static const TypeInfo machine_info = {
1335     .name = TYPE_MACHINE,
1336     .parent = TYPE_OBJECT,
1337     .abstract = true,
1338     .class_size = sizeof(MachineClass),
1339     .class_init    = machine_class_init,
1340     .class_base_init = machine_class_base_init,
1341     .instance_size = sizeof(MachineState),
1342     .instance_init = machine_initfn,
1343     .instance_finalize = machine_finalize,
1344 };
1345 
1346 static void machine_register_types(void)
1347 {
1348     type_register_static(&machine_info);
1349 }
1350 
1351 type_init(machine_register_types)
1352