1 /* 2 * QEMU 16550A UART emulation 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * Copyright (c) 2008 Citrix Systems, Inc. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 26 /* see docs/specs/pci-serial.txt */ 27 28 #include "hw/char/serial.h" 29 #include "hw/pci/pci.h" 30 #include "qapi/qmp/qerror.h" 31 32 #define PCI_SERIAL_MAX_PORTS 4 33 34 typedef struct PCISerialState { 35 PCIDevice dev; 36 SerialState state; 37 } PCISerialState; 38 39 typedef struct PCIMultiSerialState { 40 PCIDevice dev; 41 MemoryRegion iobar; 42 uint32_t ports; 43 char *name[PCI_SERIAL_MAX_PORTS]; 44 SerialState state[PCI_SERIAL_MAX_PORTS]; 45 uint32_t level[PCI_SERIAL_MAX_PORTS]; 46 qemu_irq *irqs; 47 } PCIMultiSerialState; 48 49 static int serial_pci_init(PCIDevice *dev) 50 { 51 PCISerialState *pci = DO_UPCAST(PCISerialState, dev, dev); 52 SerialState *s = &pci->state; 53 Error *err = NULL; 54 55 s->baudbase = 115200; 56 serial_realize_core(s, &err); 57 if (err != NULL) { 58 qerror_report_err(err); 59 error_free(err); 60 return -1; 61 } 62 63 pci->dev.config[PCI_INTERRUPT_PIN] = 0x01; 64 s->irq = pci->dev.irq[0]; 65 66 memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s, "serial", 8); 67 pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io); 68 return 0; 69 } 70 71 static void multi_serial_irq_mux(void *opaque, int n, int level) 72 { 73 PCIMultiSerialState *pci = opaque; 74 int i, pending = 0; 75 76 pci->level[n] = level; 77 for (i = 0; i < pci->ports; i++) { 78 if (pci->level[i]) { 79 pending = 1; 80 } 81 } 82 qemu_set_irq(pci->dev.irq[0], pending); 83 } 84 85 static int multi_serial_pci_init(PCIDevice *dev) 86 { 87 PCIDeviceClass *pc = PCI_DEVICE_GET_CLASS(dev); 88 PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev); 89 SerialState *s; 90 Error *err = NULL; 91 int i; 92 93 switch (pc->device_id) { 94 case 0x0003: 95 pci->ports = 2; 96 break; 97 case 0x0004: 98 pci->ports = 4; 99 break; 100 } 101 assert(pci->ports > 0); 102 assert(pci->ports <= PCI_SERIAL_MAX_PORTS); 103 104 pci->dev.config[PCI_INTERRUPT_PIN] = 0x01; 105 memory_region_init(&pci->iobar, OBJECT(pci), "multiserial", 8 * pci->ports); 106 pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &pci->iobar); 107 pci->irqs = qemu_allocate_irqs(multi_serial_irq_mux, pci, 108 pci->ports); 109 110 for (i = 0; i < pci->ports; i++) { 111 s = pci->state + i; 112 s->baudbase = 115200; 113 serial_realize_core(s, &err); 114 if (err != NULL) { 115 qerror_report_err(err); 116 error_free(err); 117 return -1; 118 } 119 s->irq = pci->irqs[i]; 120 pci->name[i] = g_strdup_printf("uart #%d", i+1); 121 memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s, 122 pci->name[i], 8); 123 memory_region_add_subregion(&pci->iobar, 8 * i, &s->io); 124 } 125 return 0; 126 } 127 128 static void serial_pci_exit(PCIDevice *dev) 129 { 130 PCISerialState *pci = DO_UPCAST(PCISerialState, dev, dev); 131 SerialState *s = &pci->state; 132 133 serial_exit_core(s); 134 memory_region_destroy(&s->io); 135 } 136 137 static void multi_serial_pci_exit(PCIDevice *dev) 138 { 139 PCIMultiSerialState *pci = DO_UPCAST(PCIMultiSerialState, dev, dev); 140 SerialState *s; 141 int i; 142 143 for (i = 0; i < pci->ports; i++) { 144 s = pci->state + i; 145 serial_exit_core(s); 146 memory_region_destroy(&s->io); 147 g_free(pci->name[i]); 148 } 149 memory_region_destroy(&pci->iobar); 150 qemu_free_irqs(pci->irqs); 151 } 152 153 static const VMStateDescription vmstate_pci_serial = { 154 .name = "pci-serial", 155 .version_id = 1, 156 .minimum_version_id = 1, 157 .fields = (VMStateField[]) { 158 VMSTATE_PCI_DEVICE(dev, PCISerialState), 159 VMSTATE_STRUCT(state, PCISerialState, 0, vmstate_serial, SerialState), 160 VMSTATE_END_OF_LIST() 161 } 162 }; 163 164 static const VMStateDescription vmstate_pci_multi_serial = { 165 .name = "pci-serial-multi", 166 .version_id = 1, 167 .minimum_version_id = 1, 168 .fields = (VMStateField[]) { 169 VMSTATE_PCI_DEVICE(dev, PCIMultiSerialState), 170 VMSTATE_STRUCT_ARRAY(state, PCIMultiSerialState, PCI_SERIAL_MAX_PORTS, 171 0, vmstate_serial, SerialState), 172 VMSTATE_UINT32_ARRAY(level, PCIMultiSerialState, PCI_SERIAL_MAX_PORTS), 173 VMSTATE_END_OF_LIST() 174 } 175 }; 176 177 static Property serial_pci_properties[] = { 178 DEFINE_PROP_CHR("chardev", PCISerialState, state.chr), 179 DEFINE_PROP_END_OF_LIST(), 180 }; 181 182 static Property multi_2x_serial_pci_properties[] = { 183 DEFINE_PROP_CHR("chardev1", PCIMultiSerialState, state[0].chr), 184 DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr), 185 DEFINE_PROP_END_OF_LIST(), 186 }; 187 188 static Property multi_4x_serial_pci_properties[] = { 189 DEFINE_PROP_CHR("chardev1", PCIMultiSerialState, state[0].chr), 190 DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr), 191 DEFINE_PROP_CHR("chardev3", PCIMultiSerialState, state[2].chr), 192 DEFINE_PROP_CHR("chardev4", PCIMultiSerialState, state[3].chr), 193 DEFINE_PROP_END_OF_LIST(), 194 }; 195 196 static void serial_pci_class_initfn(ObjectClass *klass, void *data) 197 { 198 DeviceClass *dc = DEVICE_CLASS(klass); 199 PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass); 200 pc->init = serial_pci_init; 201 pc->exit = serial_pci_exit; 202 pc->vendor_id = PCI_VENDOR_ID_REDHAT; 203 pc->device_id = PCI_DEVICE_ID_REDHAT_SERIAL; 204 pc->revision = 1; 205 pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL; 206 dc->vmsd = &vmstate_pci_serial; 207 dc->props = serial_pci_properties; 208 } 209 210 static void multi_2x_serial_pci_class_initfn(ObjectClass *klass, void *data) 211 { 212 DeviceClass *dc = DEVICE_CLASS(klass); 213 PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass); 214 pc->init = multi_serial_pci_init; 215 pc->exit = multi_serial_pci_exit; 216 pc->vendor_id = PCI_VENDOR_ID_REDHAT; 217 pc->device_id = PCI_DEVICE_ID_REDHAT_SERIAL2; 218 pc->revision = 1; 219 pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL; 220 dc->vmsd = &vmstate_pci_multi_serial; 221 dc->props = multi_2x_serial_pci_properties; 222 } 223 224 static void multi_4x_serial_pci_class_initfn(ObjectClass *klass, void *data) 225 { 226 DeviceClass *dc = DEVICE_CLASS(klass); 227 PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass); 228 pc->init = multi_serial_pci_init; 229 pc->exit = multi_serial_pci_exit; 230 pc->vendor_id = PCI_VENDOR_ID_REDHAT; 231 pc->device_id = PCI_DEVICE_ID_REDHAT_SERIAL4; 232 pc->revision = 1; 233 pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL; 234 dc->vmsd = &vmstate_pci_multi_serial; 235 dc->props = multi_4x_serial_pci_properties; 236 } 237 238 static const TypeInfo serial_pci_info = { 239 .name = "pci-serial", 240 .parent = TYPE_PCI_DEVICE, 241 .instance_size = sizeof(PCISerialState), 242 .class_init = serial_pci_class_initfn, 243 }; 244 245 static const TypeInfo multi_2x_serial_pci_info = { 246 .name = "pci-serial-2x", 247 .parent = TYPE_PCI_DEVICE, 248 .instance_size = sizeof(PCIMultiSerialState), 249 .class_init = multi_2x_serial_pci_class_initfn, 250 }; 251 252 static const TypeInfo multi_4x_serial_pci_info = { 253 .name = "pci-serial-4x", 254 .parent = TYPE_PCI_DEVICE, 255 .instance_size = sizeof(PCIMultiSerialState), 256 .class_init = multi_4x_serial_pci_class_initfn, 257 }; 258 259 static void serial_pci_register_types(void) 260 { 261 type_register_static(&serial_pci_info); 262 type_register_static(&multi_2x_serial_pci_info); 263 type_register_static(&multi_4x_serial_pci_info); 264 } 265 266 type_init(serial_pci_register_types) 267