1 /* 2 * QEMU 16550A UART emulation 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * Copyright (c) 2008 Citrix Systems, Inc. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 26 #include "qemu/osdep.h" 27 #include "qapi/error.h" 28 #include "qemu/module.h" 29 #include "sysemu/sysemu.h" 30 #include "hw/acpi/aml-build.h" 31 #include "hw/char/serial.h" 32 #include "hw/isa/isa.h" 33 #include "hw/qdev-properties.h" 34 #include "migration/vmstate.h" 35 #include "qom/object.h" 36 37 OBJECT_DECLARE_SIMPLE_TYPE(ISASerialState, ISA_SERIAL) 38 39 struct ISASerialState { 40 ISADevice parent_obj; 41 42 uint32_t index; 43 uint32_t iobase; 44 uint32_t isairq; 45 SerialState state; 46 }; 47 48 static const int isa_serial_io[MAX_ISA_SERIAL_PORTS] = { 49 0x3f8, 0x2f8, 0x3e8, 0x2e8 50 }; 51 static const int isa_serial_irq[MAX_ISA_SERIAL_PORTS] = { 52 4, 3, 4, 3 53 }; 54 55 static void serial_isa_realizefn(DeviceState *dev, Error **errp) 56 { 57 static int index; 58 ISADevice *isadev = ISA_DEVICE(dev); 59 ISASerialState *isa = ISA_SERIAL(dev); 60 SerialState *s = &isa->state; 61 62 if (isa->index == -1) { 63 isa->index = index; 64 } 65 if (isa->index >= MAX_ISA_SERIAL_PORTS) { 66 error_setg(errp, "Max. supported number of ISA serial ports is %d.", 67 MAX_ISA_SERIAL_PORTS); 68 return; 69 } 70 if (isa->iobase == -1) { 71 isa->iobase = isa_serial_io[isa->index]; 72 } 73 if (isa->isairq == -1) { 74 isa->isairq = isa_serial_irq[isa->index]; 75 } 76 index++; 77 78 isa_init_irq(isadev, &s->irq, isa->isairq); 79 qdev_realize(DEVICE(s), NULL, errp); 80 qdev_set_legacy_instance_id(dev, isa->iobase, 3); 81 82 memory_region_init_io(&s->io, OBJECT(isa), &serial_io_ops, s, "serial", 8); 83 isa_register_ioport(isadev, &s->io, isa->iobase); 84 } 85 86 static void serial_isa_build_aml(ISADevice *isadev, Aml *scope) 87 { 88 ISASerialState *isa = ISA_SERIAL(isadev); 89 Aml *dev; 90 Aml *crs; 91 92 crs = aml_resource_template(); 93 aml_append(crs, aml_io(AML_DECODE16, isa->iobase, isa->iobase, 0x00, 0x08)); 94 aml_append(crs, aml_irq_no_flags(isa->isairq)); 95 96 dev = aml_device("COM%d", isa->index + 1); 97 aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0501"))); 98 aml_append(dev, aml_name_decl("_UID", aml_int(isa->index + 1))); 99 aml_append(dev, aml_name_decl("_STA", aml_int(0xf))); 100 aml_append(dev, aml_name_decl("_CRS", crs)); 101 102 aml_append(scope, dev); 103 } 104 105 static const VMStateDescription vmstate_isa_serial = { 106 .name = "serial", 107 .version_id = 3, 108 .minimum_version_id = 2, 109 .fields = (VMStateField[]) { 110 VMSTATE_STRUCT(state, ISASerialState, 0, vmstate_serial, SerialState), 111 VMSTATE_END_OF_LIST() 112 } 113 }; 114 115 static Property serial_isa_properties[] = { 116 DEFINE_PROP_UINT32("index", ISASerialState, index, -1), 117 DEFINE_PROP_UINT32("iobase", ISASerialState, iobase, -1), 118 DEFINE_PROP_UINT32("irq", ISASerialState, isairq, -1), 119 DEFINE_PROP_CHR("chardev", ISASerialState, state.chr), 120 DEFINE_PROP_UINT32("wakeup", ISASerialState, state.wakeup, 0), 121 DEFINE_PROP_END_OF_LIST(), 122 }; 123 124 static void serial_isa_class_initfn(ObjectClass *klass, void *data) 125 { 126 DeviceClass *dc = DEVICE_CLASS(klass); 127 ISADeviceClass *isa = ISA_DEVICE_CLASS(klass); 128 129 dc->realize = serial_isa_realizefn; 130 dc->vmsd = &vmstate_isa_serial; 131 isa->build_aml = serial_isa_build_aml; 132 device_class_set_props(dc, serial_isa_properties); 133 set_bit(DEVICE_CATEGORY_INPUT, dc->categories); 134 } 135 136 static void serial_isa_initfn(Object *o) 137 { 138 ISASerialState *self = ISA_SERIAL(o); 139 140 object_initialize_child(o, "serial", &self->state, TYPE_SERIAL); 141 } 142 143 static const TypeInfo serial_isa_info = { 144 .name = TYPE_ISA_SERIAL, 145 .parent = TYPE_ISA_DEVICE, 146 .instance_size = sizeof(ISASerialState), 147 .instance_init = serial_isa_initfn, 148 .class_init = serial_isa_class_initfn, 149 }; 150 151 static void serial_register_types(void) 152 { 153 type_register_static(&serial_isa_info); 154 } 155 156 type_init(serial_register_types) 157 158 static void serial_isa_init(ISABus *bus, int index, Chardev *chr) 159 { 160 DeviceState *dev; 161 ISADevice *isadev; 162 163 isadev = isa_new(TYPE_ISA_SERIAL); 164 dev = DEVICE(isadev); 165 qdev_prop_set_uint32(dev, "index", index); 166 qdev_prop_set_chr(dev, "chardev", chr); 167 isa_realize_and_unref(isadev, bus, &error_fatal); 168 } 169 170 void serial_hds_isa_init(ISABus *bus, int from, int to) 171 { 172 int i; 173 174 assert(from >= 0); 175 assert(to <= MAX_ISA_SERIAL_PORTS); 176 177 for (i = from; i < to; ++i) { 178 if (serial_hd(i)) { 179 serial_isa_init(bus, i, serial_hd(i)); 180 } 181 } 182 } 183