1 /* 2 * QEMU RISC-V Host Target Interface (HTIF) Emulation 3 * 4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu 5 * Copyright (c) 2017-2018 SiFive, Inc. 6 * 7 * This provides HTIF device emulation for QEMU. At the moment this allows 8 * for identical copies of bbl/linux to run on both spike and QEMU. 9 * 10 * This program is free software; you can redistribute it and/or modify it 11 * under the terms and conditions of the GNU General Public License, 12 * version 2 or later, as published by the Free Software Foundation. 13 * 14 * This program is distributed in the hope it will be useful, but WITHOUT 15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 17 * more details. 18 * 19 * You should have received a copy of the GNU General Public License along with 20 * this program. If not, see <http://www.gnu.org/licenses/>. 21 */ 22 23 #include "qemu/osdep.h" 24 #include "qapi/error.h" 25 #include "qemu/log.h" 26 #include "hw/char/riscv_htif.h" 27 #include "chardev/char.h" 28 #include "chardev/char-fe.h" 29 #include "qemu/timer.h" 30 #include "qemu/error-report.h" 31 #include "system/address-spaces.h" 32 #include "system/dma.h" 33 #include "system/runstate.h" 34 #include "trace.h" 35 36 #define HTIF_DEV_SHIFT 56 37 #define HTIF_CMD_SHIFT 48 38 39 #define HTIF_DEV_SYSTEM 0 40 #define HTIF_DEV_CONSOLE 1 41 42 #define HTIF_SYSTEM_CMD_SYSCALL 0 43 #define HTIF_CONSOLE_CMD_GETC 0 44 #define HTIF_CONSOLE_CMD_PUTC 1 45 46 /* PK system call number */ 47 #define PK_SYS_WRITE 64 48 49 const char *sig_file; 50 uint8_t line_size = 16; 51 52 static uint64_t fromhost_addr, tohost_addr, begin_sig_addr, end_sig_addr; 53 54 void htif_symbol_callback(const char *st_name, int st_info, uint64_t st_value, 55 uint64_t st_size) 56 { 57 if (strcmp("fromhost", st_name) == 0) { 58 fromhost_addr = st_value; 59 if (st_size != 8) { 60 error_report("HTIF fromhost must be 8 bytes"); 61 exit(1); 62 } 63 } else if (strcmp("tohost", st_name) == 0) { 64 tohost_addr = st_value; 65 if (st_size != 8) { 66 error_report("HTIF tohost must be 8 bytes"); 67 exit(1); 68 } 69 } else if (strcmp("begin_signature", st_name) == 0) { 70 begin_sig_addr = st_value; 71 } else if (strcmp("end_signature", st_name) == 0) { 72 end_sig_addr = st_value; 73 } 74 } 75 76 /* 77 * Called by the char dev to see if HTIF is ready to accept input. 78 */ 79 static int htif_can_recv(void *opaque) 80 { 81 return 1; 82 } 83 84 /* 85 * Called by the char dev to supply input to HTIF console. 86 * We assume that we will receive one character at a time. 87 */ 88 static void htif_recv(void *opaque, const uint8_t *buf, int size) 89 { 90 HTIFState *s = opaque; 91 92 if (size != 1) { 93 return; 94 } 95 96 /* 97 * TODO - we need to check whether mfromhost is zero which indicates 98 * the device is ready to receive. The current implementation 99 * will drop characters 100 */ 101 102 uint64_t val_written = s->pending_read; 103 uint64_t resp = 0x100 | *buf; 104 105 s->fromhost = (val_written >> 48 << 48) | (resp << 16 >> 16); 106 } 107 108 /* 109 * Called by the char dev to supply special events to the HTIF console. 110 * Not used for HTIF. 111 */ 112 static void htif_event(void *opaque, QEMUChrEvent event) 113 { 114 115 } 116 117 static int htif_be_change(void *opaque) 118 { 119 HTIFState *s = opaque; 120 121 qemu_chr_fe_set_handlers(&s->chr, htif_can_recv, htif_recv, htif_event, 122 htif_be_change, s, NULL, true); 123 124 return 0; 125 } 126 127 /* 128 * See below the tohost register format. 129 * 130 * Bits 63:56 indicate the "device". 131 * Bits 55:48 indicate the "command". 132 * 133 * Device 0 is the syscall device, which is used to emulate Unixy syscalls. 134 * It only implements command 0, which has two subfunctions: 135 * - If bit 0 is clear, then bits 47:0 represent a pointer to a struct 136 * describing the syscall. 137 * - If bit 1 is set, then bits 47:1 represent an exit code, with a zero 138 * value indicating success and other values indicating failure. 139 * 140 * Device 1 is the blocking character device. 141 * - Command 0 reads a character 142 * - Command 1 writes a character from the 8 LSBs of tohost 143 * 144 * For RV32, the tohost register is zero-extended, so only device=0 and 145 * command=0 (i.e. HTIF syscalls/exit codes) are supported. 146 */ 147 static void htif_handle_tohost_write(HTIFState *s, uint64_t val_written) 148 { 149 uint8_t device = val_written >> HTIF_DEV_SHIFT; 150 uint8_t cmd = val_written >> HTIF_CMD_SHIFT; 151 uint64_t payload = val_written & 0xFFFFFFFFFFFFULL; 152 int resp = 0; 153 154 trace_htif_uart_write_to_host(device, cmd, payload); 155 156 /* 157 * Currently, there is a fixed mapping of devices: 158 * 0: riscv-tests Pass/Fail Reporting Only (no syscall proxy) 159 * 1: Console 160 */ 161 if (unlikely(device == HTIF_DEV_SYSTEM)) { 162 /* frontend syscall handler, shutdown and exit code support */ 163 if (cmd == HTIF_SYSTEM_CMD_SYSCALL) { 164 if (payload & 0x1) { 165 /* exit code */ 166 int exit_code = payload >> 1; 167 168 /* 169 * Dump signature data if sig_file is specified and 170 * begin/end_signature symbols exist. 171 */ 172 if (sig_file && begin_sig_addr && end_sig_addr) { 173 uint64_t sig_len = end_sig_addr - begin_sig_addr; 174 char *sig_data = g_malloc(sig_len); 175 dma_memory_read(&address_space_memory, begin_sig_addr, 176 sig_data, sig_len, MEMTXATTRS_UNSPECIFIED); 177 FILE *signature = fopen(sig_file, "w"); 178 if (signature == NULL) { 179 error_report("Unable to open %s with error %s", 180 sig_file, strerror(errno)); 181 exit(1); 182 } 183 184 for (int i = 0; i < sig_len; i += line_size) { 185 for (int j = line_size; j > 0; j--) { 186 if (i + j <= sig_len) { 187 fprintf(signature, "%02x", 188 sig_data[i + j - 1] & 0xff); 189 } else { 190 fprintf(signature, "%02x", 0); 191 } 192 } 193 fprintf(signature, "\n"); 194 } 195 196 fclose(signature); 197 g_free(sig_data); 198 } 199 200 qemu_system_shutdown_request_with_code( 201 SHUTDOWN_CAUSE_GUEST_SHUTDOWN, exit_code); 202 return; 203 } else { 204 uint64_t syscall[8]; 205 cpu_physical_memory_read(payload, syscall, sizeof(syscall)); 206 if (le64_to_cpu(syscall[0]) == PK_SYS_WRITE && 207 le64_to_cpu(syscall[1]) == HTIF_DEV_CONSOLE && 208 le64_to_cpu(syscall[3]) == HTIF_CONSOLE_CMD_PUTC) { 209 uint8_t ch; 210 cpu_physical_memory_read(le64_to_cpu(syscall[2]), &ch, 1); 211 /* 212 * XXX this blocks entire thread. Rewrite to use 213 * qemu_chr_fe_write and background I/O callbacks 214 */ 215 qemu_chr_fe_write_all(&s->chr, &ch, 1); 216 resp = 0x100 | (uint8_t)payload; 217 } else { 218 qemu_log_mask(LOG_UNIMP, 219 "pk syscall proxy not supported\n"); 220 } 221 } 222 } else { 223 qemu_log("HTIF device %d: unknown command\n", device); 224 } 225 } else if (likely(device == HTIF_DEV_CONSOLE)) { 226 /* HTIF Console */ 227 if (cmd == HTIF_CONSOLE_CMD_GETC) { 228 /* this should be a queue, but not yet implemented as such */ 229 s->pending_read = val_written; 230 s->tohost = 0; /* clear to indicate we read */ 231 return; 232 } else if (cmd == HTIF_CONSOLE_CMD_PUTC) { 233 uint8_t ch = (uint8_t)payload; 234 /* 235 * XXX this blocks entire thread. Rewrite to use 236 * qemu_chr_fe_write and background I/O callbacks 237 */ 238 qemu_chr_fe_write_all(&s->chr, &ch, 1); 239 resp = 0x100 | (uint8_t)payload; 240 } else { 241 qemu_log("HTIF device %d: unknown command\n", device); 242 } 243 } else { 244 qemu_log("HTIF unknown device or command\n"); 245 trace_htif_uart_unknown_device_command(device, cmd, payload); 246 } 247 /* 248 * Latest bbl does not set fromhost to 0 if there is a value in tohost. 249 * With this code enabled, qemu hangs waiting for fromhost to go to 0. 250 * With this code disabled, qemu works with bbl priv v1.9.1 and v1.10. 251 * HTIF needs protocol documentation and a more complete state machine. 252 * 253 * while (!s->fromhost_inprogress && 254 * s->fromhost != 0x0) { 255 * } 256 */ 257 s->fromhost = (val_written >> 48 << 48) | (resp << 16 >> 16); 258 s->tohost = 0; /* clear to indicate we read */ 259 } 260 261 #define TOHOST_OFFSET1 (s->tohost_offset) 262 #define TOHOST_OFFSET2 (s->tohost_offset + 4) 263 #define FROMHOST_OFFSET1 (s->fromhost_offset) 264 #define FROMHOST_OFFSET2 (s->fromhost_offset + 4) 265 266 /* CPU wants to read an HTIF register */ 267 static uint64_t htif_mm_read(void *opaque, hwaddr addr, unsigned size) 268 { 269 HTIFState *s = opaque; 270 if (addr == TOHOST_OFFSET1) { 271 return s->tohost & 0xFFFFFFFF; 272 } else if (addr == TOHOST_OFFSET2) { 273 return (s->tohost >> 32) & 0xFFFFFFFF; 274 } else if (addr == FROMHOST_OFFSET1) { 275 return s->fromhost & 0xFFFFFFFF; 276 } else if (addr == FROMHOST_OFFSET2) { 277 return (s->fromhost >> 32) & 0xFFFFFFFF; 278 } else { 279 qemu_log("Invalid htif read: address %016" PRIx64 "\n", 280 (uint64_t)addr); 281 return 0; 282 } 283 } 284 285 /* CPU wrote to an HTIF register */ 286 static void htif_mm_write(void *opaque, hwaddr addr, 287 uint64_t value, unsigned size) 288 { 289 HTIFState *s = opaque; 290 if (addr == TOHOST_OFFSET1) { 291 if (s->tohost == 0x0) { 292 s->allow_tohost = 1; 293 s->tohost = value & 0xFFFFFFFF; 294 } else { 295 s->allow_tohost = 0; 296 } 297 } else if (addr == TOHOST_OFFSET2) { 298 if (s->allow_tohost) { 299 s->tohost |= value << 32; 300 htif_handle_tohost_write(s, s->tohost); 301 } 302 } else if (addr == FROMHOST_OFFSET1) { 303 s->fromhost_inprogress = 1; 304 s->fromhost = value & 0xFFFFFFFF; 305 } else if (addr == FROMHOST_OFFSET2) { 306 s->fromhost |= value << 32; 307 s->fromhost_inprogress = 0; 308 } else { 309 qemu_log("Invalid htif write: address %016" PRIx64 "\n", 310 (uint64_t)addr); 311 } 312 } 313 314 static const MemoryRegionOps htif_mm_ops = { 315 .read = htif_mm_read, 316 .write = htif_mm_write, 317 .endianness = DEVICE_LITTLE_ENDIAN, 318 .impl = { 319 .min_access_size = 4, 320 .max_access_size = 4, 321 }, 322 }; 323 324 HTIFState *htif_mm_init(MemoryRegion *address_space, Chardev *chr, 325 uint64_t nonelf_base, bool custom_base) 326 { 327 uint64_t base, size, tohost_offset, fromhost_offset; 328 329 if (custom_base) { 330 fromhost_addr = nonelf_base; 331 tohost_addr = nonelf_base + 8; 332 } else { 333 if (!fromhost_addr || !tohost_addr) { 334 error_report("Invalid HTIF fromhost or tohost address"); 335 exit(1); 336 } 337 } 338 339 base = MIN(tohost_addr, fromhost_addr); 340 size = MAX(tohost_addr + 8, fromhost_addr + 8) - base; 341 tohost_offset = tohost_addr - base; 342 fromhost_offset = fromhost_addr - base; 343 344 HTIFState *s = g_new0(HTIFState, 1); 345 s->tohost_offset = tohost_offset; 346 s->fromhost_offset = fromhost_offset; 347 s->pending_read = 0; 348 s->allow_tohost = 0; 349 s->fromhost_inprogress = 0; 350 qemu_chr_fe_init(&s->chr, chr, &error_abort); 351 qemu_chr_fe_set_handlers(&s->chr, htif_can_recv, htif_recv, htif_event, 352 htif_be_change, s, NULL, true); 353 354 memory_region_init_io(&s->mmio, NULL, &htif_mm_ops, s, 355 TYPE_HTIF_UART, size); 356 memory_region_add_subregion_overlap(address_space, base, 357 &s->mmio, 1); 358 359 return s; 360 } 361