1 /* 2 * QEMU Bochs-style debug console ("port E9") emulation 3 * 4 * Copyright (c) 2003-2004 Fabrice Bellard 5 * Copyright (c) 2008 Citrix Systems, Inc. 6 * Copyright (c) Intel Corporation; author: H. Peter Anvin 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a copy 9 * of this software and associated documentation files (the "Software"), to deal 10 * in the Software without restriction, including without limitation the rights 11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 12 * copies of the Software, and to permit persons to whom the Software is 13 * furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 24 * THE SOFTWARE. 25 */ 26 27 #include "qemu/osdep.h" 28 #include "qapi/error.h" 29 #include "qemu/module.h" 30 #include "chardev/char-fe.h" 31 #include "hw/isa/isa.h" 32 #include "hw/qdev-properties.h" 33 #include "hw/qdev-properties-system.h" 34 #include "qom/object.h" 35 36 #define TYPE_ISA_DEBUGCON_DEVICE "isa-debugcon" 37 OBJECT_DECLARE_SIMPLE_TYPE(ISADebugconState, ISA_DEBUGCON_DEVICE) 38 39 //#define DEBUG_DEBUGCON 40 41 typedef struct DebugconState { 42 MemoryRegion io; 43 CharBackend chr; 44 uint32_t readback; 45 } DebugconState; 46 47 struct ISADebugconState { 48 ISADevice parent_obj; 49 50 uint32_t iobase; 51 DebugconState state; 52 }; 53 54 static void debugcon_ioport_write(void *opaque, hwaddr addr, uint64_t val, 55 unsigned width) 56 { 57 DebugconState *s = opaque; 58 unsigned char ch = val; 59 60 #ifdef DEBUG_DEBUGCON 61 printf(" [debugcon: write addr=0x%04" HWADDR_PRIx " val=0x%02" PRIx64 "]\n", addr, val); 62 #endif 63 64 /* XXX this blocks entire thread. Rewrite to use 65 * qemu_chr_fe_write and background I/O callbacks */ 66 qemu_chr_fe_write_all(&s->chr, &ch, 1); 67 } 68 69 70 static uint64_t debugcon_ioport_read(void *opaque, hwaddr addr, unsigned width) 71 { 72 DebugconState *s = opaque; 73 74 #ifdef DEBUG_DEBUGCON 75 printf("debugcon: read addr=0x%04" HWADDR_PRIx "\n", addr); 76 #endif 77 78 return s->readback; 79 } 80 81 static const MemoryRegionOps debugcon_ops = { 82 .read = debugcon_ioport_read, 83 .write = debugcon_ioport_write, 84 .valid.min_access_size = 1, 85 .valid.max_access_size = 1, 86 .endianness = DEVICE_LITTLE_ENDIAN, 87 }; 88 89 static void debugcon_realize_core(DebugconState *s, Error **errp) 90 { 91 if (!qemu_chr_fe_backend_connected(&s->chr)) { 92 error_setg(errp, "Can't create debugcon device, empty char device"); 93 return; 94 } 95 96 qemu_chr_fe_set_handlers(&s->chr, NULL, NULL, NULL, NULL, s, NULL, true); 97 } 98 99 static void debugcon_isa_realizefn(DeviceState *dev, Error **errp) 100 { 101 ISADevice *d = ISA_DEVICE(dev); 102 ISADebugconState *isa = ISA_DEBUGCON_DEVICE(dev); 103 DebugconState *s = &isa->state; 104 Error *err = NULL; 105 106 debugcon_realize_core(s, &err); 107 if (err != NULL) { 108 error_propagate(errp, err); 109 return; 110 } 111 memory_region_init_io(&s->io, OBJECT(dev), &debugcon_ops, s, 112 TYPE_ISA_DEBUGCON_DEVICE, 1); 113 memory_region_add_subregion(isa_address_space_io(d), 114 isa->iobase, &s->io); 115 } 116 117 static Property debugcon_isa_properties[] = { 118 DEFINE_PROP_UINT32("iobase", ISADebugconState, iobase, 0xe9), 119 DEFINE_PROP_CHR("chardev", ISADebugconState, state.chr), 120 DEFINE_PROP_UINT32("readback", ISADebugconState, state.readback, 0xe9), 121 DEFINE_PROP_END_OF_LIST(), 122 }; 123 124 static void debugcon_isa_class_initfn(ObjectClass *klass, void *data) 125 { 126 DeviceClass *dc = DEVICE_CLASS(klass); 127 128 dc->realize = debugcon_isa_realizefn; 129 device_class_set_props(dc, debugcon_isa_properties); 130 set_bit(DEVICE_CATEGORY_MISC, dc->categories); 131 } 132 133 static const TypeInfo debugcon_isa_info = { 134 .name = TYPE_ISA_DEBUGCON_DEVICE, 135 .parent = TYPE_ISA_DEVICE, 136 .instance_size = sizeof(ISADebugconState), 137 .class_init = debugcon_isa_class_initfn, 138 }; 139 140 static void debugcon_register_types(void) 141 { 142 type_register_static(&debugcon_isa_info); 143 } 144 145 type_init(debugcon_register_types) 146