1 /* 2 * QEMU Floppy disk emulator (Intel 82078) 3 * 4 * Copyright (c) 2003, 2007 Jocelyn Mayer 5 * Copyright (c) 2008 Hervé Poussineau 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 /* 26 * The controller is used in Sun4m systems in a slightly different 27 * way. There are changes in DOR register and DMA is not available. 28 */ 29 30 #include "qemu/osdep.h" 31 #include "hw/hw.h" 32 #include "hw/block/fdc.h" 33 #include "qapi/error.h" 34 #include "qemu/error-report.h" 35 #include "qemu/timer.h" 36 #include "hw/isa/isa.h" 37 #include "hw/sysbus.h" 38 #include "hw/block/block.h" 39 #include "sysemu/block-backend.h" 40 #include "sysemu/blockdev.h" 41 #include "sysemu/sysemu.h" 42 #include "qemu/log.h" 43 44 /********************************************************/ 45 /* debug Floppy devices */ 46 47 #define DEBUG_FLOPPY 0 48 49 #define FLOPPY_DPRINTF(fmt, ...) \ 50 do { \ 51 if (DEBUG_FLOPPY) { \ 52 fprintf(stderr, "FLOPPY: " fmt , ## __VA_ARGS__); \ 53 } \ 54 } while (0) 55 56 57 /********************************************************/ 58 /* qdev floppy bus */ 59 60 #define TYPE_FLOPPY_BUS "floppy-bus" 61 #define FLOPPY_BUS(obj) OBJECT_CHECK(FloppyBus, (obj), TYPE_FLOPPY_BUS) 62 63 typedef struct FDCtrl FDCtrl; 64 typedef struct FDrive FDrive; 65 static FDrive *get_drv(FDCtrl *fdctrl, int unit); 66 67 typedef struct FloppyBus { 68 BusState bus; 69 FDCtrl *fdc; 70 } FloppyBus; 71 72 static const TypeInfo floppy_bus_info = { 73 .name = TYPE_FLOPPY_BUS, 74 .parent = TYPE_BUS, 75 .instance_size = sizeof(FloppyBus), 76 }; 77 78 static void floppy_bus_create(FDCtrl *fdc, FloppyBus *bus, DeviceState *dev) 79 { 80 qbus_create_inplace(bus, sizeof(FloppyBus), TYPE_FLOPPY_BUS, dev, NULL); 81 bus->fdc = fdc; 82 } 83 84 85 /********************************************************/ 86 /* Floppy drive emulation */ 87 88 typedef enum FDriveRate { 89 FDRIVE_RATE_500K = 0x00, /* 500 Kbps */ 90 FDRIVE_RATE_300K = 0x01, /* 300 Kbps */ 91 FDRIVE_RATE_250K = 0x02, /* 250 Kbps */ 92 FDRIVE_RATE_1M = 0x03, /* 1 Mbps */ 93 } FDriveRate; 94 95 typedef enum FDriveSize { 96 FDRIVE_SIZE_UNKNOWN, 97 FDRIVE_SIZE_350, 98 FDRIVE_SIZE_525, 99 } FDriveSize; 100 101 typedef struct FDFormat { 102 FloppyDriveType drive; 103 uint8_t last_sect; 104 uint8_t max_track; 105 uint8_t max_head; 106 FDriveRate rate; 107 } FDFormat; 108 109 /* In many cases, the total sector size of a format is enough to uniquely 110 * identify it. However, there are some total sector collisions between 111 * formats of different physical size, and these are noted below by 112 * highlighting the total sector size for entries with collisions. */ 113 static const FDFormat fd_formats[] = { 114 /* First entry is default format */ 115 /* 1.44 MB 3"1/2 floppy disks */ 116 { FLOPPY_DRIVE_TYPE_144, 18, 80, 1, FDRIVE_RATE_500K, }, /* 3.5" 2880 */ 117 { FLOPPY_DRIVE_TYPE_144, 20, 80, 1, FDRIVE_RATE_500K, }, /* 3.5" 3200 */ 118 { FLOPPY_DRIVE_TYPE_144, 21, 80, 1, FDRIVE_RATE_500K, }, 119 { FLOPPY_DRIVE_TYPE_144, 21, 82, 1, FDRIVE_RATE_500K, }, 120 { FLOPPY_DRIVE_TYPE_144, 21, 83, 1, FDRIVE_RATE_500K, }, 121 { FLOPPY_DRIVE_TYPE_144, 22, 80, 1, FDRIVE_RATE_500K, }, 122 { FLOPPY_DRIVE_TYPE_144, 23, 80, 1, FDRIVE_RATE_500K, }, 123 { FLOPPY_DRIVE_TYPE_144, 24, 80, 1, FDRIVE_RATE_500K, }, 124 /* 2.88 MB 3"1/2 floppy disks */ 125 { FLOPPY_DRIVE_TYPE_288, 36, 80, 1, FDRIVE_RATE_1M, }, 126 { FLOPPY_DRIVE_TYPE_288, 39, 80, 1, FDRIVE_RATE_1M, }, 127 { FLOPPY_DRIVE_TYPE_288, 40, 80, 1, FDRIVE_RATE_1M, }, 128 { FLOPPY_DRIVE_TYPE_288, 44, 80, 1, FDRIVE_RATE_1M, }, 129 { FLOPPY_DRIVE_TYPE_288, 48, 80, 1, FDRIVE_RATE_1M, }, 130 /* 720 kB 3"1/2 floppy disks */ 131 { FLOPPY_DRIVE_TYPE_144, 9, 80, 1, FDRIVE_RATE_250K, }, /* 3.5" 1440 */ 132 { FLOPPY_DRIVE_TYPE_144, 10, 80, 1, FDRIVE_RATE_250K, }, 133 { FLOPPY_DRIVE_TYPE_144, 10, 82, 1, FDRIVE_RATE_250K, }, 134 { FLOPPY_DRIVE_TYPE_144, 10, 83, 1, FDRIVE_RATE_250K, }, 135 { FLOPPY_DRIVE_TYPE_144, 13, 80, 1, FDRIVE_RATE_250K, }, 136 { FLOPPY_DRIVE_TYPE_144, 14, 80, 1, FDRIVE_RATE_250K, }, 137 /* 1.2 MB 5"1/4 floppy disks */ 138 { FLOPPY_DRIVE_TYPE_120, 15, 80, 1, FDRIVE_RATE_500K, }, 139 { FLOPPY_DRIVE_TYPE_120, 18, 80, 1, FDRIVE_RATE_500K, }, /* 5.25" 2880 */ 140 { FLOPPY_DRIVE_TYPE_120, 18, 82, 1, FDRIVE_RATE_500K, }, 141 { FLOPPY_DRIVE_TYPE_120, 18, 83, 1, FDRIVE_RATE_500K, }, 142 { FLOPPY_DRIVE_TYPE_120, 20, 80, 1, FDRIVE_RATE_500K, }, /* 5.25" 3200 */ 143 /* 720 kB 5"1/4 floppy disks */ 144 { FLOPPY_DRIVE_TYPE_120, 9, 80, 1, FDRIVE_RATE_250K, }, /* 5.25" 1440 */ 145 { FLOPPY_DRIVE_TYPE_120, 11, 80, 1, FDRIVE_RATE_250K, }, 146 /* 360 kB 5"1/4 floppy disks */ 147 { FLOPPY_DRIVE_TYPE_120, 9, 40, 1, FDRIVE_RATE_300K, }, /* 5.25" 720 */ 148 { FLOPPY_DRIVE_TYPE_120, 9, 40, 0, FDRIVE_RATE_300K, }, 149 { FLOPPY_DRIVE_TYPE_120, 10, 41, 1, FDRIVE_RATE_300K, }, 150 { FLOPPY_DRIVE_TYPE_120, 10, 42, 1, FDRIVE_RATE_300K, }, 151 /* 320 kB 5"1/4 floppy disks */ 152 { FLOPPY_DRIVE_TYPE_120, 8, 40, 1, FDRIVE_RATE_250K, }, 153 { FLOPPY_DRIVE_TYPE_120, 8, 40, 0, FDRIVE_RATE_250K, }, 154 /* 360 kB must match 5"1/4 better than 3"1/2... */ 155 { FLOPPY_DRIVE_TYPE_144, 9, 80, 0, FDRIVE_RATE_250K, }, /* 3.5" 720 */ 156 /* end */ 157 { FLOPPY_DRIVE_TYPE_NONE, -1, -1, 0, 0, }, 158 }; 159 160 static FDriveSize drive_size(FloppyDriveType drive) 161 { 162 switch (drive) { 163 case FLOPPY_DRIVE_TYPE_120: 164 return FDRIVE_SIZE_525; 165 case FLOPPY_DRIVE_TYPE_144: 166 case FLOPPY_DRIVE_TYPE_288: 167 return FDRIVE_SIZE_350; 168 default: 169 return FDRIVE_SIZE_UNKNOWN; 170 } 171 } 172 173 #define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv) 174 #define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive)) 175 176 /* Will always be a fixed parameter for us */ 177 #define FD_SECTOR_LEN 512 178 #define FD_SECTOR_SC 2 /* Sector size code */ 179 #define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */ 180 181 /* Floppy disk drive emulation */ 182 typedef enum FDiskFlags { 183 FDISK_DBL_SIDES = 0x01, 184 } FDiskFlags; 185 186 struct FDrive { 187 FDCtrl *fdctrl; 188 BlockBackend *blk; 189 BlockConf *conf; 190 /* Drive status */ 191 FloppyDriveType drive; /* CMOS drive type */ 192 uint8_t perpendicular; /* 2.88 MB access mode */ 193 /* Position */ 194 uint8_t head; 195 uint8_t track; 196 uint8_t sect; 197 /* Media */ 198 FloppyDriveType disk; /* Current disk type */ 199 FDiskFlags flags; 200 uint8_t last_sect; /* Nb sector per track */ 201 uint8_t max_track; /* Nb of tracks */ 202 uint16_t bps; /* Bytes per sector */ 203 uint8_t ro; /* Is read-only */ 204 uint8_t media_changed; /* Is media changed */ 205 uint8_t media_rate; /* Data rate of medium */ 206 207 bool media_validated; /* Have we validated the media? */ 208 }; 209 210 211 static FloppyDriveType get_fallback_drive_type(FDrive *drv); 212 213 /* Hack: FD_SEEK is expected to work on empty drives. However, QEMU 214 * currently goes through some pains to keep seeks within the bounds 215 * established by last_sect and max_track. Correcting this is difficult, 216 * as refactoring FDC code tends to expose nasty bugs in the Linux kernel. 217 * 218 * For now: allow empty drives to have large bounds so we can seek around, 219 * with the understanding that when a diskette is inserted, the bounds will 220 * properly tighten to match the geometry of that inserted medium. 221 */ 222 static void fd_empty_seek_hack(FDrive *drv) 223 { 224 drv->last_sect = 0xFF; 225 drv->max_track = 0xFF; 226 } 227 228 static void fd_init(FDrive *drv) 229 { 230 /* Drive */ 231 drv->perpendicular = 0; 232 /* Disk */ 233 drv->disk = FLOPPY_DRIVE_TYPE_NONE; 234 drv->last_sect = 0; 235 drv->max_track = 0; 236 drv->ro = true; 237 drv->media_changed = 1; 238 } 239 240 #define NUM_SIDES(drv) ((drv)->flags & FDISK_DBL_SIDES ? 2 : 1) 241 242 static int fd_sector_calc(uint8_t head, uint8_t track, uint8_t sect, 243 uint8_t last_sect, uint8_t num_sides) 244 { 245 return (((track * num_sides) + head) * last_sect) + sect - 1; 246 } 247 248 /* Returns current position, in sectors, for given drive */ 249 static int fd_sector(FDrive *drv) 250 { 251 return fd_sector_calc(drv->head, drv->track, drv->sect, drv->last_sect, 252 NUM_SIDES(drv)); 253 } 254 255 /* Returns current position, in bytes, for given drive */ 256 static int fd_offset(FDrive *drv) 257 { 258 g_assert(fd_sector(drv) < INT_MAX >> BDRV_SECTOR_BITS); 259 return fd_sector(drv) << BDRV_SECTOR_BITS; 260 } 261 262 /* Seek to a new position: 263 * returns 0 if already on right track 264 * returns 1 if track changed 265 * returns 2 if track is invalid 266 * returns 3 if sector is invalid 267 * returns 4 if seek is disabled 268 */ 269 static int fd_seek(FDrive *drv, uint8_t head, uint8_t track, uint8_t sect, 270 int enable_seek) 271 { 272 uint32_t sector; 273 int ret; 274 275 if (track > drv->max_track || 276 (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) { 277 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n", 278 head, track, sect, 1, 279 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1, 280 drv->max_track, drv->last_sect); 281 return 2; 282 } 283 if (sect > drv->last_sect) { 284 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n", 285 head, track, sect, 1, 286 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1, 287 drv->max_track, drv->last_sect); 288 return 3; 289 } 290 sector = fd_sector_calc(head, track, sect, drv->last_sect, NUM_SIDES(drv)); 291 ret = 0; 292 if (sector != fd_sector(drv)) { 293 #if 0 294 if (!enable_seek) { 295 FLOPPY_DPRINTF("error: no implicit seek %d %02x %02x" 296 " (max=%d %02x %02x)\n", 297 head, track, sect, 1, drv->max_track, 298 drv->last_sect); 299 return 4; 300 } 301 #endif 302 drv->head = head; 303 if (drv->track != track) { 304 if (drv->blk != NULL && blk_is_inserted(drv->blk)) { 305 drv->media_changed = 0; 306 } 307 ret = 1; 308 } 309 drv->track = track; 310 drv->sect = sect; 311 } 312 313 if (drv->blk == NULL || !blk_is_inserted(drv->blk)) { 314 ret = 2; 315 } 316 317 return ret; 318 } 319 320 /* Set drive back to track 0 */ 321 static void fd_recalibrate(FDrive *drv) 322 { 323 FLOPPY_DPRINTF("recalibrate\n"); 324 fd_seek(drv, 0, 0, 1, 1); 325 } 326 327 /** 328 * Determine geometry based on inserted diskette. 329 * Will not operate on an empty drive. 330 * 331 * @return: 0 on success, -1 if the drive is empty. 332 */ 333 static int pick_geometry(FDrive *drv) 334 { 335 BlockBackend *blk = drv->blk; 336 const FDFormat *parse; 337 uint64_t nb_sectors, size; 338 int i; 339 int match, size_match, type_match; 340 bool magic = drv->drive == FLOPPY_DRIVE_TYPE_AUTO; 341 342 /* We can only pick a geometry if we have a diskette. */ 343 if (!drv->blk || !blk_is_inserted(drv->blk) || 344 drv->drive == FLOPPY_DRIVE_TYPE_NONE) 345 { 346 return -1; 347 } 348 349 /* We need to determine the likely geometry of the inserted medium. 350 * In order of preference, we look for: 351 * (1) The same drive type and number of sectors, 352 * (2) The same diskette size and number of sectors, 353 * (3) The same drive type. 354 * 355 * In all cases, matches that occur higher in the drive table will take 356 * precedence over matches that occur later in the table. 357 */ 358 blk_get_geometry(blk, &nb_sectors); 359 match = size_match = type_match = -1; 360 for (i = 0; ; i++) { 361 parse = &fd_formats[i]; 362 if (parse->drive == FLOPPY_DRIVE_TYPE_NONE) { 363 break; 364 } 365 size = (parse->max_head + 1) * parse->max_track * parse->last_sect; 366 if (nb_sectors == size) { 367 if (magic || parse->drive == drv->drive) { 368 /* (1) perfect match -- nb_sectors and drive type */ 369 goto out; 370 } else if (drive_size(parse->drive) == drive_size(drv->drive)) { 371 /* (2) size match -- nb_sectors and physical medium size */ 372 match = (match == -1) ? i : match; 373 } else { 374 /* This is suspicious -- Did the user misconfigure? */ 375 size_match = (size_match == -1) ? i : size_match; 376 } 377 } else if (type_match == -1) { 378 if ((parse->drive == drv->drive) || 379 (magic && (parse->drive == get_fallback_drive_type(drv)))) { 380 /* (3) type match -- nb_sectors mismatch, but matches the type 381 * specified explicitly by the user, or matches the fallback 382 * default type when using the drive autodetect mechanism */ 383 type_match = i; 384 } 385 } 386 } 387 388 /* No exact match found */ 389 if (match == -1) { 390 if (size_match != -1) { 391 parse = &fd_formats[size_match]; 392 FLOPPY_DPRINTF("User requested floppy drive type '%s', " 393 "but inserted medium appears to be a " 394 "%"PRId64" sector '%s' type\n", 395 FloppyDriveType_str(drv->drive), 396 nb_sectors, 397 FloppyDriveType_str(parse->drive)); 398 } 399 match = type_match; 400 } 401 402 /* No match of any kind found -- fd_format is misconfigured, abort. */ 403 if (match == -1) { 404 error_setg(&error_abort, "No candidate geometries present in table " 405 " for floppy drive type '%s'", 406 FloppyDriveType_str(drv->drive)); 407 } 408 409 parse = &(fd_formats[match]); 410 411 out: 412 if (parse->max_head == 0) { 413 drv->flags &= ~FDISK_DBL_SIDES; 414 } else { 415 drv->flags |= FDISK_DBL_SIDES; 416 } 417 drv->max_track = parse->max_track; 418 drv->last_sect = parse->last_sect; 419 drv->disk = parse->drive; 420 drv->media_rate = parse->rate; 421 return 0; 422 } 423 424 static void pick_drive_type(FDrive *drv) 425 { 426 if (drv->drive != FLOPPY_DRIVE_TYPE_AUTO) { 427 return; 428 } 429 430 if (pick_geometry(drv) == 0) { 431 drv->drive = drv->disk; 432 } else { 433 drv->drive = get_fallback_drive_type(drv); 434 } 435 436 g_assert(drv->drive != FLOPPY_DRIVE_TYPE_AUTO); 437 } 438 439 /* Revalidate a disk drive after a disk change */ 440 static void fd_revalidate(FDrive *drv) 441 { 442 int rc; 443 444 FLOPPY_DPRINTF("revalidate\n"); 445 if (drv->blk != NULL) { 446 drv->ro = blk_is_read_only(drv->blk); 447 if (!blk_is_inserted(drv->blk)) { 448 FLOPPY_DPRINTF("No disk in drive\n"); 449 drv->disk = FLOPPY_DRIVE_TYPE_NONE; 450 fd_empty_seek_hack(drv); 451 } else if (!drv->media_validated) { 452 rc = pick_geometry(drv); 453 if (rc) { 454 FLOPPY_DPRINTF("Could not validate floppy drive media"); 455 } else { 456 drv->media_validated = true; 457 FLOPPY_DPRINTF("Floppy disk (%d h %d t %d s) %s\n", 458 (drv->flags & FDISK_DBL_SIDES) ? 2 : 1, 459 drv->max_track, drv->last_sect, 460 drv->ro ? "ro" : "rw"); 461 } 462 } 463 } else { 464 FLOPPY_DPRINTF("No drive connected\n"); 465 drv->last_sect = 0; 466 drv->max_track = 0; 467 drv->flags &= ~FDISK_DBL_SIDES; 468 drv->drive = FLOPPY_DRIVE_TYPE_NONE; 469 drv->disk = FLOPPY_DRIVE_TYPE_NONE; 470 } 471 } 472 473 static void fd_change_cb(void *opaque, bool load, Error **errp) 474 { 475 FDrive *drive = opaque; 476 Error *local_err = NULL; 477 478 if (!load) { 479 blk_set_perm(drive->blk, 0, BLK_PERM_ALL, &error_abort); 480 } else { 481 blkconf_apply_backend_options(drive->conf, 482 blk_is_read_only(drive->blk), false, 483 &local_err); 484 if (local_err) { 485 error_propagate(errp, local_err); 486 return; 487 } 488 } 489 490 drive->media_changed = 1; 491 drive->media_validated = false; 492 fd_revalidate(drive); 493 } 494 495 static const BlockDevOps fd_block_ops = { 496 .change_media_cb = fd_change_cb, 497 }; 498 499 500 #define TYPE_FLOPPY_DRIVE "floppy" 501 #define FLOPPY_DRIVE(obj) \ 502 OBJECT_CHECK(FloppyDrive, (obj), TYPE_FLOPPY_DRIVE) 503 504 typedef struct FloppyDrive { 505 DeviceState qdev; 506 uint32_t unit; 507 BlockConf conf; 508 FloppyDriveType type; 509 } FloppyDrive; 510 511 static Property floppy_drive_properties[] = { 512 DEFINE_PROP_UINT32("unit", FloppyDrive, unit, -1), 513 DEFINE_BLOCK_PROPERTIES(FloppyDrive, conf), 514 DEFINE_PROP_SIGNED("drive-type", FloppyDrive, type, 515 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type, 516 FloppyDriveType), 517 DEFINE_PROP_END_OF_LIST(), 518 }; 519 520 static void floppy_drive_realize(DeviceState *qdev, Error **errp) 521 { 522 FloppyDrive *dev = FLOPPY_DRIVE(qdev); 523 FloppyBus *bus = FLOPPY_BUS(qdev->parent_bus); 524 FDrive *drive; 525 Error *local_err = NULL; 526 int ret; 527 528 if (dev->unit == -1) { 529 for (dev->unit = 0; dev->unit < MAX_FD; dev->unit++) { 530 drive = get_drv(bus->fdc, dev->unit); 531 if (!drive->blk) { 532 break; 533 } 534 } 535 } 536 537 if (dev->unit >= MAX_FD) { 538 error_setg(errp, "Can't create floppy unit %d, bus supports " 539 "only %d units", dev->unit, MAX_FD); 540 return; 541 } 542 543 drive = get_drv(bus->fdc, dev->unit); 544 if (drive->blk) { 545 error_setg(errp, "Floppy unit %d is in use", dev->unit); 546 return; 547 } 548 549 if (!dev->conf.blk) { 550 /* Anonymous BlockBackend for an empty drive */ 551 dev->conf.blk = blk_new(0, BLK_PERM_ALL); 552 ret = blk_attach_dev(dev->conf.blk, qdev); 553 assert(ret == 0); 554 } 555 556 blkconf_blocksizes(&dev->conf); 557 if (dev->conf.logical_block_size != 512 || 558 dev->conf.physical_block_size != 512) 559 { 560 error_setg(errp, "Physical and logical block size must " 561 "be 512 for floppy"); 562 return; 563 } 564 565 /* rerror/werror aren't supported by fdc and therefore not even registered 566 * with qdev. So set the defaults manually before they are used in 567 * blkconf_apply_backend_options(). */ 568 dev->conf.rerror = BLOCKDEV_ON_ERROR_AUTO; 569 dev->conf.werror = BLOCKDEV_ON_ERROR_AUTO; 570 571 blkconf_apply_backend_options(&dev->conf, blk_is_read_only(dev->conf.blk), 572 false, &local_err); 573 if (local_err) { 574 error_propagate(errp, local_err); 575 return; 576 } 577 578 /* 'enospc' is the default for -drive, 'report' is what blk_new() gives us 579 * for empty drives. */ 580 if (blk_get_on_error(dev->conf.blk, 0) != BLOCKDEV_ON_ERROR_ENOSPC && 581 blk_get_on_error(dev->conf.blk, 0) != BLOCKDEV_ON_ERROR_REPORT) { 582 error_setg(errp, "fdc doesn't support drive option werror"); 583 return; 584 } 585 if (blk_get_on_error(dev->conf.blk, 1) != BLOCKDEV_ON_ERROR_REPORT) { 586 error_setg(errp, "fdc doesn't support drive option rerror"); 587 return; 588 } 589 590 drive->conf = &dev->conf; 591 drive->blk = dev->conf.blk; 592 drive->fdctrl = bus->fdc; 593 594 fd_init(drive); 595 blk_set_dev_ops(drive->blk, &fd_block_ops, drive); 596 597 /* Keep 'type' qdev property and FDrive->drive in sync */ 598 drive->drive = dev->type; 599 pick_drive_type(drive); 600 dev->type = drive->drive; 601 602 fd_revalidate(drive); 603 } 604 605 static void floppy_drive_class_init(ObjectClass *klass, void *data) 606 { 607 DeviceClass *k = DEVICE_CLASS(klass); 608 k->realize = floppy_drive_realize; 609 set_bit(DEVICE_CATEGORY_STORAGE, k->categories); 610 k->bus_type = TYPE_FLOPPY_BUS; 611 k->props = floppy_drive_properties; 612 k->desc = "virtual floppy drive"; 613 } 614 615 static const TypeInfo floppy_drive_info = { 616 .name = TYPE_FLOPPY_DRIVE, 617 .parent = TYPE_DEVICE, 618 .instance_size = sizeof(FloppyDrive), 619 .class_init = floppy_drive_class_init, 620 }; 621 622 /********************************************************/ 623 /* Intel 82078 floppy disk controller emulation */ 624 625 static void fdctrl_reset(FDCtrl *fdctrl, int do_irq); 626 static void fdctrl_to_command_phase(FDCtrl *fdctrl); 627 static int fdctrl_transfer_handler (void *opaque, int nchan, 628 int dma_pos, int dma_len); 629 static void fdctrl_raise_irq(FDCtrl *fdctrl); 630 static FDrive *get_cur_drv(FDCtrl *fdctrl); 631 632 static uint32_t fdctrl_read_statusA(FDCtrl *fdctrl); 633 static uint32_t fdctrl_read_statusB(FDCtrl *fdctrl); 634 static uint32_t fdctrl_read_dor(FDCtrl *fdctrl); 635 static void fdctrl_write_dor(FDCtrl *fdctrl, uint32_t value); 636 static uint32_t fdctrl_read_tape(FDCtrl *fdctrl); 637 static void fdctrl_write_tape(FDCtrl *fdctrl, uint32_t value); 638 static uint32_t fdctrl_read_main_status(FDCtrl *fdctrl); 639 static void fdctrl_write_rate(FDCtrl *fdctrl, uint32_t value); 640 static uint32_t fdctrl_read_data(FDCtrl *fdctrl); 641 static void fdctrl_write_data(FDCtrl *fdctrl, uint32_t value); 642 static uint32_t fdctrl_read_dir(FDCtrl *fdctrl); 643 static void fdctrl_write_ccr(FDCtrl *fdctrl, uint32_t value); 644 645 enum { 646 FD_DIR_WRITE = 0, 647 FD_DIR_READ = 1, 648 FD_DIR_SCANE = 2, 649 FD_DIR_SCANL = 3, 650 FD_DIR_SCANH = 4, 651 FD_DIR_VERIFY = 5, 652 }; 653 654 enum { 655 FD_STATE_MULTI = 0x01, /* multi track flag */ 656 FD_STATE_FORMAT = 0x02, /* format flag */ 657 }; 658 659 enum { 660 FD_REG_SRA = 0x00, 661 FD_REG_SRB = 0x01, 662 FD_REG_DOR = 0x02, 663 FD_REG_TDR = 0x03, 664 FD_REG_MSR = 0x04, 665 FD_REG_DSR = 0x04, 666 FD_REG_FIFO = 0x05, 667 FD_REG_DIR = 0x07, 668 FD_REG_CCR = 0x07, 669 }; 670 671 enum { 672 FD_CMD_READ_TRACK = 0x02, 673 FD_CMD_SPECIFY = 0x03, 674 FD_CMD_SENSE_DRIVE_STATUS = 0x04, 675 FD_CMD_WRITE = 0x05, 676 FD_CMD_READ = 0x06, 677 FD_CMD_RECALIBRATE = 0x07, 678 FD_CMD_SENSE_INTERRUPT_STATUS = 0x08, 679 FD_CMD_WRITE_DELETED = 0x09, 680 FD_CMD_READ_ID = 0x0a, 681 FD_CMD_READ_DELETED = 0x0c, 682 FD_CMD_FORMAT_TRACK = 0x0d, 683 FD_CMD_DUMPREG = 0x0e, 684 FD_CMD_SEEK = 0x0f, 685 FD_CMD_VERSION = 0x10, 686 FD_CMD_SCAN_EQUAL = 0x11, 687 FD_CMD_PERPENDICULAR_MODE = 0x12, 688 FD_CMD_CONFIGURE = 0x13, 689 FD_CMD_LOCK = 0x14, 690 FD_CMD_VERIFY = 0x16, 691 FD_CMD_POWERDOWN_MODE = 0x17, 692 FD_CMD_PART_ID = 0x18, 693 FD_CMD_SCAN_LOW_OR_EQUAL = 0x19, 694 FD_CMD_SCAN_HIGH_OR_EQUAL = 0x1d, 695 FD_CMD_SAVE = 0x2e, 696 FD_CMD_OPTION = 0x33, 697 FD_CMD_RESTORE = 0x4e, 698 FD_CMD_DRIVE_SPECIFICATION_COMMAND = 0x8e, 699 FD_CMD_RELATIVE_SEEK_OUT = 0x8f, 700 FD_CMD_FORMAT_AND_WRITE = 0xcd, 701 FD_CMD_RELATIVE_SEEK_IN = 0xcf, 702 }; 703 704 enum { 705 FD_CONFIG_PRETRK = 0xff, /* Pre-compensation set to track 0 */ 706 FD_CONFIG_FIFOTHR = 0x0f, /* FIFO threshold set to 1 byte */ 707 FD_CONFIG_POLL = 0x10, /* Poll enabled */ 708 FD_CONFIG_EFIFO = 0x20, /* FIFO disabled */ 709 FD_CONFIG_EIS = 0x40, /* No implied seeks */ 710 }; 711 712 enum { 713 FD_SR0_DS0 = 0x01, 714 FD_SR0_DS1 = 0x02, 715 FD_SR0_HEAD = 0x04, 716 FD_SR0_EQPMT = 0x10, 717 FD_SR0_SEEK = 0x20, 718 FD_SR0_ABNTERM = 0x40, 719 FD_SR0_INVCMD = 0x80, 720 FD_SR0_RDYCHG = 0xc0, 721 }; 722 723 enum { 724 FD_SR1_MA = 0x01, /* Missing address mark */ 725 FD_SR1_NW = 0x02, /* Not writable */ 726 FD_SR1_EC = 0x80, /* End of cylinder */ 727 }; 728 729 enum { 730 FD_SR2_SNS = 0x04, /* Scan not satisfied */ 731 FD_SR2_SEH = 0x08, /* Scan equal hit */ 732 }; 733 734 enum { 735 FD_SRA_DIR = 0x01, 736 FD_SRA_nWP = 0x02, 737 FD_SRA_nINDX = 0x04, 738 FD_SRA_HDSEL = 0x08, 739 FD_SRA_nTRK0 = 0x10, 740 FD_SRA_STEP = 0x20, 741 FD_SRA_nDRV2 = 0x40, 742 FD_SRA_INTPEND = 0x80, 743 }; 744 745 enum { 746 FD_SRB_MTR0 = 0x01, 747 FD_SRB_MTR1 = 0x02, 748 FD_SRB_WGATE = 0x04, 749 FD_SRB_RDATA = 0x08, 750 FD_SRB_WDATA = 0x10, 751 FD_SRB_DR0 = 0x20, 752 }; 753 754 enum { 755 #if MAX_FD == 4 756 FD_DOR_SELMASK = 0x03, 757 #else 758 FD_DOR_SELMASK = 0x01, 759 #endif 760 FD_DOR_nRESET = 0x04, 761 FD_DOR_DMAEN = 0x08, 762 FD_DOR_MOTEN0 = 0x10, 763 FD_DOR_MOTEN1 = 0x20, 764 FD_DOR_MOTEN2 = 0x40, 765 FD_DOR_MOTEN3 = 0x80, 766 }; 767 768 enum { 769 #if MAX_FD == 4 770 FD_TDR_BOOTSEL = 0x0c, 771 #else 772 FD_TDR_BOOTSEL = 0x04, 773 #endif 774 }; 775 776 enum { 777 FD_DSR_DRATEMASK= 0x03, 778 FD_DSR_PWRDOWN = 0x40, 779 FD_DSR_SWRESET = 0x80, 780 }; 781 782 enum { 783 FD_MSR_DRV0BUSY = 0x01, 784 FD_MSR_DRV1BUSY = 0x02, 785 FD_MSR_DRV2BUSY = 0x04, 786 FD_MSR_DRV3BUSY = 0x08, 787 FD_MSR_CMDBUSY = 0x10, 788 FD_MSR_NONDMA = 0x20, 789 FD_MSR_DIO = 0x40, 790 FD_MSR_RQM = 0x80, 791 }; 792 793 enum { 794 FD_DIR_DSKCHG = 0x80, 795 }; 796 797 /* 798 * See chapter 5.0 "Controller phases" of the spec: 799 * 800 * Command phase: 801 * The host writes a command and its parameters into the FIFO. The command 802 * phase is completed when all parameters for the command have been supplied, 803 * and execution phase is entered. 804 * 805 * Execution phase: 806 * Data transfers, either DMA or non-DMA. For non-DMA transfers, the FIFO 807 * contains the payload now, otherwise it's unused. When all bytes of the 808 * required data have been transferred, the state is switched to either result 809 * phase (if the command produces status bytes) or directly back into the 810 * command phase for the next command. 811 * 812 * Result phase: 813 * The host reads out the FIFO, which contains one or more result bytes now. 814 */ 815 enum { 816 /* Only for migration: reconstruct phase from registers like qemu 2.3 */ 817 FD_PHASE_RECONSTRUCT = 0, 818 819 FD_PHASE_COMMAND = 1, 820 FD_PHASE_EXECUTION = 2, 821 FD_PHASE_RESULT = 3, 822 }; 823 824 #define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI) 825 #define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT) 826 827 struct FDCtrl { 828 MemoryRegion iomem; 829 qemu_irq irq; 830 /* Controller state */ 831 QEMUTimer *result_timer; 832 int dma_chann; 833 uint8_t phase; 834 IsaDma *dma; 835 /* Controller's identification */ 836 uint8_t version; 837 /* HW */ 838 uint8_t sra; 839 uint8_t srb; 840 uint8_t dor; 841 uint8_t dor_vmstate; /* only used as temp during vmstate */ 842 uint8_t tdr; 843 uint8_t dsr; 844 uint8_t msr; 845 uint8_t cur_drv; 846 uint8_t status0; 847 uint8_t status1; 848 uint8_t status2; 849 /* Command FIFO */ 850 uint8_t *fifo; 851 int32_t fifo_size; 852 uint32_t data_pos; 853 uint32_t data_len; 854 uint8_t data_state; 855 uint8_t data_dir; 856 uint8_t eot; /* last wanted sector */ 857 /* States kept only to be returned back */ 858 /* precompensation */ 859 uint8_t precomp_trk; 860 uint8_t config; 861 uint8_t lock; 862 /* Power down config (also with status regB access mode */ 863 uint8_t pwrd; 864 /* Floppy drives */ 865 FloppyBus bus; 866 uint8_t num_floppies; 867 FDrive drives[MAX_FD]; 868 struct { 869 BlockBackend *blk; 870 FloppyDriveType type; 871 } qdev_for_drives[MAX_FD]; 872 int reset_sensei; 873 uint32_t check_media_rate; 874 FloppyDriveType fallback; /* type=auto failure fallback */ 875 /* Timers state */ 876 uint8_t timer0; 877 uint8_t timer1; 878 PortioList portio_list; 879 }; 880 881 static FloppyDriveType get_fallback_drive_type(FDrive *drv) 882 { 883 return drv->fdctrl->fallback; 884 } 885 886 #define TYPE_SYSBUS_FDC "base-sysbus-fdc" 887 #define SYSBUS_FDC(obj) OBJECT_CHECK(FDCtrlSysBus, (obj), TYPE_SYSBUS_FDC) 888 889 typedef struct FDCtrlSysBus { 890 /*< private >*/ 891 SysBusDevice parent_obj; 892 /*< public >*/ 893 894 struct FDCtrl state; 895 } FDCtrlSysBus; 896 897 #define ISA_FDC(obj) OBJECT_CHECK(FDCtrlISABus, (obj), TYPE_ISA_FDC) 898 899 typedef struct FDCtrlISABus { 900 ISADevice parent_obj; 901 902 uint32_t iobase; 903 uint32_t irq; 904 uint32_t dma; 905 struct FDCtrl state; 906 int32_t bootindexA; 907 int32_t bootindexB; 908 } FDCtrlISABus; 909 910 static uint32_t fdctrl_read (void *opaque, uint32_t reg) 911 { 912 FDCtrl *fdctrl = opaque; 913 uint32_t retval; 914 915 reg &= 7; 916 switch (reg) { 917 case FD_REG_SRA: 918 retval = fdctrl_read_statusA(fdctrl); 919 break; 920 case FD_REG_SRB: 921 retval = fdctrl_read_statusB(fdctrl); 922 break; 923 case FD_REG_DOR: 924 retval = fdctrl_read_dor(fdctrl); 925 break; 926 case FD_REG_TDR: 927 retval = fdctrl_read_tape(fdctrl); 928 break; 929 case FD_REG_MSR: 930 retval = fdctrl_read_main_status(fdctrl); 931 break; 932 case FD_REG_FIFO: 933 retval = fdctrl_read_data(fdctrl); 934 break; 935 case FD_REG_DIR: 936 retval = fdctrl_read_dir(fdctrl); 937 break; 938 default: 939 retval = (uint32_t)(-1); 940 break; 941 } 942 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval); 943 944 return retval; 945 } 946 947 static void fdctrl_write (void *opaque, uint32_t reg, uint32_t value) 948 { 949 FDCtrl *fdctrl = opaque; 950 951 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value); 952 953 reg &= 7; 954 switch (reg) { 955 case FD_REG_DOR: 956 fdctrl_write_dor(fdctrl, value); 957 break; 958 case FD_REG_TDR: 959 fdctrl_write_tape(fdctrl, value); 960 break; 961 case FD_REG_DSR: 962 fdctrl_write_rate(fdctrl, value); 963 break; 964 case FD_REG_FIFO: 965 fdctrl_write_data(fdctrl, value); 966 break; 967 case FD_REG_CCR: 968 fdctrl_write_ccr(fdctrl, value); 969 break; 970 default: 971 break; 972 } 973 } 974 975 static uint64_t fdctrl_read_mem (void *opaque, hwaddr reg, 976 unsigned ize) 977 { 978 return fdctrl_read(opaque, (uint32_t)reg); 979 } 980 981 static void fdctrl_write_mem (void *opaque, hwaddr reg, 982 uint64_t value, unsigned size) 983 { 984 fdctrl_write(opaque, (uint32_t)reg, value); 985 } 986 987 static const MemoryRegionOps fdctrl_mem_ops = { 988 .read = fdctrl_read_mem, 989 .write = fdctrl_write_mem, 990 .endianness = DEVICE_NATIVE_ENDIAN, 991 }; 992 993 static const MemoryRegionOps fdctrl_mem_strict_ops = { 994 .read = fdctrl_read_mem, 995 .write = fdctrl_write_mem, 996 .endianness = DEVICE_NATIVE_ENDIAN, 997 .valid = { 998 .min_access_size = 1, 999 .max_access_size = 1, 1000 }, 1001 }; 1002 1003 static bool fdrive_media_changed_needed(void *opaque) 1004 { 1005 FDrive *drive = opaque; 1006 1007 return (drive->blk != NULL && drive->media_changed != 1); 1008 } 1009 1010 static const VMStateDescription vmstate_fdrive_media_changed = { 1011 .name = "fdrive/media_changed", 1012 .version_id = 1, 1013 .minimum_version_id = 1, 1014 .needed = fdrive_media_changed_needed, 1015 .fields = (VMStateField[]) { 1016 VMSTATE_UINT8(media_changed, FDrive), 1017 VMSTATE_END_OF_LIST() 1018 } 1019 }; 1020 1021 static bool fdrive_media_rate_needed(void *opaque) 1022 { 1023 FDrive *drive = opaque; 1024 1025 return drive->fdctrl->check_media_rate; 1026 } 1027 1028 static const VMStateDescription vmstate_fdrive_media_rate = { 1029 .name = "fdrive/media_rate", 1030 .version_id = 1, 1031 .minimum_version_id = 1, 1032 .needed = fdrive_media_rate_needed, 1033 .fields = (VMStateField[]) { 1034 VMSTATE_UINT8(media_rate, FDrive), 1035 VMSTATE_END_OF_LIST() 1036 } 1037 }; 1038 1039 static bool fdrive_perpendicular_needed(void *opaque) 1040 { 1041 FDrive *drive = opaque; 1042 1043 return drive->perpendicular != 0; 1044 } 1045 1046 static const VMStateDescription vmstate_fdrive_perpendicular = { 1047 .name = "fdrive/perpendicular", 1048 .version_id = 1, 1049 .minimum_version_id = 1, 1050 .needed = fdrive_perpendicular_needed, 1051 .fields = (VMStateField[]) { 1052 VMSTATE_UINT8(perpendicular, FDrive), 1053 VMSTATE_END_OF_LIST() 1054 } 1055 }; 1056 1057 static int fdrive_post_load(void *opaque, int version_id) 1058 { 1059 fd_revalidate(opaque); 1060 return 0; 1061 } 1062 1063 static const VMStateDescription vmstate_fdrive = { 1064 .name = "fdrive", 1065 .version_id = 1, 1066 .minimum_version_id = 1, 1067 .post_load = fdrive_post_load, 1068 .fields = (VMStateField[]) { 1069 VMSTATE_UINT8(head, FDrive), 1070 VMSTATE_UINT8(track, FDrive), 1071 VMSTATE_UINT8(sect, FDrive), 1072 VMSTATE_END_OF_LIST() 1073 }, 1074 .subsections = (const VMStateDescription*[]) { 1075 &vmstate_fdrive_media_changed, 1076 &vmstate_fdrive_media_rate, 1077 &vmstate_fdrive_perpendicular, 1078 NULL 1079 } 1080 }; 1081 1082 /* 1083 * Reconstructs the phase from register values according to the logic that was 1084 * implemented in qemu 2.3. This is the default value that is used if the phase 1085 * subsection is not present on migration. 1086 * 1087 * Don't change this function to reflect newer qemu versions, it is part of 1088 * the migration ABI. 1089 */ 1090 static int reconstruct_phase(FDCtrl *fdctrl) 1091 { 1092 if (fdctrl->msr & FD_MSR_NONDMA) { 1093 return FD_PHASE_EXECUTION; 1094 } else if ((fdctrl->msr & FD_MSR_RQM) == 0) { 1095 /* qemu 2.3 disabled RQM only during DMA transfers */ 1096 return FD_PHASE_EXECUTION; 1097 } else if (fdctrl->msr & FD_MSR_DIO) { 1098 return FD_PHASE_RESULT; 1099 } else { 1100 return FD_PHASE_COMMAND; 1101 } 1102 } 1103 1104 static void fdc_pre_save(void *opaque) 1105 { 1106 FDCtrl *s = opaque; 1107 1108 s->dor_vmstate = s->dor | GET_CUR_DRV(s); 1109 } 1110 1111 static int fdc_pre_load(void *opaque) 1112 { 1113 FDCtrl *s = opaque; 1114 s->phase = FD_PHASE_RECONSTRUCT; 1115 return 0; 1116 } 1117 1118 static int fdc_post_load(void *opaque, int version_id) 1119 { 1120 FDCtrl *s = opaque; 1121 1122 SET_CUR_DRV(s, s->dor_vmstate & FD_DOR_SELMASK); 1123 s->dor = s->dor_vmstate & ~FD_DOR_SELMASK; 1124 1125 if (s->phase == FD_PHASE_RECONSTRUCT) { 1126 s->phase = reconstruct_phase(s); 1127 } 1128 1129 return 0; 1130 } 1131 1132 static bool fdc_reset_sensei_needed(void *opaque) 1133 { 1134 FDCtrl *s = opaque; 1135 1136 return s->reset_sensei != 0; 1137 } 1138 1139 static const VMStateDescription vmstate_fdc_reset_sensei = { 1140 .name = "fdc/reset_sensei", 1141 .version_id = 1, 1142 .minimum_version_id = 1, 1143 .needed = fdc_reset_sensei_needed, 1144 .fields = (VMStateField[]) { 1145 VMSTATE_INT32(reset_sensei, FDCtrl), 1146 VMSTATE_END_OF_LIST() 1147 } 1148 }; 1149 1150 static bool fdc_result_timer_needed(void *opaque) 1151 { 1152 FDCtrl *s = opaque; 1153 1154 return timer_pending(s->result_timer); 1155 } 1156 1157 static const VMStateDescription vmstate_fdc_result_timer = { 1158 .name = "fdc/result_timer", 1159 .version_id = 1, 1160 .minimum_version_id = 1, 1161 .needed = fdc_result_timer_needed, 1162 .fields = (VMStateField[]) { 1163 VMSTATE_TIMER_PTR(result_timer, FDCtrl), 1164 VMSTATE_END_OF_LIST() 1165 } 1166 }; 1167 1168 static bool fdc_phase_needed(void *opaque) 1169 { 1170 FDCtrl *fdctrl = opaque; 1171 1172 return reconstruct_phase(fdctrl) != fdctrl->phase; 1173 } 1174 1175 static const VMStateDescription vmstate_fdc_phase = { 1176 .name = "fdc/phase", 1177 .version_id = 1, 1178 .minimum_version_id = 1, 1179 .needed = fdc_phase_needed, 1180 .fields = (VMStateField[]) { 1181 VMSTATE_UINT8(phase, FDCtrl), 1182 VMSTATE_END_OF_LIST() 1183 } 1184 }; 1185 1186 static const VMStateDescription vmstate_fdc = { 1187 .name = "fdc", 1188 .version_id = 2, 1189 .minimum_version_id = 2, 1190 .pre_save = fdc_pre_save, 1191 .pre_load = fdc_pre_load, 1192 .post_load = fdc_post_load, 1193 .fields = (VMStateField[]) { 1194 /* Controller State */ 1195 VMSTATE_UINT8(sra, FDCtrl), 1196 VMSTATE_UINT8(srb, FDCtrl), 1197 VMSTATE_UINT8(dor_vmstate, FDCtrl), 1198 VMSTATE_UINT8(tdr, FDCtrl), 1199 VMSTATE_UINT8(dsr, FDCtrl), 1200 VMSTATE_UINT8(msr, FDCtrl), 1201 VMSTATE_UINT8(status0, FDCtrl), 1202 VMSTATE_UINT8(status1, FDCtrl), 1203 VMSTATE_UINT8(status2, FDCtrl), 1204 /* Command FIFO */ 1205 VMSTATE_VARRAY_INT32(fifo, FDCtrl, fifo_size, 0, vmstate_info_uint8, 1206 uint8_t), 1207 VMSTATE_UINT32(data_pos, FDCtrl), 1208 VMSTATE_UINT32(data_len, FDCtrl), 1209 VMSTATE_UINT8(data_state, FDCtrl), 1210 VMSTATE_UINT8(data_dir, FDCtrl), 1211 VMSTATE_UINT8(eot, FDCtrl), 1212 /* States kept only to be returned back */ 1213 VMSTATE_UINT8(timer0, FDCtrl), 1214 VMSTATE_UINT8(timer1, FDCtrl), 1215 VMSTATE_UINT8(precomp_trk, FDCtrl), 1216 VMSTATE_UINT8(config, FDCtrl), 1217 VMSTATE_UINT8(lock, FDCtrl), 1218 VMSTATE_UINT8(pwrd, FDCtrl), 1219 VMSTATE_UINT8_EQUAL(num_floppies, FDCtrl, NULL), 1220 VMSTATE_STRUCT_ARRAY(drives, FDCtrl, MAX_FD, 1, 1221 vmstate_fdrive, FDrive), 1222 VMSTATE_END_OF_LIST() 1223 }, 1224 .subsections = (const VMStateDescription*[]) { 1225 &vmstate_fdc_reset_sensei, 1226 &vmstate_fdc_result_timer, 1227 &vmstate_fdc_phase, 1228 NULL 1229 } 1230 }; 1231 1232 static void fdctrl_external_reset_sysbus(DeviceState *d) 1233 { 1234 FDCtrlSysBus *sys = SYSBUS_FDC(d); 1235 FDCtrl *s = &sys->state; 1236 1237 fdctrl_reset(s, 0); 1238 } 1239 1240 static void fdctrl_external_reset_isa(DeviceState *d) 1241 { 1242 FDCtrlISABus *isa = ISA_FDC(d); 1243 FDCtrl *s = &isa->state; 1244 1245 fdctrl_reset(s, 0); 1246 } 1247 1248 static void fdctrl_handle_tc(void *opaque, int irq, int level) 1249 { 1250 //FDCtrl *s = opaque; 1251 1252 if (level) { 1253 // XXX 1254 FLOPPY_DPRINTF("TC pulsed\n"); 1255 } 1256 } 1257 1258 /* Change IRQ state */ 1259 static void fdctrl_reset_irq(FDCtrl *fdctrl) 1260 { 1261 fdctrl->status0 = 0; 1262 if (!(fdctrl->sra & FD_SRA_INTPEND)) 1263 return; 1264 FLOPPY_DPRINTF("Reset interrupt\n"); 1265 qemu_set_irq(fdctrl->irq, 0); 1266 fdctrl->sra &= ~FD_SRA_INTPEND; 1267 } 1268 1269 static void fdctrl_raise_irq(FDCtrl *fdctrl) 1270 { 1271 if (!(fdctrl->sra & FD_SRA_INTPEND)) { 1272 qemu_set_irq(fdctrl->irq, 1); 1273 fdctrl->sra |= FD_SRA_INTPEND; 1274 } 1275 1276 fdctrl->reset_sensei = 0; 1277 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0); 1278 } 1279 1280 /* Reset controller */ 1281 static void fdctrl_reset(FDCtrl *fdctrl, int do_irq) 1282 { 1283 int i; 1284 1285 FLOPPY_DPRINTF("reset controller\n"); 1286 fdctrl_reset_irq(fdctrl); 1287 /* Initialise controller */ 1288 fdctrl->sra = 0; 1289 fdctrl->srb = 0xc0; 1290 if (!fdctrl->drives[1].blk) { 1291 fdctrl->sra |= FD_SRA_nDRV2; 1292 } 1293 fdctrl->cur_drv = 0; 1294 fdctrl->dor = FD_DOR_nRESET; 1295 fdctrl->dor |= (fdctrl->dma_chann != -1) ? FD_DOR_DMAEN : 0; 1296 fdctrl->msr = FD_MSR_RQM; 1297 fdctrl->reset_sensei = 0; 1298 timer_del(fdctrl->result_timer); 1299 /* FIFO state */ 1300 fdctrl->data_pos = 0; 1301 fdctrl->data_len = 0; 1302 fdctrl->data_state = 0; 1303 fdctrl->data_dir = FD_DIR_WRITE; 1304 for (i = 0; i < MAX_FD; i++) 1305 fd_recalibrate(&fdctrl->drives[i]); 1306 fdctrl_to_command_phase(fdctrl); 1307 if (do_irq) { 1308 fdctrl->status0 |= FD_SR0_RDYCHG; 1309 fdctrl_raise_irq(fdctrl); 1310 fdctrl->reset_sensei = FD_RESET_SENSEI_COUNT; 1311 } 1312 } 1313 1314 static inline FDrive *drv0(FDCtrl *fdctrl) 1315 { 1316 return &fdctrl->drives[(fdctrl->tdr & FD_TDR_BOOTSEL) >> 2]; 1317 } 1318 1319 static inline FDrive *drv1(FDCtrl *fdctrl) 1320 { 1321 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (1 << 2)) 1322 return &fdctrl->drives[1]; 1323 else 1324 return &fdctrl->drives[0]; 1325 } 1326 1327 #if MAX_FD == 4 1328 static inline FDrive *drv2(FDCtrl *fdctrl) 1329 { 1330 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (2 << 2)) 1331 return &fdctrl->drives[2]; 1332 else 1333 return &fdctrl->drives[1]; 1334 } 1335 1336 static inline FDrive *drv3(FDCtrl *fdctrl) 1337 { 1338 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (3 << 2)) 1339 return &fdctrl->drives[3]; 1340 else 1341 return &fdctrl->drives[2]; 1342 } 1343 #endif 1344 1345 static FDrive *get_drv(FDCtrl *fdctrl, int unit) 1346 { 1347 switch (unit) { 1348 case 0: return drv0(fdctrl); 1349 case 1: return drv1(fdctrl); 1350 #if MAX_FD == 4 1351 case 2: return drv2(fdctrl); 1352 case 3: return drv3(fdctrl); 1353 #endif 1354 default: return NULL; 1355 } 1356 } 1357 1358 static FDrive *get_cur_drv(FDCtrl *fdctrl) 1359 { 1360 return get_drv(fdctrl, fdctrl->cur_drv); 1361 } 1362 1363 /* Status A register : 0x00 (read-only) */ 1364 static uint32_t fdctrl_read_statusA(FDCtrl *fdctrl) 1365 { 1366 uint32_t retval = fdctrl->sra; 1367 1368 FLOPPY_DPRINTF("status register A: 0x%02x\n", retval); 1369 1370 return retval; 1371 } 1372 1373 /* Status B register : 0x01 (read-only) */ 1374 static uint32_t fdctrl_read_statusB(FDCtrl *fdctrl) 1375 { 1376 uint32_t retval = fdctrl->srb; 1377 1378 FLOPPY_DPRINTF("status register B: 0x%02x\n", retval); 1379 1380 return retval; 1381 } 1382 1383 /* Digital output register : 0x02 */ 1384 static uint32_t fdctrl_read_dor(FDCtrl *fdctrl) 1385 { 1386 uint32_t retval = fdctrl->dor; 1387 1388 /* Selected drive */ 1389 retval |= fdctrl->cur_drv; 1390 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval); 1391 1392 return retval; 1393 } 1394 1395 static void fdctrl_write_dor(FDCtrl *fdctrl, uint32_t value) 1396 { 1397 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value); 1398 1399 /* Motors */ 1400 if (value & FD_DOR_MOTEN0) 1401 fdctrl->srb |= FD_SRB_MTR0; 1402 else 1403 fdctrl->srb &= ~FD_SRB_MTR0; 1404 if (value & FD_DOR_MOTEN1) 1405 fdctrl->srb |= FD_SRB_MTR1; 1406 else 1407 fdctrl->srb &= ~FD_SRB_MTR1; 1408 1409 /* Drive */ 1410 if (value & 1) 1411 fdctrl->srb |= FD_SRB_DR0; 1412 else 1413 fdctrl->srb &= ~FD_SRB_DR0; 1414 1415 /* Reset */ 1416 if (!(value & FD_DOR_nRESET)) { 1417 if (fdctrl->dor & FD_DOR_nRESET) { 1418 FLOPPY_DPRINTF("controller enter RESET state\n"); 1419 } 1420 } else { 1421 if (!(fdctrl->dor & FD_DOR_nRESET)) { 1422 FLOPPY_DPRINTF("controller out of RESET state\n"); 1423 fdctrl_reset(fdctrl, 1); 1424 fdctrl->dsr &= ~FD_DSR_PWRDOWN; 1425 } 1426 } 1427 /* Selected drive */ 1428 fdctrl->cur_drv = value & FD_DOR_SELMASK; 1429 1430 fdctrl->dor = value; 1431 } 1432 1433 /* Tape drive register : 0x03 */ 1434 static uint32_t fdctrl_read_tape(FDCtrl *fdctrl) 1435 { 1436 uint32_t retval = fdctrl->tdr; 1437 1438 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval); 1439 1440 return retval; 1441 } 1442 1443 static void fdctrl_write_tape(FDCtrl *fdctrl, uint32_t value) 1444 { 1445 /* Reset mode */ 1446 if (!(fdctrl->dor & FD_DOR_nRESET)) { 1447 FLOPPY_DPRINTF("Floppy controller in RESET state !\n"); 1448 return; 1449 } 1450 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value); 1451 /* Disk boot selection indicator */ 1452 fdctrl->tdr = value & FD_TDR_BOOTSEL; 1453 /* Tape indicators: never allow */ 1454 } 1455 1456 /* Main status register : 0x04 (read) */ 1457 static uint32_t fdctrl_read_main_status(FDCtrl *fdctrl) 1458 { 1459 uint32_t retval = fdctrl->msr; 1460 1461 fdctrl->dsr &= ~FD_DSR_PWRDOWN; 1462 fdctrl->dor |= FD_DOR_nRESET; 1463 1464 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval); 1465 1466 return retval; 1467 } 1468 1469 /* Data select rate register : 0x04 (write) */ 1470 static void fdctrl_write_rate(FDCtrl *fdctrl, uint32_t value) 1471 { 1472 /* Reset mode */ 1473 if (!(fdctrl->dor & FD_DOR_nRESET)) { 1474 FLOPPY_DPRINTF("Floppy controller in RESET state !\n"); 1475 return; 1476 } 1477 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value); 1478 /* Reset: autoclear */ 1479 if (value & FD_DSR_SWRESET) { 1480 fdctrl->dor &= ~FD_DOR_nRESET; 1481 fdctrl_reset(fdctrl, 1); 1482 fdctrl->dor |= FD_DOR_nRESET; 1483 } 1484 if (value & FD_DSR_PWRDOWN) { 1485 fdctrl_reset(fdctrl, 1); 1486 } 1487 fdctrl->dsr = value; 1488 } 1489 1490 /* Configuration control register: 0x07 (write) */ 1491 static void fdctrl_write_ccr(FDCtrl *fdctrl, uint32_t value) 1492 { 1493 /* Reset mode */ 1494 if (!(fdctrl->dor & FD_DOR_nRESET)) { 1495 FLOPPY_DPRINTF("Floppy controller in RESET state !\n"); 1496 return; 1497 } 1498 FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value); 1499 1500 /* Only the rate selection bits used in AT mode, and we 1501 * store those in the DSR. 1502 */ 1503 fdctrl->dsr = (fdctrl->dsr & ~FD_DSR_DRATEMASK) | 1504 (value & FD_DSR_DRATEMASK); 1505 } 1506 1507 static int fdctrl_media_changed(FDrive *drv) 1508 { 1509 return drv->media_changed; 1510 } 1511 1512 /* Digital input register : 0x07 (read-only) */ 1513 static uint32_t fdctrl_read_dir(FDCtrl *fdctrl) 1514 { 1515 uint32_t retval = 0; 1516 1517 if (fdctrl_media_changed(get_cur_drv(fdctrl))) { 1518 retval |= FD_DIR_DSKCHG; 1519 } 1520 if (retval != 0) { 1521 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval); 1522 } 1523 1524 return retval; 1525 } 1526 1527 /* Clear the FIFO and update the state for receiving the next command */ 1528 static void fdctrl_to_command_phase(FDCtrl *fdctrl) 1529 { 1530 fdctrl->phase = FD_PHASE_COMMAND; 1531 fdctrl->data_dir = FD_DIR_WRITE; 1532 fdctrl->data_pos = 0; 1533 fdctrl->data_len = 1; /* Accept command byte, adjust for params later */ 1534 fdctrl->msr &= ~(FD_MSR_CMDBUSY | FD_MSR_DIO); 1535 fdctrl->msr |= FD_MSR_RQM; 1536 } 1537 1538 /* Update the state to allow the guest to read out the command status. 1539 * @fifo_len is the number of result bytes to be read out. */ 1540 static void fdctrl_to_result_phase(FDCtrl *fdctrl, int fifo_len) 1541 { 1542 fdctrl->phase = FD_PHASE_RESULT; 1543 fdctrl->data_dir = FD_DIR_READ; 1544 fdctrl->data_len = fifo_len; 1545 fdctrl->data_pos = 0; 1546 fdctrl->msr |= FD_MSR_CMDBUSY | FD_MSR_RQM | FD_MSR_DIO; 1547 } 1548 1549 /* Set an error: unimplemented/unknown command */ 1550 static void fdctrl_unimplemented(FDCtrl *fdctrl, int direction) 1551 { 1552 qemu_log_mask(LOG_UNIMP, "fdc: unimplemented command 0x%02x\n", 1553 fdctrl->fifo[0]); 1554 fdctrl->fifo[0] = FD_SR0_INVCMD; 1555 fdctrl_to_result_phase(fdctrl, 1); 1556 } 1557 1558 /* Seek to next sector 1559 * returns 0 when end of track reached (for DBL_SIDES on head 1) 1560 * otherwise returns 1 1561 */ 1562 static int fdctrl_seek_to_next_sect(FDCtrl *fdctrl, FDrive *cur_drv) 1563 { 1564 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n", 1565 cur_drv->head, cur_drv->track, cur_drv->sect, 1566 fd_sector(cur_drv)); 1567 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an 1568 error in fact */ 1569 uint8_t new_head = cur_drv->head; 1570 uint8_t new_track = cur_drv->track; 1571 uint8_t new_sect = cur_drv->sect; 1572 1573 int ret = 1; 1574 1575 if (new_sect >= cur_drv->last_sect || 1576 new_sect == fdctrl->eot) { 1577 new_sect = 1; 1578 if (FD_MULTI_TRACK(fdctrl->data_state)) { 1579 if (new_head == 0 && 1580 (cur_drv->flags & FDISK_DBL_SIDES) != 0) { 1581 new_head = 1; 1582 } else { 1583 new_head = 0; 1584 new_track++; 1585 fdctrl->status0 |= FD_SR0_SEEK; 1586 if ((cur_drv->flags & FDISK_DBL_SIDES) == 0) { 1587 ret = 0; 1588 } 1589 } 1590 } else { 1591 fdctrl->status0 |= FD_SR0_SEEK; 1592 new_track++; 1593 ret = 0; 1594 } 1595 if (ret == 1) { 1596 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n", 1597 new_head, new_track, new_sect, fd_sector(cur_drv)); 1598 } 1599 } else { 1600 new_sect++; 1601 } 1602 fd_seek(cur_drv, new_head, new_track, new_sect, 1); 1603 return ret; 1604 } 1605 1606 /* Callback for transfer end (stop or abort) */ 1607 static void fdctrl_stop_transfer(FDCtrl *fdctrl, uint8_t status0, 1608 uint8_t status1, uint8_t status2) 1609 { 1610 FDrive *cur_drv; 1611 cur_drv = get_cur_drv(fdctrl); 1612 1613 fdctrl->status0 &= ~(FD_SR0_DS0 | FD_SR0_DS1 | FD_SR0_HEAD); 1614 fdctrl->status0 |= GET_CUR_DRV(fdctrl); 1615 if (cur_drv->head) { 1616 fdctrl->status0 |= FD_SR0_HEAD; 1617 } 1618 fdctrl->status0 |= status0; 1619 1620 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n", 1621 status0, status1, status2, fdctrl->status0); 1622 fdctrl->fifo[0] = fdctrl->status0; 1623 fdctrl->fifo[1] = status1; 1624 fdctrl->fifo[2] = status2; 1625 fdctrl->fifo[3] = cur_drv->track; 1626 fdctrl->fifo[4] = cur_drv->head; 1627 fdctrl->fifo[5] = cur_drv->sect; 1628 fdctrl->fifo[6] = FD_SECTOR_SC; 1629 fdctrl->data_dir = FD_DIR_READ; 1630 if (!(fdctrl->msr & FD_MSR_NONDMA)) { 1631 IsaDmaClass *k = ISADMA_GET_CLASS(fdctrl->dma); 1632 k->release_DREQ(fdctrl->dma, fdctrl->dma_chann); 1633 } 1634 fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO; 1635 fdctrl->msr &= ~FD_MSR_NONDMA; 1636 1637 fdctrl_to_result_phase(fdctrl, 7); 1638 fdctrl_raise_irq(fdctrl); 1639 } 1640 1641 /* Prepare a data transfer (either DMA or FIFO) */ 1642 static void fdctrl_start_transfer(FDCtrl *fdctrl, int direction) 1643 { 1644 FDrive *cur_drv; 1645 uint8_t kh, kt, ks; 1646 1647 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK); 1648 cur_drv = get_cur_drv(fdctrl); 1649 kt = fdctrl->fifo[2]; 1650 kh = fdctrl->fifo[3]; 1651 ks = fdctrl->fifo[4]; 1652 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n", 1653 GET_CUR_DRV(fdctrl), kh, kt, ks, 1654 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, 1655 NUM_SIDES(cur_drv))); 1656 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) { 1657 case 2: 1658 /* sect too big */ 1659 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00); 1660 fdctrl->fifo[3] = kt; 1661 fdctrl->fifo[4] = kh; 1662 fdctrl->fifo[5] = ks; 1663 return; 1664 case 3: 1665 /* track too big */ 1666 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00); 1667 fdctrl->fifo[3] = kt; 1668 fdctrl->fifo[4] = kh; 1669 fdctrl->fifo[5] = ks; 1670 return; 1671 case 4: 1672 /* No seek enabled */ 1673 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00); 1674 fdctrl->fifo[3] = kt; 1675 fdctrl->fifo[4] = kh; 1676 fdctrl->fifo[5] = ks; 1677 return; 1678 case 1: 1679 fdctrl->status0 |= FD_SR0_SEEK; 1680 break; 1681 default: 1682 break; 1683 } 1684 1685 /* Check the data rate. If the programmed data rate does not match 1686 * the currently inserted medium, the operation has to fail. */ 1687 if (fdctrl->check_media_rate && 1688 (fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) { 1689 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n", 1690 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate); 1691 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00); 1692 fdctrl->fifo[3] = kt; 1693 fdctrl->fifo[4] = kh; 1694 fdctrl->fifo[5] = ks; 1695 return; 1696 } 1697 1698 /* Set the FIFO state */ 1699 fdctrl->data_dir = direction; 1700 fdctrl->data_pos = 0; 1701 assert(fdctrl->msr & FD_MSR_CMDBUSY); 1702 if (fdctrl->fifo[0] & 0x80) 1703 fdctrl->data_state |= FD_STATE_MULTI; 1704 else 1705 fdctrl->data_state &= ~FD_STATE_MULTI; 1706 if (fdctrl->fifo[5] == 0) { 1707 fdctrl->data_len = fdctrl->fifo[8]; 1708 } else { 1709 int tmp; 1710 fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]); 1711 tmp = (fdctrl->fifo[6] - ks + 1); 1712 if (fdctrl->fifo[0] & 0x80) 1713 tmp += fdctrl->fifo[6]; 1714 fdctrl->data_len *= tmp; 1715 } 1716 fdctrl->eot = fdctrl->fifo[6]; 1717 if (fdctrl->dor & FD_DOR_DMAEN) { 1718 IsaDmaTransferMode dma_mode; 1719 IsaDmaClass *k = ISADMA_GET_CLASS(fdctrl->dma); 1720 bool dma_mode_ok; 1721 /* DMA transfer are enabled. Check if DMA channel is well programmed */ 1722 dma_mode = k->get_transfer_mode(fdctrl->dma, fdctrl->dma_chann); 1723 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n", 1724 dma_mode, direction, 1725 (128 << fdctrl->fifo[5]) * 1726 (cur_drv->last_sect - ks + 1), fdctrl->data_len); 1727 switch (direction) { 1728 case FD_DIR_SCANE: 1729 case FD_DIR_SCANL: 1730 case FD_DIR_SCANH: 1731 dma_mode_ok = (dma_mode == ISADMA_TRANSFER_VERIFY); 1732 break; 1733 case FD_DIR_WRITE: 1734 dma_mode_ok = (dma_mode == ISADMA_TRANSFER_WRITE); 1735 break; 1736 case FD_DIR_READ: 1737 dma_mode_ok = (dma_mode == ISADMA_TRANSFER_READ); 1738 break; 1739 case FD_DIR_VERIFY: 1740 dma_mode_ok = true; 1741 break; 1742 default: 1743 dma_mode_ok = false; 1744 break; 1745 } 1746 if (dma_mode_ok) { 1747 /* No access is allowed until DMA transfer has completed */ 1748 fdctrl->msr &= ~FD_MSR_RQM; 1749 if (direction != FD_DIR_VERIFY) { 1750 /* Now, we just have to wait for the DMA controller to 1751 * recall us... 1752 */ 1753 k->hold_DREQ(fdctrl->dma, fdctrl->dma_chann); 1754 k->schedule(fdctrl->dma); 1755 } else { 1756 /* Start transfer */ 1757 fdctrl_transfer_handler(fdctrl, fdctrl->dma_chann, 0, 1758 fdctrl->data_len); 1759 } 1760 return; 1761 } else { 1762 FLOPPY_DPRINTF("bad dma_mode=%d direction=%d\n", dma_mode, 1763 direction); 1764 } 1765 } 1766 FLOPPY_DPRINTF("start non-DMA transfer\n"); 1767 fdctrl->msr |= FD_MSR_NONDMA | FD_MSR_RQM; 1768 if (direction != FD_DIR_WRITE) 1769 fdctrl->msr |= FD_MSR_DIO; 1770 /* IO based transfer: calculate len */ 1771 fdctrl_raise_irq(fdctrl); 1772 } 1773 1774 /* Prepare a transfer of deleted data */ 1775 static void fdctrl_start_transfer_del(FDCtrl *fdctrl, int direction) 1776 { 1777 qemu_log_mask(LOG_UNIMP, "fdctrl_start_transfer_del() unimplemented\n"); 1778 1779 /* We don't handle deleted data, 1780 * so we don't return *ANYTHING* 1781 */ 1782 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00); 1783 } 1784 1785 /* handlers for DMA transfers */ 1786 static int fdctrl_transfer_handler (void *opaque, int nchan, 1787 int dma_pos, int dma_len) 1788 { 1789 FDCtrl *fdctrl; 1790 FDrive *cur_drv; 1791 int len, start_pos, rel_pos; 1792 uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00; 1793 IsaDmaClass *k; 1794 1795 fdctrl = opaque; 1796 if (fdctrl->msr & FD_MSR_RQM) { 1797 FLOPPY_DPRINTF("Not in DMA transfer mode !\n"); 1798 return 0; 1799 } 1800 k = ISADMA_GET_CLASS(fdctrl->dma); 1801 cur_drv = get_cur_drv(fdctrl); 1802 if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL || 1803 fdctrl->data_dir == FD_DIR_SCANH) 1804 status2 = FD_SR2_SNS; 1805 if (dma_len > fdctrl->data_len) 1806 dma_len = fdctrl->data_len; 1807 if (cur_drv->blk == NULL) { 1808 if (fdctrl->data_dir == FD_DIR_WRITE) 1809 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00); 1810 else 1811 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00); 1812 len = 0; 1813 goto transfer_error; 1814 } 1815 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN; 1816 for (start_pos = fdctrl->data_pos; fdctrl->data_pos < dma_len;) { 1817 len = dma_len - fdctrl->data_pos; 1818 if (len + rel_pos > FD_SECTOR_LEN) 1819 len = FD_SECTOR_LEN - rel_pos; 1820 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x " 1821 "(%d-0x%08x 0x%08x)\n", len, dma_len, fdctrl->data_pos, 1822 fdctrl->data_len, GET_CUR_DRV(fdctrl), cur_drv->head, 1823 cur_drv->track, cur_drv->sect, fd_sector(cur_drv), 1824 fd_sector(cur_drv) * FD_SECTOR_LEN); 1825 if (fdctrl->data_dir != FD_DIR_WRITE || 1826 len < FD_SECTOR_LEN || rel_pos != 0) { 1827 /* READ & SCAN commands and realign to a sector for WRITE */ 1828 if (blk_pread(cur_drv->blk, fd_offset(cur_drv), 1829 fdctrl->fifo, BDRV_SECTOR_SIZE) < 0) { 1830 FLOPPY_DPRINTF("Floppy: error getting sector %d\n", 1831 fd_sector(cur_drv)); 1832 /* Sure, image size is too small... */ 1833 memset(fdctrl->fifo, 0, FD_SECTOR_LEN); 1834 } 1835 } 1836 switch (fdctrl->data_dir) { 1837 case FD_DIR_READ: 1838 /* READ commands */ 1839 k->write_memory(fdctrl->dma, nchan, fdctrl->fifo + rel_pos, 1840 fdctrl->data_pos, len); 1841 break; 1842 case FD_DIR_WRITE: 1843 /* WRITE commands */ 1844 if (cur_drv->ro) { 1845 /* Handle readonly medium early, no need to do DMA, touch the 1846 * LED or attempt any writes. A real floppy doesn't attempt 1847 * to write to readonly media either. */ 1848 fdctrl_stop_transfer(fdctrl, 1849 FD_SR0_ABNTERM | FD_SR0_SEEK, FD_SR1_NW, 1850 0x00); 1851 goto transfer_error; 1852 } 1853 1854 k->read_memory(fdctrl->dma, nchan, fdctrl->fifo + rel_pos, 1855 fdctrl->data_pos, len); 1856 if (blk_pwrite(cur_drv->blk, fd_offset(cur_drv), 1857 fdctrl->fifo, BDRV_SECTOR_SIZE, 0) < 0) { 1858 FLOPPY_DPRINTF("error writing sector %d\n", 1859 fd_sector(cur_drv)); 1860 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00); 1861 goto transfer_error; 1862 } 1863 break; 1864 case FD_DIR_VERIFY: 1865 /* VERIFY commands */ 1866 break; 1867 default: 1868 /* SCAN commands */ 1869 { 1870 uint8_t tmpbuf[FD_SECTOR_LEN]; 1871 int ret; 1872 k->read_memory(fdctrl->dma, nchan, tmpbuf, fdctrl->data_pos, 1873 len); 1874 ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len); 1875 if (ret == 0) { 1876 status2 = FD_SR2_SEH; 1877 goto end_transfer; 1878 } 1879 if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) || 1880 (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) { 1881 status2 = 0x00; 1882 goto end_transfer; 1883 } 1884 } 1885 break; 1886 } 1887 fdctrl->data_pos += len; 1888 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN; 1889 if (rel_pos == 0) { 1890 /* Seek to next sector */ 1891 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) 1892 break; 1893 } 1894 } 1895 end_transfer: 1896 len = fdctrl->data_pos - start_pos; 1897 FLOPPY_DPRINTF("end transfer %d %d %d\n", 1898 fdctrl->data_pos, len, fdctrl->data_len); 1899 if (fdctrl->data_dir == FD_DIR_SCANE || 1900 fdctrl->data_dir == FD_DIR_SCANL || 1901 fdctrl->data_dir == FD_DIR_SCANH) 1902 status2 = FD_SR2_SEH; 1903 fdctrl->data_len -= len; 1904 fdctrl_stop_transfer(fdctrl, status0, status1, status2); 1905 transfer_error: 1906 1907 return len; 1908 } 1909 1910 /* Data register : 0x05 */ 1911 static uint32_t fdctrl_read_data(FDCtrl *fdctrl) 1912 { 1913 FDrive *cur_drv; 1914 uint32_t retval = 0; 1915 uint32_t pos; 1916 1917 cur_drv = get_cur_drv(fdctrl); 1918 fdctrl->dsr &= ~FD_DSR_PWRDOWN; 1919 if (!(fdctrl->msr & FD_MSR_RQM) || !(fdctrl->msr & FD_MSR_DIO)) { 1920 FLOPPY_DPRINTF("error: controller not ready for reading\n"); 1921 return 0; 1922 } 1923 1924 /* If data_len spans multiple sectors, the current position in the FIFO 1925 * wraps around while fdctrl->data_pos is the real position in the whole 1926 * request. */ 1927 pos = fdctrl->data_pos; 1928 pos %= FD_SECTOR_LEN; 1929 1930 switch (fdctrl->phase) { 1931 case FD_PHASE_EXECUTION: 1932 assert(fdctrl->msr & FD_MSR_NONDMA); 1933 if (pos == 0) { 1934 if (fdctrl->data_pos != 0) 1935 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) { 1936 FLOPPY_DPRINTF("error seeking to next sector %d\n", 1937 fd_sector(cur_drv)); 1938 return 0; 1939 } 1940 if (blk_pread(cur_drv->blk, fd_offset(cur_drv), fdctrl->fifo, 1941 BDRV_SECTOR_SIZE) 1942 < 0) { 1943 FLOPPY_DPRINTF("error getting sector %d\n", 1944 fd_sector(cur_drv)); 1945 /* Sure, image size is too small... */ 1946 memset(fdctrl->fifo, 0, FD_SECTOR_LEN); 1947 } 1948 } 1949 1950 if (++fdctrl->data_pos == fdctrl->data_len) { 1951 fdctrl->msr &= ~FD_MSR_RQM; 1952 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00); 1953 } 1954 break; 1955 1956 case FD_PHASE_RESULT: 1957 assert(!(fdctrl->msr & FD_MSR_NONDMA)); 1958 if (++fdctrl->data_pos == fdctrl->data_len) { 1959 fdctrl->msr &= ~FD_MSR_RQM; 1960 fdctrl_to_command_phase(fdctrl); 1961 fdctrl_reset_irq(fdctrl); 1962 } 1963 break; 1964 1965 case FD_PHASE_COMMAND: 1966 default: 1967 abort(); 1968 } 1969 1970 retval = fdctrl->fifo[pos]; 1971 FLOPPY_DPRINTF("data register: 0x%02x\n", retval); 1972 1973 return retval; 1974 } 1975 1976 static void fdctrl_format_sector(FDCtrl *fdctrl) 1977 { 1978 FDrive *cur_drv; 1979 uint8_t kh, kt, ks; 1980 1981 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK); 1982 cur_drv = get_cur_drv(fdctrl); 1983 kt = fdctrl->fifo[6]; 1984 kh = fdctrl->fifo[7]; 1985 ks = fdctrl->fifo[8]; 1986 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n", 1987 GET_CUR_DRV(fdctrl), kh, kt, ks, 1988 fd_sector_calc(kh, kt, ks, cur_drv->last_sect, 1989 NUM_SIDES(cur_drv))); 1990 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) { 1991 case 2: 1992 /* sect too big */ 1993 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00); 1994 fdctrl->fifo[3] = kt; 1995 fdctrl->fifo[4] = kh; 1996 fdctrl->fifo[5] = ks; 1997 return; 1998 case 3: 1999 /* track too big */ 2000 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00); 2001 fdctrl->fifo[3] = kt; 2002 fdctrl->fifo[4] = kh; 2003 fdctrl->fifo[5] = ks; 2004 return; 2005 case 4: 2006 /* No seek enabled */ 2007 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00); 2008 fdctrl->fifo[3] = kt; 2009 fdctrl->fifo[4] = kh; 2010 fdctrl->fifo[5] = ks; 2011 return; 2012 case 1: 2013 fdctrl->status0 |= FD_SR0_SEEK; 2014 break; 2015 default: 2016 break; 2017 } 2018 memset(fdctrl->fifo, 0, FD_SECTOR_LEN); 2019 if (cur_drv->blk == NULL || 2020 blk_pwrite(cur_drv->blk, fd_offset(cur_drv), fdctrl->fifo, 2021 BDRV_SECTOR_SIZE, 0) < 0) { 2022 FLOPPY_DPRINTF("error formatting sector %d\n", fd_sector(cur_drv)); 2023 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00); 2024 } else { 2025 if (cur_drv->sect == cur_drv->last_sect) { 2026 fdctrl->data_state &= ~FD_STATE_FORMAT; 2027 /* Last sector done */ 2028 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00); 2029 } else { 2030 /* More to do */ 2031 fdctrl->data_pos = 0; 2032 fdctrl->data_len = 4; 2033 } 2034 } 2035 } 2036 2037 static void fdctrl_handle_lock(FDCtrl *fdctrl, int direction) 2038 { 2039 fdctrl->lock = (fdctrl->fifo[0] & 0x80) ? 1 : 0; 2040 fdctrl->fifo[0] = fdctrl->lock << 4; 2041 fdctrl_to_result_phase(fdctrl, 1); 2042 } 2043 2044 static void fdctrl_handle_dumpreg(FDCtrl *fdctrl, int direction) 2045 { 2046 FDrive *cur_drv = get_cur_drv(fdctrl); 2047 2048 /* Drives position */ 2049 fdctrl->fifo[0] = drv0(fdctrl)->track; 2050 fdctrl->fifo[1] = drv1(fdctrl)->track; 2051 #if MAX_FD == 4 2052 fdctrl->fifo[2] = drv2(fdctrl)->track; 2053 fdctrl->fifo[3] = drv3(fdctrl)->track; 2054 #else 2055 fdctrl->fifo[2] = 0; 2056 fdctrl->fifo[3] = 0; 2057 #endif 2058 /* timers */ 2059 fdctrl->fifo[4] = fdctrl->timer0; 2060 fdctrl->fifo[5] = (fdctrl->timer1 << 1) | (fdctrl->dor & FD_DOR_DMAEN ? 1 : 0); 2061 fdctrl->fifo[6] = cur_drv->last_sect; 2062 fdctrl->fifo[7] = (fdctrl->lock << 7) | 2063 (cur_drv->perpendicular << 2); 2064 fdctrl->fifo[8] = fdctrl->config; 2065 fdctrl->fifo[9] = fdctrl->precomp_trk; 2066 fdctrl_to_result_phase(fdctrl, 10); 2067 } 2068 2069 static void fdctrl_handle_version(FDCtrl *fdctrl, int direction) 2070 { 2071 /* Controller's version */ 2072 fdctrl->fifo[0] = fdctrl->version; 2073 fdctrl_to_result_phase(fdctrl, 1); 2074 } 2075 2076 static void fdctrl_handle_partid(FDCtrl *fdctrl, int direction) 2077 { 2078 fdctrl->fifo[0] = 0x41; /* Stepping 1 */ 2079 fdctrl_to_result_phase(fdctrl, 1); 2080 } 2081 2082 static void fdctrl_handle_restore(FDCtrl *fdctrl, int direction) 2083 { 2084 FDrive *cur_drv = get_cur_drv(fdctrl); 2085 2086 /* Drives position */ 2087 drv0(fdctrl)->track = fdctrl->fifo[3]; 2088 drv1(fdctrl)->track = fdctrl->fifo[4]; 2089 #if MAX_FD == 4 2090 drv2(fdctrl)->track = fdctrl->fifo[5]; 2091 drv3(fdctrl)->track = fdctrl->fifo[6]; 2092 #endif 2093 /* timers */ 2094 fdctrl->timer0 = fdctrl->fifo[7]; 2095 fdctrl->timer1 = fdctrl->fifo[8]; 2096 cur_drv->last_sect = fdctrl->fifo[9]; 2097 fdctrl->lock = fdctrl->fifo[10] >> 7; 2098 cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF; 2099 fdctrl->config = fdctrl->fifo[11]; 2100 fdctrl->precomp_trk = fdctrl->fifo[12]; 2101 fdctrl->pwrd = fdctrl->fifo[13]; 2102 fdctrl_to_command_phase(fdctrl); 2103 } 2104 2105 static void fdctrl_handle_save(FDCtrl *fdctrl, int direction) 2106 { 2107 FDrive *cur_drv = get_cur_drv(fdctrl); 2108 2109 fdctrl->fifo[0] = 0; 2110 fdctrl->fifo[1] = 0; 2111 /* Drives position */ 2112 fdctrl->fifo[2] = drv0(fdctrl)->track; 2113 fdctrl->fifo[3] = drv1(fdctrl)->track; 2114 #if MAX_FD == 4 2115 fdctrl->fifo[4] = drv2(fdctrl)->track; 2116 fdctrl->fifo[5] = drv3(fdctrl)->track; 2117 #else 2118 fdctrl->fifo[4] = 0; 2119 fdctrl->fifo[5] = 0; 2120 #endif 2121 /* timers */ 2122 fdctrl->fifo[6] = fdctrl->timer0; 2123 fdctrl->fifo[7] = fdctrl->timer1; 2124 fdctrl->fifo[8] = cur_drv->last_sect; 2125 fdctrl->fifo[9] = (fdctrl->lock << 7) | 2126 (cur_drv->perpendicular << 2); 2127 fdctrl->fifo[10] = fdctrl->config; 2128 fdctrl->fifo[11] = fdctrl->precomp_trk; 2129 fdctrl->fifo[12] = fdctrl->pwrd; 2130 fdctrl->fifo[13] = 0; 2131 fdctrl->fifo[14] = 0; 2132 fdctrl_to_result_phase(fdctrl, 15); 2133 } 2134 2135 static void fdctrl_handle_readid(FDCtrl *fdctrl, int direction) 2136 { 2137 FDrive *cur_drv = get_cur_drv(fdctrl); 2138 2139 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1; 2140 timer_mod(fdctrl->result_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 2141 (NANOSECONDS_PER_SECOND / 50)); 2142 } 2143 2144 static void fdctrl_handle_format_track(FDCtrl *fdctrl, int direction) 2145 { 2146 FDrive *cur_drv; 2147 2148 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK); 2149 cur_drv = get_cur_drv(fdctrl); 2150 fdctrl->data_state |= FD_STATE_FORMAT; 2151 if (fdctrl->fifo[0] & 0x80) 2152 fdctrl->data_state |= FD_STATE_MULTI; 2153 else 2154 fdctrl->data_state &= ~FD_STATE_MULTI; 2155 cur_drv->bps = 2156 fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2]; 2157 #if 0 2158 cur_drv->last_sect = 2159 cur_drv->flags & FDISK_DBL_SIDES ? fdctrl->fifo[3] : 2160 fdctrl->fifo[3] / 2; 2161 #else 2162 cur_drv->last_sect = fdctrl->fifo[3]; 2163 #endif 2164 /* TODO: implement format using DMA expected by the Bochs BIOS 2165 * and Linux fdformat (read 3 bytes per sector via DMA and fill 2166 * the sector with the specified fill byte 2167 */ 2168 fdctrl->data_state &= ~FD_STATE_FORMAT; 2169 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00); 2170 } 2171 2172 static void fdctrl_handle_specify(FDCtrl *fdctrl, int direction) 2173 { 2174 fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF; 2175 fdctrl->timer1 = fdctrl->fifo[2] >> 1; 2176 if (fdctrl->fifo[2] & 1) 2177 fdctrl->dor &= ~FD_DOR_DMAEN; 2178 else 2179 fdctrl->dor |= FD_DOR_DMAEN; 2180 /* No result back */ 2181 fdctrl_to_command_phase(fdctrl); 2182 } 2183 2184 static void fdctrl_handle_sense_drive_status(FDCtrl *fdctrl, int direction) 2185 { 2186 FDrive *cur_drv; 2187 2188 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK); 2189 cur_drv = get_cur_drv(fdctrl); 2190 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1; 2191 /* 1 Byte status back */ 2192 fdctrl->fifo[0] = (cur_drv->ro << 6) | 2193 (cur_drv->track == 0 ? 0x10 : 0x00) | 2194 (cur_drv->head << 2) | 2195 GET_CUR_DRV(fdctrl) | 2196 0x28; 2197 fdctrl_to_result_phase(fdctrl, 1); 2198 } 2199 2200 static void fdctrl_handle_recalibrate(FDCtrl *fdctrl, int direction) 2201 { 2202 FDrive *cur_drv; 2203 2204 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK); 2205 cur_drv = get_cur_drv(fdctrl); 2206 fd_recalibrate(cur_drv); 2207 fdctrl_to_command_phase(fdctrl); 2208 /* Raise Interrupt */ 2209 fdctrl->status0 |= FD_SR0_SEEK; 2210 fdctrl_raise_irq(fdctrl); 2211 } 2212 2213 static void fdctrl_handle_sense_interrupt_status(FDCtrl *fdctrl, int direction) 2214 { 2215 FDrive *cur_drv = get_cur_drv(fdctrl); 2216 2217 if (fdctrl->reset_sensei > 0) { 2218 fdctrl->fifo[0] = 2219 FD_SR0_RDYCHG + FD_RESET_SENSEI_COUNT - fdctrl->reset_sensei; 2220 fdctrl->reset_sensei--; 2221 } else if (!(fdctrl->sra & FD_SRA_INTPEND)) { 2222 fdctrl->fifo[0] = FD_SR0_INVCMD; 2223 fdctrl_to_result_phase(fdctrl, 1); 2224 return; 2225 } else { 2226 fdctrl->fifo[0] = 2227 (fdctrl->status0 & ~(FD_SR0_HEAD | FD_SR0_DS1 | FD_SR0_DS0)) 2228 | GET_CUR_DRV(fdctrl); 2229 } 2230 2231 fdctrl->fifo[1] = cur_drv->track; 2232 fdctrl_to_result_phase(fdctrl, 2); 2233 fdctrl_reset_irq(fdctrl); 2234 fdctrl->status0 = FD_SR0_RDYCHG; 2235 } 2236 2237 static void fdctrl_handle_seek(FDCtrl *fdctrl, int direction) 2238 { 2239 FDrive *cur_drv; 2240 2241 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK); 2242 cur_drv = get_cur_drv(fdctrl); 2243 fdctrl_to_command_phase(fdctrl); 2244 /* The seek command just sends step pulses to the drive and doesn't care if 2245 * there is a medium inserted of if it's banging the head against the drive. 2246 */ 2247 fd_seek(cur_drv, cur_drv->head, fdctrl->fifo[2], cur_drv->sect, 1); 2248 /* Raise Interrupt */ 2249 fdctrl->status0 |= FD_SR0_SEEK; 2250 fdctrl_raise_irq(fdctrl); 2251 } 2252 2253 static void fdctrl_handle_perpendicular_mode(FDCtrl *fdctrl, int direction) 2254 { 2255 FDrive *cur_drv = get_cur_drv(fdctrl); 2256 2257 if (fdctrl->fifo[1] & 0x80) 2258 cur_drv->perpendicular = fdctrl->fifo[1] & 0x7; 2259 /* No result back */ 2260 fdctrl_to_command_phase(fdctrl); 2261 } 2262 2263 static void fdctrl_handle_configure(FDCtrl *fdctrl, int direction) 2264 { 2265 fdctrl->config = fdctrl->fifo[2]; 2266 fdctrl->precomp_trk = fdctrl->fifo[3]; 2267 /* No result back */ 2268 fdctrl_to_command_phase(fdctrl); 2269 } 2270 2271 static void fdctrl_handle_powerdown_mode(FDCtrl *fdctrl, int direction) 2272 { 2273 fdctrl->pwrd = fdctrl->fifo[1]; 2274 fdctrl->fifo[0] = fdctrl->fifo[1]; 2275 fdctrl_to_result_phase(fdctrl, 1); 2276 } 2277 2278 static void fdctrl_handle_option(FDCtrl *fdctrl, int direction) 2279 { 2280 /* No result back */ 2281 fdctrl_to_command_phase(fdctrl); 2282 } 2283 2284 static void fdctrl_handle_drive_specification_command(FDCtrl *fdctrl, int direction) 2285 { 2286 FDrive *cur_drv = get_cur_drv(fdctrl); 2287 uint32_t pos; 2288 2289 pos = fdctrl->data_pos - 1; 2290 pos %= FD_SECTOR_LEN; 2291 if (fdctrl->fifo[pos] & 0x80) { 2292 /* Command parameters done */ 2293 if (fdctrl->fifo[pos] & 0x40) { 2294 fdctrl->fifo[0] = fdctrl->fifo[1]; 2295 fdctrl->fifo[2] = 0; 2296 fdctrl->fifo[3] = 0; 2297 fdctrl_to_result_phase(fdctrl, 4); 2298 } else { 2299 fdctrl_to_command_phase(fdctrl); 2300 } 2301 } else if (fdctrl->data_len > 7) { 2302 /* ERROR */ 2303 fdctrl->fifo[0] = 0x80 | 2304 (cur_drv->head << 2) | GET_CUR_DRV(fdctrl); 2305 fdctrl_to_result_phase(fdctrl, 1); 2306 } 2307 } 2308 2309 static void fdctrl_handle_relative_seek_in(FDCtrl *fdctrl, int direction) 2310 { 2311 FDrive *cur_drv; 2312 2313 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK); 2314 cur_drv = get_cur_drv(fdctrl); 2315 if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) { 2316 fd_seek(cur_drv, cur_drv->head, cur_drv->max_track - 1, 2317 cur_drv->sect, 1); 2318 } else { 2319 fd_seek(cur_drv, cur_drv->head, 2320 cur_drv->track + fdctrl->fifo[2], cur_drv->sect, 1); 2321 } 2322 fdctrl_to_command_phase(fdctrl); 2323 /* Raise Interrupt */ 2324 fdctrl->status0 |= FD_SR0_SEEK; 2325 fdctrl_raise_irq(fdctrl); 2326 } 2327 2328 static void fdctrl_handle_relative_seek_out(FDCtrl *fdctrl, int direction) 2329 { 2330 FDrive *cur_drv; 2331 2332 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK); 2333 cur_drv = get_cur_drv(fdctrl); 2334 if (fdctrl->fifo[2] > cur_drv->track) { 2335 fd_seek(cur_drv, cur_drv->head, 0, cur_drv->sect, 1); 2336 } else { 2337 fd_seek(cur_drv, cur_drv->head, 2338 cur_drv->track - fdctrl->fifo[2], cur_drv->sect, 1); 2339 } 2340 fdctrl_to_command_phase(fdctrl); 2341 /* Raise Interrupt */ 2342 fdctrl->status0 |= FD_SR0_SEEK; 2343 fdctrl_raise_irq(fdctrl); 2344 } 2345 2346 /* 2347 * Handlers for the execution phase of each command 2348 */ 2349 typedef struct FDCtrlCommand { 2350 uint8_t value; 2351 uint8_t mask; 2352 const char* name; 2353 int parameters; 2354 void (*handler)(FDCtrl *fdctrl, int direction); 2355 int direction; 2356 } FDCtrlCommand; 2357 2358 static const FDCtrlCommand handlers[] = { 2359 { FD_CMD_READ, 0x1f, "READ", 8, fdctrl_start_transfer, FD_DIR_READ }, 2360 { FD_CMD_WRITE, 0x3f, "WRITE", 8, fdctrl_start_transfer, FD_DIR_WRITE }, 2361 { FD_CMD_SEEK, 0xff, "SEEK", 2, fdctrl_handle_seek }, 2362 { FD_CMD_SENSE_INTERRUPT_STATUS, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status }, 2363 { FD_CMD_RECALIBRATE, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate }, 2364 { FD_CMD_FORMAT_TRACK, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track }, 2365 { FD_CMD_READ_TRACK, 0xbf, "READ TRACK", 8, fdctrl_start_transfer, FD_DIR_READ }, 2366 { FD_CMD_RESTORE, 0xff, "RESTORE", 17, fdctrl_handle_restore }, /* part of READ DELETED DATA */ 2367 { FD_CMD_SAVE, 0xff, "SAVE", 0, fdctrl_handle_save }, /* part of READ DELETED DATA */ 2368 { FD_CMD_READ_DELETED, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_READ }, 2369 { FD_CMD_SCAN_EQUAL, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANE }, 2370 { FD_CMD_VERIFY, 0x1f, "VERIFY", 8, fdctrl_start_transfer, FD_DIR_VERIFY }, 2371 { FD_CMD_SCAN_LOW_OR_EQUAL, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANL }, 2372 { FD_CMD_SCAN_HIGH_OR_EQUAL, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANH }, 2373 { FD_CMD_WRITE_DELETED, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_WRITE }, 2374 { FD_CMD_READ_ID, 0xbf, "READ ID", 1, fdctrl_handle_readid }, 2375 { FD_CMD_SPECIFY, 0xff, "SPECIFY", 2, fdctrl_handle_specify }, 2376 { FD_CMD_SENSE_DRIVE_STATUS, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status }, 2377 { FD_CMD_PERPENDICULAR_MODE, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode }, 2378 { FD_CMD_CONFIGURE, 0xff, "CONFIGURE", 3, fdctrl_handle_configure }, 2379 { FD_CMD_POWERDOWN_MODE, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode }, 2380 { FD_CMD_OPTION, 0xff, "OPTION", 1, fdctrl_handle_option }, 2381 { FD_CMD_DRIVE_SPECIFICATION_COMMAND, 0xff, "DRIVE SPECIFICATION COMMAND", 5, fdctrl_handle_drive_specification_command }, 2382 { FD_CMD_RELATIVE_SEEK_OUT, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out }, 2383 { FD_CMD_FORMAT_AND_WRITE, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented }, 2384 { FD_CMD_RELATIVE_SEEK_IN, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in }, 2385 { FD_CMD_LOCK, 0x7f, "LOCK", 0, fdctrl_handle_lock }, 2386 { FD_CMD_DUMPREG, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg }, 2387 { FD_CMD_VERSION, 0xff, "VERSION", 0, fdctrl_handle_version }, 2388 { FD_CMD_PART_ID, 0xff, "PART ID", 0, fdctrl_handle_partid }, 2389 { FD_CMD_WRITE, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer, FD_DIR_WRITE }, /* not in specification ; BeOS 4.5 bug */ 2390 { 0, 0, "unknown", 0, fdctrl_unimplemented }, /* default handler */ 2391 }; 2392 /* Associate command to an index in the 'handlers' array */ 2393 static uint8_t command_to_handler[256]; 2394 2395 static const FDCtrlCommand *get_command(uint8_t cmd) 2396 { 2397 int idx; 2398 2399 idx = command_to_handler[cmd]; 2400 FLOPPY_DPRINTF("%s command\n", handlers[idx].name); 2401 return &handlers[idx]; 2402 } 2403 2404 static void fdctrl_write_data(FDCtrl *fdctrl, uint32_t value) 2405 { 2406 FDrive *cur_drv; 2407 const FDCtrlCommand *cmd; 2408 uint32_t pos; 2409 2410 /* Reset mode */ 2411 if (!(fdctrl->dor & FD_DOR_nRESET)) { 2412 FLOPPY_DPRINTF("Floppy controller in RESET state !\n"); 2413 return; 2414 } 2415 if (!(fdctrl->msr & FD_MSR_RQM) || (fdctrl->msr & FD_MSR_DIO)) { 2416 FLOPPY_DPRINTF("error: controller not ready for writing\n"); 2417 return; 2418 } 2419 fdctrl->dsr &= ~FD_DSR_PWRDOWN; 2420 2421 FLOPPY_DPRINTF("%s: %02x\n", __func__, value); 2422 2423 /* If data_len spans multiple sectors, the current position in the FIFO 2424 * wraps around while fdctrl->data_pos is the real position in the whole 2425 * request. */ 2426 pos = fdctrl->data_pos++; 2427 pos %= FD_SECTOR_LEN; 2428 fdctrl->fifo[pos] = value; 2429 2430 if (fdctrl->data_pos == fdctrl->data_len) { 2431 fdctrl->msr &= ~FD_MSR_RQM; 2432 } 2433 2434 switch (fdctrl->phase) { 2435 case FD_PHASE_EXECUTION: 2436 /* For DMA requests, RQM should be cleared during execution phase, so 2437 * we would have errored out above. */ 2438 assert(fdctrl->msr & FD_MSR_NONDMA); 2439 2440 /* FIFO data write */ 2441 if (pos == FD_SECTOR_LEN - 1 || 2442 fdctrl->data_pos == fdctrl->data_len) { 2443 cur_drv = get_cur_drv(fdctrl); 2444 if (blk_pwrite(cur_drv->blk, fd_offset(cur_drv), fdctrl->fifo, 2445 BDRV_SECTOR_SIZE, 0) < 0) { 2446 FLOPPY_DPRINTF("error writing sector %d\n", 2447 fd_sector(cur_drv)); 2448 break; 2449 } 2450 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) { 2451 FLOPPY_DPRINTF("error seeking to next sector %d\n", 2452 fd_sector(cur_drv)); 2453 break; 2454 } 2455 } 2456 2457 /* Switch to result phase when done with the transfer */ 2458 if (fdctrl->data_pos == fdctrl->data_len) { 2459 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00); 2460 } 2461 break; 2462 2463 case FD_PHASE_COMMAND: 2464 assert(!(fdctrl->msr & FD_MSR_NONDMA)); 2465 assert(fdctrl->data_pos < FD_SECTOR_LEN); 2466 2467 if (pos == 0) { 2468 /* The first byte specifies the command. Now we start reading 2469 * as many parameters as this command requires. */ 2470 cmd = get_command(value); 2471 fdctrl->data_len = cmd->parameters + 1; 2472 if (cmd->parameters) { 2473 fdctrl->msr |= FD_MSR_RQM; 2474 } 2475 fdctrl->msr |= FD_MSR_CMDBUSY; 2476 } 2477 2478 if (fdctrl->data_pos == fdctrl->data_len) { 2479 /* We have all parameters now, execute the command */ 2480 fdctrl->phase = FD_PHASE_EXECUTION; 2481 2482 if (fdctrl->data_state & FD_STATE_FORMAT) { 2483 fdctrl_format_sector(fdctrl); 2484 break; 2485 } 2486 2487 cmd = get_command(fdctrl->fifo[0]); 2488 FLOPPY_DPRINTF("Calling handler for '%s'\n", cmd->name); 2489 cmd->handler(fdctrl, cmd->direction); 2490 } 2491 break; 2492 2493 case FD_PHASE_RESULT: 2494 default: 2495 abort(); 2496 } 2497 } 2498 2499 static void fdctrl_result_timer(void *opaque) 2500 { 2501 FDCtrl *fdctrl = opaque; 2502 FDrive *cur_drv = get_cur_drv(fdctrl); 2503 2504 /* Pretend we are spinning. 2505 * This is needed for Coherent, which uses READ ID to check for 2506 * sector interleaving. 2507 */ 2508 if (cur_drv->last_sect != 0) { 2509 cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1; 2510 } 2511 /* READ_ID can't automatically succeed! */ 2512 if (fdctrl->check_media_rate && 2513 (fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) { 2514 FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n", 2515 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate); 2516 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00); 2517 } else { 2518 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00); 2519 } 2520 } 2521 2522 /* Init functions */ 2523 static void fdctrl_connect_drives(FDCtrl *fdctrl, DeviceState *fdc_dev, 2524 Error **errp) 2525 { 2526 unsigned int i; 2527 FDrive *drive; 2528 DeviceState *dev; 2529 BlockBackend *blk; 2530 Error *local_err = NULL; 2531 2532 for (i = 0; i < MAX_FD; i++) { 2533 drive = &fdctrl->drives[i]; 2534 drive->fdctrl = fdctrl; 2535 2536 /* If the drive is not present, we skip creating the qdev device, but 2537 * still have to initialise the controller. */ 2538 blk = fdctrl->qdev_for_drives[i].blk; 2539 if (!blk) { 2540 fd_init(drive); 2541 fd_revalidate(drive); 2542 continue; 2543 } 2544 2545 dev = qdev_create(&fdctrl->bus.bus, "floppy"); 2546 qdev_prop_set_uint32(dev, "unit", i); 2547 qdev_prop_set_enum(dev, "drive-type", fdctrl->qdev_for_drives[i].type); 2548 2549 blk_ref(blk); 2550 blk_detach_dev(blk, fdc_dev); 2551 fdctrl->qdev_for_drives[i].blk = NULL; 2552 qdev_prop_set_drive(dev, "drive", blk, &local_err); 2553 blk_unref(blk); 2554 2555 if (local_err) { 2556 error_propagate(errp, local_err); 2557 return; 2558 } 2559 2560 object_property_set_bool(OBJECT(dev), true, "realized", &local_err); 2561 if (local_err) { 2562 error_propagate(errp, local_err); 2563 return; 2564 } 2565 } 2566 } 2567 2568 ISADevice *fdctrl_init_isa(ISABus *bus, DriveInfo **fds) 2569 { 2570 DeviceState *dev; 2571 ISADevice *isadev; 2572 2573 isadev = isa_try_create(bus, TYPE_ISA_FDC); 2574 if (!isadev) { 2575 return NULL; 2576 } 2577 dev = DEVICE(isadev); 2578 2579 if (fds[0]) { 2580 qdev_prop_set_drive(dev, "driveA", blk_by_legacy_dinfo(fds[0]), 2581 &error_fatal); 2582 } 2583 if (fds[1]) { 2584 qdev_prop_set_drive(dev, "driveB", blk_by_legacy_dinfo(fds[1]), 2585 &error_fatal); 2586 } 2587 qdev_init_nofail(dev); 2588 2589 return isadev; 2590 } 2591 2592 void fdctrl_init_sysbus(qemu_irq irq, int dma_chann, 2593 hwaddr mmio_base, DriveInfo **fds) 2594 { 2595 FDCtrl *fdctrl; 2596 DeviceState *dev; 2597 SysBusDevice *sbd; 2598 FDCtrlSysBus *sys; 2599 2600 dev = qdev_create(NULL, "sysbus-fdc"); 2601 sys = SYSBUS_FDC(dev); 2602 fdctrl = &sys->state; 2603 fdctrl->dma_chann = dma_chann; /* FIXME */ 2604 if (fds[0]) { 2605 qdev_prop_set_drive(dev, "driveA", blk_by_legacy_dinfo(fds[0]), 2606 &error_fatal); 2607 } 2608 if (fds[1]) { 2609 qdev_prop_set_drive(dev, "driveB", blk_by_legacy_dinfo(fds[1]), 2610 &error_fatal); 2611 } 2612 qdev_init_nofail(dev); 2613 sbd = SYS_BUS_DEVICE(dev); 2614 sysbus_connect_irq(sbd, 0, irq); 2615 sysbus_mmio_map(sbd, 0, mmio_base); 2616 } 2617 2618 void sun4m_fdctrl_init(qemu_irq irq, hwaddr io_base, 2619 DriveInfo **fds, qemu_irq *fdc_tc) 2620 { 2621 DeviceState *dev; 2622 FDCtrlSysBus *sys; 2623 2624 dev = qdev_create(NULL, "SUNW,fdtwo"); 2625 if (fds[0]) { 2626 qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(fds[0]), 2627 &error_fatal); 2628 } 2629 qdev_init_nofail(dev); 2630 sys = SYSBUS_FDC(dev); 2631 sysbus_connect_irq(SYS_BUS_DEVICE(sys), 0, irq); 2632 sysbus_mmio_map(SYS_BUS_DEVICE(sys), 0, io_base); 2633 *fdc_tc = qdev_get_gpio_in(dev, 0); 2634 } 2635 2636 static void fdctrl_realize_common(DeviceState *dev, FDCtrl *fdctrl, 2637 Error **errp) 2638 { 2639 int i, j; 2640 static int command_tables_inited = 0; 2641 2642 if (fdctrl->fallback == FLOPPY_DRIVE_TYPE_AUTO) { 2643 error_setg(errp, "Cannot choose a fallback FDrive type of 'auto'"); 2644 } 2645 2646 /* Fill 'command_to_handler' lookup table */ 2647 if (!command_tables_inited) { 2648 command_tables_inited = 1; 2649 for (i = ARRAY_SIZE(handlers) - 1; i >= 0; i--) { 2650 for (j = 0; j < sizeof(command_to_handler); j++) { 2651 if ((j & handlers[i].mask) == handlers[i].value) { 2652 command_to_handler[j] = i; 2653 } 2654 } 2655 } 2656 } 2657 2658 FLOPPY_DPRINTF("init controller\n"); 2659 fdctrl->fifo = qemu_memalign(512, FD_SECTOR_LEN); 2660 fdctrl->fifo_size = 512; 2661 fdctrl->result_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, 2662 fdctrl_result_timer, fdctrl); 2663 2664 fdctrl->version = 0x90; /* Intel 82078 controller */ 2665 fdctrl->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */ 2666 fdctrl->num_floppies = MAX_FD; 2667 2668 if (fdctrl->dma_chann != -1) { 2669 IsaDmaClass *k; 2670 assert(fdctrl->dma); 2671 k = ISADMA_GET_CLASS(fdctrl->dma); 2672 k->register_channel(fdctrl->dma, fdctrl->dma_chann, 2673 &fdctrl_transfer_handler, fdctrl); 2674 } 2675 2676 floppy_bus_create(fdctrl, &fdctrl->bus, dev); 2677 fdctrl_connect_drives(fdctrl, dev, errp); 2678 } 2679 2680 static const MemoryRegionPortio fdc_portio_list[] = { 2681 { 1, 5, 1, .read = fdctrl_read, .write = fdctrl_write }, 2682 { 7, 1, 1, .read = fdctrl_read, .write = fdctrl_write }, 2683 PORTIO_END_OF_LIST(), 2684 }; 2685 2686 static void isabus_fdc_realize(DeviceState *dev, Error **errp) 2687 { 2688 ISADevice *isadev = ISA_DEVICE(dev); 2689 FDCtrlISABus *isa = ISA_FDC(dev); 2690 FDCtrl *fdctrl = &isa->state; 2691 Error *err = NULL; 2692 2693 isa_register_portio_list(isadev, &fdctrl->portio_list, 2694 isa->iobase, fdc_portio_list, fdctrl, 2695 "fdc"); 2696 2697 isa_init_irq(isadev, &fdctrl->irq, isa->irq); 2698 fdctrl->dma_chann = isa->dma; 2699 if (fdctrl->dma_chann != -1) { 2700 fdctrl->dma = isa_get_dma(isa_bus_from_device(isadev), isa->dma); 2701 assert(fdctrl->dma); 2702 } 2703 2704 qdev_set_legacy_instance_id(dev, isa->iobase, 2); 2705 fdctrl_realize_common(dev, fdctrl, &err); 2706 if (err != NULL) { 2707 error_propagate(errp, err); 2708 return; 2709 } 2710 } 2711 2712 static void sysbus_fdc_initfn(Object *obj) 2713 { 2714 SysBusDevice *sbd = SYS_BUS_DEVICE(obj); 2715 FDCtrlSysBus *sys = SYSBUS_FDC(obj); 2716 FDCtrl *fdctrl = &sys->state; 2717 2718 fdctrl->dma_chann = -1; 2719 2720 memory_region_init_io(&fdctrl->iomem, obj, &fdctrl_mem_ops, fdctrl, 2721 "fdc", 0x08); 2722 sysbus_init_mmio(sbd, &fdctrl->iomem); 2723 } 2724 2725 static void sun4m_fdc_initfn(Object *obj) 2726 { 2727 SysBusDevice *sbd = SYS_BUS_DEVICE(obj); 2728 FDCtrlSysBus *sys = SYSBUS_FDC(obj); 2729 FDCtrl *fdctrl = &sys->state; 2730 2731 fdctrl->dma_chann = -1; 2732 2733 memory_region_init_io(&fdctrl->iomem, obj, &fdctrl_mem_strict_ops, 2734 fdctrl, "fdctrl", 0x08); 2735 sysbus_init_mmio(sbd, &fdctrl->iomem); 2736 } 2737 2738 static void sysbus_fdc_common_initfn(Object *obj) 2739 { 2740 DeviceState *dev = DEVICE(obj); 2741 SysBusDevice *sbd = SYS_BUS_DEVICE(dev); 2742 FDCtrlSysBus *sys = SYSBUS_FDC(obj); 2743 FDCtrl *fdctrl = &sys->state; 2744 2745 qdev_set_legacy_instance_id(dev, 0 /* io */, 2); /* FIXME */ 2746 2747 sysbus_init_irq(sbd, &fdctrl->irq); 2748 qdev_init_gpio_in(dev, fdctrl_handle_tc, 1); 2749 } 2750 2751 static void sysbus_fdc_common_realize(DeviceState *dev, Error **errp) 2752 { 2753 FDCtrlSysBus *sys = SYSBUS_FDC(dev); 2754 FDCtrl *fdctrl = &sys->state; 2755 2756 fdctrl_realize_common(dev, fdctrl, errp); 2757 } 2758 2759 FloppyDriveType isa_fdc_get_drive_type(ISADevice *fdc, int i) 2760 { 2761 FDCtrlISABus *isa = ISA_FDC(fdc); 2762 2763 return isa->state.drives[i].drive; 2764 } 2765 2766 void isa_fdc_get_drive_max_chs(FloppyDriveType type, 2767 uint8_t *maxc, uint8_t *maxh, uint8_t *maxs) 2768 { 2769 const FDFormat *fdf; 2770 2771 *maxc = *maxh = *maxs = 0; 2772 for (fdf = fd_formats; fdf->drive != FLOPPY_DRIVE_TYPE_NONE; fdf++) { 2773 if (fdf->drive != type) { 2774 continue; 2775 } 2776 if (*maxc < fdf->max_track) { 2777 *maxc = fdf->max_track; 2778 } 2779 if (*maxh < fdf->max_head) { 2780 *maxh = fdf->max_head; 2781 } 2782 if (*maxs < fdf->last_sect) { 2783 *maxs = fdf->last_sect; 2784 } 2785 } 2786 (*maxc)--; 2787 } 2788 2789 static const VMStateDescription vmstate_isa_fdc ={ 2790 .name = "fdc", 2791 .version_id = 2, 2792 .minimum_version_id = 2, 2793 .fields = (VMStateField[]) { 2794 VMSTATE_STRUCT(state, FDCtrlISABus, 0, vmstate_fdc, FDCtrl), 2795 VMSTATE_END_OF_LIST() 2796 } 2797 }; 2798 2799 static Property isa_fdc_properties[] = { 2800 DEFINE_PROP_UINT32("iobase", FDCtrlISABus, iobase, 0x3f0), 2801 DEFINE_PROP_UINT32("irq", FDCtrlISABus, irq, 6), 2802 DEFINE_PROP_UINT32("dma", FDCtrlISABus, dma, 2), 2803 DEFINE_PROP_DRIVE("driveA", FDCtrlISABus, state.qdev_for_drives[0].blk), 2804 DEFINE_PROP_DRIVE("driveB", FDCtrlISABus, state.qdev_for_drives[1].blk), 2805 DEFINE_PROP_BIT("check_media_rate", FDCtrlISABus, state.check_media_rate, 2806 0, true), 2807 DEFINE_PROP_SIGNED("fdtypeA", FDCtrlISABus, state.qdev_for_drives[0].type, 2808 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type, 2809 FloppyDriveType), 2810 DEFINE_PROP_SIGNED("fdtypeB", FDCtrlISABus, state.qdev_for_drives[1].type, 2811 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type, 2812 FloppyDriveType), 2813 DEFINE_PROP_SIGNED("fallback", FDCtrlISABus, state.fallback, 2814 FLOPPY_DRIVE_TYPE_288, qdev_prop_fdc_drive_type, 2815 FloppyDriveType), 2816 DEFINE_PROP_END_OF_LIST(), 2817 }; 2818 2819 static void isabus_fdc_class_init(ObjectClass *klass, void *data) 2820 { 2821 DeviceClass *dc = DEVICE_CLASS(klass); 2822 2823 dc->realize = isabus_fdc_realize; 2824 dc->fw_name = "fdc"; 2825 dc->reset = fdctrl_external_reset_isa; 2826 dc->vmsd = &vmstate_isa_fdc; 2827 dc->props = isa_fdc_properties; 2828 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 2829 } 2830 2831 static void isabus_fdc_instance_init(Object *obj) 2832 { 2833 FDCtrlISABus *isa = ISA_FDC(obj); 2834 2835 device_add_bootindex_property(obj, &isa->bootindexA, 2836 "bootindexA", "/floppy@0", 2837 DEVICE(obj), NULL); 2838 device_add_bootindex_property(obj, &isa->bootindexB, 2839 "bootindexB", "/floppy@1", 2840 DEVICE(obj), NULL); 2841 } 2842 2843 static const TypeInfo isa_fdc_info = { 2844 .name = TYPE_ISA_FDC, 2845 .parent = TYPE_ISA_DEVICE, 2846 .instance_size = sizeof(FDCtrlISABus), 2847 .class_init = isabus_fdc_class_init, 2848 .instance_init = isabus_fdc_instance_init, 2849 }; 2850 2851 static const VMStateDescription vmstate_sysbus_fdc ={ 2852 .name = "fdc", 2853 .version_id = 2, 2854 .minimum_version_id = 2, 2855 .fields = (VMStateField[]) { 2856 VMSTATE_STRUCT(state, FDCtrlSysBus, 0, vmstate_fdc, FDCtrl), 2857 VMSTATE_END_OF_LIST() 2858 } 2859 }; 2860 2861 static Property sysbus_fdc_properties[] = { 2862 DEFINE_PROP_DRIVE("driveA", FDCtrlSysBus, state.qdev_for_drives[0].blk), 2863 DEFINE_PROP_DRIVE("driveB", FDCtrlSysBus, state.qdev_for_drives[1].blk), 2864 DEFINE_PROP_SIGNED("fdtypeA", FDCtrlSysBus, state.qdev_for_drives[0].type, 2865 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type, 2866 FloppyDriveType), 2867 DEFINE_PROP_SIGNED("fdtypeB", FDCtrlSysBus, state.qdev_for_drives[1].type, 2868 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type, 2869 FloppyDriveType), 2870 DEFINE_PROP_SIGNED("fallback", FDCtrlISABus, state.fallback, 2871 FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type, 2872 FloppyDriveType), 2873 DEFINE_PROP_END_OF_LIST(), 2874 }; 2875 2876 static void sysbus_fdc_class_init(ObjectClass *klass, void *data) 2877 { 2878 DeviceClass *dc = DEVICE_CLASS(klass); 2879 2880 dc->props = sysbus_fdc_properties; 2881 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 2882 } 2883 2884 static const TypeInfo sysbus_fdc_info = { 2885 .name = "sysbus-fdc", 2886 .parent = TYPE_SYSBUS_FDC, 2887 .instance_init = sysbus_fdc_initfn, 2888 .class_init = sysbus_fdc_class_init, 2889 }; 2890 2891 static Property sun4m_fdc_properties[] = { 2892 DEFINE_PROP_DRIVE("drive", FDCtrlSysBus, state.qdev_for_drives[0].blk), 2893 DEFINE_PROP_SIGNED("fdtype", FDCtrlSysBus, state.qdev_for_drives[0].type, 2894 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type, 2895 FloppyDriveType), 2896 DEFINE_PROP_SIGNED("fallback", FDCtrlISABus, state.fallback, 2897 FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type, 2898 FloppyDriveType), 2899 DEFINE_PROP_END_OF_LIST(), 2900 }; 2901 2902 static void sun4m_fdc_class_init(ObjectClass *klass, void *data) 2903 { 2904 DeviceClass *dc = DEVICE_CLASS(klass); 2905 2906 dc->props = sun4m_fdc_properties; 2907 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 2908 } 2909 2910 static const TypeInfo sun4m_fdc_info = { 2911 .name = "SUNW,fdtwo", 2912 .parent = TYPE_SYSBUS_FDC, 2913 .instance_init = sun4m_fdc_initfn, 2914 .class_init = sun4m_fdc_class_init, 2915 }; 2916 2917 static void sysbus_fdc_common_class_init(ObjectClass *klass, void *data) 2918 { 2919 DeviceClass *dc = DEVICE_CLASS(klass); 2920 2921 dc->realize = sysbus_fdc_common_realize; 2922 dc->reset = fdctrl_external_reset_sysbus; 2923 dc->vmsd = &vmstate_sysbus_fdc; 2924 } 2925 2926 static const TypeInfo sysbus_fdc_type_info = { 2927 .name = TYPE_SYSBUS_FDC, 2928 .parent = TYPE_SYS_BUS_DEVICE, 2929 .instance_size = sizeof(FDCtrlSysBus), 2930 .instance_init = sysbus_fdc_common_initfn, 2931 .abstract = true, 2932 .class_init = sysbus_fdc_common_class_init, 2933 }; 2934 2935 static void fdc_register_types(void) 2936 { 2937 type_register_static(&isa_fdc_info); 2938 type_register_static(&sysbus_fdc_type_info); 2939 type_register_static(&sysbus_fdc_info); 2940 type_register_static(&sun4m_fdc_info); 2941 type_register_static(&floppy_bus_info); 2942 type_register_static(&floppy_drive_info); 2943 } 2944 2945 type_init(fdc_register_types) 2946