1 /* 2 * QEMU Floppy disk emulator (Intel 82078) 3 * 4 * Copyright (c) 2003, 2007 Jocelyn Mayer 5 * Copyright (c) 2008 Hervé Poussineau 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 26 #include "qemu/osdep.h" 27 #include "qapi/error.h" 28 #include "qom/object.h" 29 #include "hw/sysbus.h" 30 #include "hw/block/fdc.h" 31 #include "migration/vmstate.h" 32 #include "fdc-internal.h" 33 #include "trace.h" 34 35 #define TYPE_SYSBUS_FDC "base-sysbus-fdc" 36 typedef struct FDCtrlSysBusClass FDCtrlSysBusClass; 37 typedef struct FDCtrlSysBus FDCtrlSysBus; 38 DECLARE_OBJ_CHECKERS(FDCtrlSysBus, FDCtrlSysBusClass, 39 SYSBUS_FDC, TYPE_SYSBUS_FDC) 40 41 struct FDCtrlSysBusClass { 42 /*< private >*/ 43 SysBusDeviceClass parent_class; 44 /*< public >*/ 45 46 bool use_strict_io; 47 }; 48 49 struct FDCtrlSysBus { 50 /*< private >*/ 51 SysBusDevice parent_obj; 52 /*< public >*/ 53 54 struct FDCtrl state; 55 }; 56 57 static uint64_t fdctrl_read_mem(void *opaque, hwaddr reg, unsigned ize) 58 { 59 return fdctrl_read(opaque, (uint32_t)reg); 60 } 61 62 static void fdctrl_write_mem(void *opaque, hwaddr reg, 63 uint64_t value, unsigned size) 64 { 65 fdctrl_write(opaque, (uint32_t)reg, value); 66 } 67 68 static const MemoryRegionOps fdctrl_mem_ops = { 69 .read = fdctrl_read_mem, 70 .write = fdctrl_write_mem, 71 .endianness = DEVICE_NATIVE_ENDIAN, 72 }; 73 74 static const MemoryRegionOps fdctrl_mem_strict_ops = { 75 .read = fdctrl_read_mem, 76 .write = fdctrl_write_mem, 77 .endianness = DEVICE_NATIVE_ENDIAN, 78 .valid = { 79 .min_access_size = 1, 80 .max_access_size = 1, 81 }, 82 }; 83 84 static void fdctrl_external_reset_sysbus(DeviceState *d) 85 { 86 FDCtrlSysBus *sys = SYSBUS_FDC(d); 87 FDCtrl *s = &sys->state; 88 89 fdctrl_reset(s, 0); 90 } 91 92 static void fdctrl_handle_tc(void *opaque, int irq, int level) 93 { 94 trace_fdctrl_tc_pulse(level); 95 } 96 97 void fdctrl_init_sysbus(qemu_irq irq, int dma_chann, 98 hwaddr mmio_base, DriveInfo **fds) 99 { 100 FDCtrl *fdctrl; 101 DeviceState *dev; 102 SysBusDevice *sbd; 103 FDCtrlSysBus *sys; 104 105 dev = qdev_new("sysbus-fdc"); 106 sys = SYSBUS_FDC(dev); 107 fdctrl = &sys->state; 108 fdctrl->dma_chann = dma_chann; /* FIXME */ 109 sbd = SYS_BUS_DEVICE(dev); 110 sysbus_realize_and_unref(sbd, &error_fatal); 111 sysbus_connect_irq(sbd, 0, irq); 112 sysbus_mmio_map(sbd, 0, mmio_base); 113 114 fdctrl_init_drives(&sys->state.bus, fds); 115 } 116 117 void sun4m_fdctrl_init(qemu_irq irq, hwaddr io_base, 118 DriveInfo **fds, qemu_irq *fdc_tc) 119 { 120 DeviceState *dev; 121 FDCtrlSysBus *sys; 122 123 dev = qdev_new("sun-fdtwo"); 124 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 125 sys = SYSBUS_FDC(dev); 126 sysbus_connect_irq(SYS_BUS_DEVICE(sys), 0, irq); 127 sysbus_mmio_map(SYS_BUS_DEVICE(sys), 0, io_base); 128 *fdc_tc = qdev_get_gpio_in(dev, 0); 129 130 fdctrl_init_drives(&sys->state.bus, fds); 131 } 132 133 static void sysbus_fdc_common_instance_init(Object *obj) 134 { 135 DeviceState *dev = DEVICE(obj); 136 FDCtrlSysBusClass *sbdc = SYSBUS_FDC_GET_CLASS(obj); 137 SysBusDevice *sbd = SYS_BUS_DEVICE(dev); 138 FDCtrlSysBus *sys = SYSBUS_FDC(obj); 139 FDCtrl *fdctrl = &sys->state; 140 141 qdev_set_legacy_instance_id(dev, 0 /* io */, 2); /* FIXME */ 142 143 memory_region_init_io(&fdctrl->iomem, obj, 144 sbdc->use_strict_io ? &fdctrl_mem_strict_ops 145 : &fdctrl_mem_ops, 146 fdctrl, "fdc", 0x08); 147 sysbus_init_mmio(sbd, &fdctrl->iomem); 148 149 sysbus_init_irq(sbd, &fdctrl->irq); 150 qdev_init_gpio_in(dev, fdctrl_handle_tc, 1); 151 } 152 153 static void sysbus_fdc_realize(DeviceState *dev, Error **errp) 154 { 155 FDCtrlSysBus *sys = SYSBUS_FDC(dev); 156 FDCtrl *fdctrl = &sys->state; 157 158 fdctrl_realize_common(dev, fdctrl, errp); 159 } 160 161 static const VMStateDescription vmstate_sysbus_fdc = { 162 .name = "fdc", 163 .version_id = 2, 164 .minimum_version_id = 2, 165 .fields = (VMStateField[]) { 166 VMSTATE_STRUCT(state, FDCtrlSysBus, 0, vmstate_fdc, FDCtrl), 167 VMSTATE_END_OF_LIST() 168 } 169 }; 170 171 static void sysbus_fdc_common_class_init(ObjectClass *klass, void *data) 172 { 173 DeviceClass *dc = DEVICE_CLASS(klass); 174 175 dc->realize = sysbus_fdc_realize; 176 dc->reset = fdctrl_external_reset_sysbus; 177 dc->vmsd = &vmstate_sysbus_fdc; 178 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 179 } 180 181 static const TypeInfo sysbus_fdc_common_typeinfo = { 182 .name = TYPE_SYSBUS_FDC, 183 .parent = TYPE_SYS_BUS_DEVICE, 184 .instance_size = sizeof(FDCtrlSysBus), 185 .instance_init = sysbus_fdc_common_instance_init, 186 .abstract = true, 187 .class_init = sysbus_fdc_common_class_init, 188 .class_size = sizeof(FDCtrlSysBusClass), 189 }; 190 191 static Property sysbus_fdc_properties[] = { 192 DEFINE_PROP_SIGNED("fdtypeA", FDCtrlSysBus, state.qdev_for_drives[0].type, 193 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type, 194 FloppyDriveType), 195 DEFINE_PROP_SIGNED("fdtypeB", FDCtrlSysBus, state.qdev_for_drives[1].type, 196 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type, 197 FloppyDriveType), 198 DEFINE_PROP_SIGNED("fallback", FDCtrlSysBus, state.fallback, 199 FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type, 200 FloppyDriveType), 201 DEFINE_PROP_END_OF_LIST(), 202 }; 203 204 static void sysbus_fdc_class_init(ObjectClass *klass, void *data) 205 { 206 DeviceClass *dc = DEVICE_CLASS(klass); 207 208 dc->desc = "virtual floppy controller"; 209 device_class_set_props(dc, sysbus_fdc_properties); 210 } 211 212 static const TypeInfo sysbus_fdc_typeinfo = { 213 .name = "sysbus-fdc", 214 .parent = TYPE_SYSBUS_FDC, 215 .class_init = sysbus_fdc_class_init, 216 }; 217 218 static Property sun4m_fdc_properties[] = { 219 DEFINE_PROP_SIGNED("fdtype", FDCtrlSysBus, state.qdev_for_drives[0].type, 220 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type, 221 FloppyDriveType), 222 DEFINE_PROP_SIGNED("fallback", FDCtrlSysBus, state.fallback, 223 FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type, 224 FloppyDriveType), 225 DEFINE_PROP_END_OF_LIST(), 226 }; 227 228 static void sun4m_fdc_class_init(ObjectClass *klass, void *data) 229 { 230 FDCtrlSysBusClass *sbdc = SYSBUS_FDC_CLASS(klass); 231 DeviceClass *dc = DEVICE_CLASS(klass); 232 233 sbdc->use_strict_io = true; 234 dc->desc = "virtual floppy controller"; 235 device_class_set_props(dc, sun4m_fdc_properties); 236 } 237 238 static const TypeInfo sun4m_fdc_typeinfo = { 239 .name = "sun-fdtwo", 240 .parent = TYPE_SYSBUS_FDC, 241 .class_init = sun4m_fdc_class_init, 242 }; 243 244 static void sysbus_fdc_register_types(void) 245 { 246 type_register_static(&sysbus_fdc_common_typeinfo); 247 type_register_static(&sysbus_fdc_typeinfo); 248 type_register_static(&sun4m_fdc_typeinfo); 249 } 250 251 type_init(sysbus_fdc_register_types) 252