1 /* 2 * QEMU Floppy disk emulator (Intel 82078) 3 * 4 * Copyright (c) 2003, 2007 Jocelyn Mayer 5 * Copyright (c) 2008 Hervé Poussineau 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a copy 8 * of this software and associated documentation files (the "Software"), to deal 9 * in the Software without restriction, including without limitation the rights 10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 11 * copies of the Software, and to permit persons to whom the Software is 12 * furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 23 * THE SOFTWARE. 24 */ 25 26 #include "qemu/osdep.h" 27 #include "qapi/error.h" 28 #include "qom/object.h" 29 #include "exec/memory.h" 30 #include "hw/sysbus.h" 31 #include "hw/block/fdc.h" 32 #include "migration/vmstate.h" 33 #include "fdc-internal.h" 34 #include "trace.h" 35 36 #define TYPE_SYSBUS_FDC "base-sysbus-fdc" 37 typedef struct FDCtrlSysBusClass FDCtrlSysBusClass; 38 typedef struct FDCtrlSysBus FDCtrlSysBus; 39 DECLARE_OBJ_CHECKERS(FDCtrlSysBus, FDCtrlSysBusClass, 40 SYSBUS_FDC, TYPE_SYSBUS_FDC) 41 42 struct FDCtrlSysBusClass { 43 /*< private >*/ 44 SysBusDeviceClass parent_class; 45 /*< public >*/ 46 47 bool use_strict_io; 48 }; 49 50 struct FDCtrlSysBus { 51 /*< private >*/ 52 SysBusDevice parent_obj; 53 /*< public >*/ 54 55 struct FDCtrl state; 56 MemoryRegion iomem; 57 }; 58 59 static uint64_t fdctrl_read_mem(void *opaque, hwaddr reg, unsigned ize) 60 { 61 return fdctrl_read(opaque, (uint32_t)reg); 62 } 63 64 static void fdctrl_write_mem(void *opaque, hwaddr reg, 65 uint64_t value, unsigned size) 66 { 67 fdctrl_write(opaque, (uint32_t)reg, value); 68 } 69 70 static const MemoryRegionOps fdctrl_mem_ops = { 71 .read = fdctrl_read_mem, 72 .write = fdctrl_write_mem, 73 .endianness = DEVICE_NATIVE_ENDIAN, 74 }; 75 76 static const MemoryRegionOps fdctrl_mem_strict_ops = { 77 .read = fdctrl_read_mem, 78 .write = fdctrl_write_mem, 79 .endianness = DEVICE_NATIVE_ENDIAN, 80 .valid = { 81 .min_access_size = 1, 82 .max_access_size = 1, 83 }, 84 }; 85 86 static void fdctrl_external_reset_sysbus(DeviceState *d) 87 { 88 FDCtrlSysBus *sys = SYSBUS_FDC(d); 89 FDCtrl *s = &sys->state; 90 91 fdctrl_reset(s, 0); 92 } 93 94 static void fdctrl_handle_tc(void *opaque, int irq, int level) 95 { 96 trace_fdctrl_tc_pulse(level); 97 } 98 99 void fdctrl_init_sysbus(qemu_irq irq, hwaddr mmio_base, DriveInfo **fds) 100 { 101 DeviceState *dev; 102 SysBusDevice *sbd; 103 FDCtrlSysBus *sys; 104 105 dev = qdev_new("sysbus-fdc"); 106 sys = SYSBUS_FDC(dev); 107 sbd = SYS_BUS_DEVICE(dev); 108 sysbus_realize_and_unref(sbd, &error_fatal); 109 sysbus_connect_irq(sbd, 0, irq); 110 sysbus_mmio_map(sbd, 0, mmio_base); 111 112 fdctrl_init_drives(&sys->state.bus, fds); 113 } 114 115 void sun4m_fdctrl_init(qemu_irq irq, hwaddr io_base, 116 DriveInfo **fds, qemu_irq *fdc_tc) 117 { 118 DeviceState *dev; 119 FDCtrlSysBus *sys; 120 121 dev = qdev_new("sun-fdtwo"); 122 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); 123 sys = SYSBUS_FDC(dev); 124 sysbus_connect_irq(SYS_BUS_DEVICE(sys), 0, irq); 125 sysbus_mmio_map(SYS_BUS_DEVICE(sys), 0, io_base); 126 *fdc_tc = qdev_get_gpio_in(dev, 0); 127 128 fdctrl_init_drives(&sys->state.bus, fds); 129 } 130 131 static void sysbus_fdc_common_instance_init(Object *obj) 132 { 133 DeviceState *dev = DEVICE(obj); 134 FDCtrlSysBusClass *sbdc = SYSBUS_FDC_GET_CLASS(obj); 135 SysBusDevice *sbd = SYS_BUS_DEVICE(dev); 136 FDCtrlSysBus *sys = SYSBUS_FDC(obj); 137 FDCtrl *fdctrl = &sys->state; 138 139 /* 140 * DMA is not currently supported for sysbus floppy controllers. 141 * If we wanted to add support then probably the best approach is 142 * to have a QOM link property 'dma-controller' which the board 143 * code can set to an instance of IsaDmaClass, and an integer 144 * property 'dma-channel', so that we can set fdctrl->dma and 145 * fdctrl->dma_chann accordingly. 146 */ 147 fdctrl->dma_chann = -1; 148 149 qdev_set_legacy_instance_id(dev, 0 /* io */, 2); /* FIXME */ 150 151 memory_region_init_io(&sys->iomem, obj, 152 sbdc->use_strict_io ? &fdctrl_mem_strict_ops 153 : &fdctrl_mem_ops, 154 fdctrl, "fdc", 0x08); 155 sysbus_init_mmio(sbd, &sys->iomem); 156 157 sysbus_init_irq(sbd, &fdctrl->irq); 158 qdev_init_gpio_in(dev, fdctrl_handle_tc, 1); 159 } 160 161 static void sysbus_fdc_realize(DeviceState *dev, Error **errp) 162 { 163 FDCtrlSysBus *sys = SYSBUS_FDC(dev); 164 FDCtrl *fdctrl = &sys->state; 165 166 fdctrl_realize_common(dev, fdctrl, errp); 167 } 168 169 static const VMStateDescription vmstate_sysbus_fdc = { 170 .name = "fdc", 171 .version_id = 2, 172 .minimum_version_id = 2, 173 .fields = (const VMStateField[]) { 174 VMSTATE_STRUCT(state, FDCtrlSysBus, 0, vmstate_fdc, FDCtrl), 175 VMSTATE_END_OF_LIST() 176 } 177 }; 178 179 static void sysbus_fdc_common_class_init(ObjectClass *klass, void *data) 180 { 181 DeviceClass *dc = DEVICE_CLASS(klass); 182 183 dc->realize = sysbus_fdc_realize; 184 device_class_set_legacy_reset(dc, fdctrl_external_reset_sysbus); 185 dc->vmsd = &vmstate_sysbus_fdc; 186 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); 187 } 188 189 static const TypeInfo sysbus_fdc_common_typeinfo = { 190 .name = TYPE_SYSBUS_FDC, 191 .parent = TYPE_SYS_BUS_DEVICE, 192 .instance_size = sizeof(FDCtrlSysBus), 193 .instance_init = sysbus_fdc_common_instance_init, 194 .abstract = true, 195 .class_init = sysbus_fdc_common_class_init, 196 .class_size = sizeof(FDCtrlSysBusClass), 197 }; 198 199 static Property sysbus_fdc_properties[] = { 200 DEFINE_PROP_SIGNED("fdtypeA", FDCtrlSysBus, state.qdev_for_drives[0].type, 201 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type, 202 FloppyDriveType), 203 DEFINE_PROP_SIGNED("fdtypeB", FDCtrlSysBus, state.qdev_for_drives[1].type, 204 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type, 205 FloppyDriveType), 206 DEFINE_PROP_SIGNED("fallback", FDCtrlSysBus, state.fallback, 207 FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type, 208 FloppyDriveType), 209 DEFINE_PROP_END_OF_LIST(), 210 }; 211 212 static void sysbus_fdc_class_init(ObjectClass *klass, void *data) 213 { 214 DeviceClass *dc = DEVICE_CLASS(klass); 215 216 dc->desc = "virtual floppy controller"; 217 device_class_set_props(dc, sysbus_fdc_properties); 218 } 219 220 static const TypeInfo sysbus_fdc_typeinfo = { 221 .name = "sysbus-fdc", 222 .parent = TYPE_SYSBUS_FDC, 223 .class_init = sysbus_fdc_class_init, 224 }; 225 226 static Property sun4m_fdc_properties[] = { 227 DEFINE_PROP_SIGNED("fdtype", FDCtrlSysBus, state.qdev_for_drives[0].type, 228 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type, 229 FloppyDriveType), 230 DEFINE_PROP_SIGNED("fallback", FDCtrlSysBus, state.fallback, 231 FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type, 232 FloppyDriveType), 233 DEFINE_PROP_END_OF_LIST(), 234 }; 235 236 static void sun4m_fdc_class_init(ObjectClass *klass, void *data) 237 { 238 FDCtrlSysBusClass *sbdc = SYSBUS_FDC_CLASS(klass); 239 DeviceClass *dc = DEVICE_CLASS(klass); 240 241 sbdc->use_strict_io = true; 242 dc->desc = "virtual floppy controller"; 243 device_class_set_props(dc, sun4m_fdc_properties); 244 } 245 246 static const TypeInfo sun4m_fdc_typeinfo = { 247 .name = "sun-fdtwo", 248 .parent = TYPE_SYSBUS_FDC, 249 .class_init = sun4m_fdc_class_init, 250 }; 251 252 static void sysbus_fdc_register_types(void) 253 { 254 type_register_static(&sysbus_fdc_common_typeinfo); 255 type_register_static(&sysbus_fdc_typeinfo); 256 type_register_static(&sun4m_fdc_typeinfo); 257 } 258 259 type_init(sysbus_fdc_register_types) 260