xref: /openbmc/qemu/hw/avr/atmega.h (revision 7acafcfa)
1 /*
2  * QEMU ATmega MCU
3  *
4  * Copyright (c) 2019-2020 Philippe Mathieu-Daudé
5  *
6  * This work is licensed under the terms of the GNU GPLv2 or later.
7  * See the COPYING file in the top-level directory.
8  * SPDX-License-Identifier: GPL-2.0-or-later
9  */
10 
11 #ifndef HW_AVR_ATMEGA_H
12 #define HW_AVR_ATMEGA_H
13 
14 #include "hw/char/avr_usart.h"
15 #include "hw/timer/avr_timer16.h"
16 #include "hw/misc/avr_power.h"
17 #include "target/avr/cpu.h"
18 
19 #define TYPE_ATMEGA_MCU     "ATmega"
20 #define TYPE_ATMEGA168_MCU  "ATmega168"
21 #define TYPE_ATMEGA328_MCU  "ATmega328"
22 #define TYPE_ATMEGA1280_MCU "ATmega1280"
23 #define TYPE_ATMEGA2560_MCU "ATmega2560"
24 
25 #define ATMEGA_MCU(obj) OBJECT_CHECK(AtmegaMcuState, (obj), TYPE_ATMEGA_MCU)
26 
27 #define POWER_MAX 2
28 #define USART_MAX 4
29 #define TIMER_MAX 6
30 #define GPIO_MAX 12
31 
32 typedef struct AtmegaMcuState {
33     /*< private >*/
34     SysBusDevice parent_obj;
35     /*< public >*/
36 
37     AVRCPU cpu;
38     MemoryRegion flash;
39     MemoryRegion eeprom;
40     MemoryRegion sram;
41     DeviceState *io;
42     AVRMaskState pwr[POWER_MAX];
43     AVRUsartState usart[USART_MAX];
44     AVRTimer16State timer[TIMER_MAX];
45     uint64_t xtal_freq_hz;
46 } AtmegaMcuState;
47 
48 #endif /* HW_AVR_ATMEGA_H */
49