1 /* 2 * QEMU ES1370 emulation 3 * 4 * Copyright (c) 2005 Vassili Karpov (malc) 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 /* #define DEBUG_ES1370 */ 26 /* #define VERBOSE_ES1370 */ 27 #define SILENT_ES1370 28 29 #include "qemu/osdep.h" 30 #include "hw/audio/soundhw.h" 31 #include "audio/audio.h" 32 #include "hw/pci/pci.h" 33 #include "migration/vmstate.h" 34 #include "qemu/module.h" 35 #include "sysemu/dma.h" 36 37 /* Missing stuff: 38 SCTRL_P[12](END|ST)INC 39 SCTRL_P1SCTRLD 40 SCTRL_P2DACSEN 41 CTRL_DAC_SYNC 42 MIDI 43 non looped mode 44 surely more 45 */ 46 47 /* 48 Following macros and samplerate array were copied verbatim from 49 Linux kernel 2.4.30: drivers/sound/es1370.c 50 51 Copyright (C) 1998-2001, 2003 Thomas Sailer (t.sailer@alumni.ethz.ch) 52 */ 53 54 /* Start blatant GPL violation */ 55 56 #define ES1370_REG_CONTROL 0x00 57 #define ES1370_REG_STATUS 0x04 58 #define ES1370_REG_UART_DATA 0x08 59 #define ES1370_REG_UART_STATUS 0x09 60 #define ES1370_REG_UART_CONTROL 0x09 61 #define ES1370_REG_UART_TEST 0x0a 62 #define ES1370_REG_MEMPAGE 0x0c 63 #define ES1370_REG_CODEC 0x10 64 #define ES1370_REG_SERIAL_CONTROL 0x20 65 #define ES1370_REG_DAC1_SCOUNT 0x24 66 #define ES1370_REG_DAC2_SCOUNT 0x28 67 #define ES1370_REG_ADC_SCOUNT 0x2c 68 69 #define ES1370_REG_DAC1_FRAMEADR 0xc30 70 #define ES1370_REG_DAC1_FRAMECNT 0xc34 71 #define ES1370_REG_DAC2_FRAMEADR 0xc38 72 #define ES1370_REG_DAC2_FRAMECNT 0xc3c 73 #define ES1370_REG_ADC_FRAMEADR 0xd30 74 #define ES1370_REG_ADC_FRAMECNT 0xd34 75 #define ES1370_REG_PHANTOM_FRAMEADR 0xd38 76 #define ES1370_REG_PHANTOM_FRAMECNT 0xd3c 77 78 static const unsigned dac1_samplerate[] = { 5512, 11025, 22050, 44100 }; 79 80 #define DAC2_SRTODIV(x) (((1411200+(x)/2)/(x))-2) 81 #define DAC2_DIVTOSR(x) (1411200/((x)+2)) 82 83 #define CTRL_ADC_STOP 0x80000000 /* 1 = ADC stopped */ 84 #define CTRL_XCTL1 0x40000000 /* electret mic bias */ 85 #define CTRL_OPEN 0x20000000 /* no function, can be read and written */ 86 #define CTRL_PCLKDIV 0x1fff0000 /* ADC/DAC2 clock divider */ 87 #define CTRL_SH_PCLKDIV 16 88 #define CTRL_MSFMTSEL 0x00008000 /* MPEG serial data fmt: 0 = Sony, 1 = I2S */ 89 #define CTRL_M_SBB 0x00004000 /* DAC2 clock: 0 = PCLKDIV, 1 = MPEG */ 90 #define CTRL_WTSRSEL 0x00003000 /* DAC1 clock freq: 0=5512, 1=11025, 2=22050, 3=44100 */ 91 #define CTRL_SH_WTSRSEL 12 92 #define CTRL_DAC_SYNC 0x00000800 /* 1 = DAC2 runs off DAC1 clock */ 93 #define CTRL_CCB_INTRM 0x00000400 /* 1 = CCB "voice" ints enabled */ 94 #define CTRL_M_CB 0x00000200 /* recording source: 0 = ADC, 1 = MPEG */ 95 #define CTRL_XCTL0 0x00000100 /* 0 = Line in, 1 = Line out */ 96 #define CTRL_BREQ 0x00000080 /* 1 = test mode (internal mem test) */ 97 #define CTRL_DAC1_EN 0x00000040 /* enable DAC1 */ 98 #define CTRL_DAC2_EN 0x00000020 /* enable DAC2 */ 99 #define CTRL_ADC_EN 0x00000010 /* enable ADC */ 100 #define CTRL_UART_EN 0x00000008 /* enable MIDI uart */ 101 #define CTRL_JYSTK_EN 0x00000004 /* enable Joystick port (presumably at address 0x200) */ 102 #define CTRL_CDC_EN 0x00000002 /* enable serial (CODEC) interface */ 103 #define CTRL_SERR_DIS 0x00000001 /* 1 = disable PCI SERR signal */ 104 105 #define STAT_INTR 0x80000000 /* wired or of all interrupt bits */ 106 #define STAT_CSTAT 0x00000400 /* 1 = codec busy or codec write in progress */ 107 #define STAT_CBUSY 0x00000200 /* 1 = codec busy */ 108 #define STAT_CWRIP 0x00000100 /* 1 = codec write in progress */ 109 #define STAT_VC 0x00000060 /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */ 110 #define STAT_SH_VC 5 111 #define STAT_MCCB 0x00000010 /* CCB int pending */ 112 #define STAT_UART 0x00000008 /* UART int pending */ 113 #define STAT_DAC1 0x00000004 /* DAC1 int pending */ 114 #define STAT_DAC2 0x00000002 /* DAC2 int pending */ 115 #define STAT_ADC 0x00000001 /* ADC int pending */ 116 117 #define USTAT_RXINT 0x80 /* UART rx int pending */ 118 #define USTAT_TXINT 0x04 /* UART tx int pending */ 119 #define USTAT_TXRDY 0x02 /* UART tx ready */ 120 #define USTAT_RXRDY 0x01 /* UART rx ready */ 121 122 #define UCTRL_RXINTEN 0x80 /* 1 = enable RX ints */ 123 #define UCTRL_TXINTEN 0x60 /* TX int enable field mask */ 124 #define UCTRL_ENA_TXINT 0x20 /* enable TX int */ 125 #define UCTRL_CNTRL 0x03 /* control field */ 126 #define UCTRL_CNTRL_SWR 0x03 /* software reset command */ 127 128 #define SCTRL_P2ENDINC 0x00380000 /* */ 129 #define SCTRL_SH_P2ENDINC 19 130 #define SCTRL_P2STINC 0x00070000 /* */ 131 #define SCTRL_SH_P2STINC 16 132 #define SCTRL_R1LOOPSEL 0x00008000 /* 0 = loop mode */ 133 #define SCTRL_P2LOOPSEL 0x00004000 /* 0 = loop mode */ 134 #define SCTRL_P1LOOPSEL 0x00002000 /* 0 = loop mode */ 135 #define SCTRL_P2PAUSE 0x00001000 /* 1 = pause mode */ 136 #define SCTRL_P1PAUSE 0x00000800 /* 1 = pause mode */ 137 #define SCTRL_R1INTEN 0x00000400 /* enable interrupt */ 138 #define SCTRL_P2INTEN 0x00000200 /* enable interrupt */ 139 #define SCTRL_P1INTEN 0x00000100 /* enable interrupt */ 140 #define SCTRL_P1SCTRLD 0x00000080 /* reload sample count register for DAC1 */ 141 #define SCTRL_P2DACSEN 0x00000040 /* 1 = DAC2 play back last sample when disabled */ 142 #define SCTRL_R1SEB 0x00000020 /* 1 = 16bit */ 143 #define SCTRL_R1SMB 0x00000010 /* 1 = stereo */ 144 #define SCTRL_R1FMT 0x00000030 /* format mask */ 145 #define SCTRL_SH_R1FMT 4 146 #define SCTRL_P2SEB 0x00000008 /* 1 = 16bit */ 147 #define SCTRL_P2SMB 0x00000004 /* 1 = stereo */ 148 #define SCTRL_P2FMT 0x0000000c /* format mask */ 149 #define SCTRL_SH_P2FMT 2 150 #define SCTRL_P1SEB 0x00000002 /* 1 = 16bit */ 151 #define SCTRL_P1SMB 0x00000001 /* 1 = stereo */ 152 #define SCTRL_P1FMT 0x00000003 /* format mask */ 153 #define SCTRL_SH_P1FMT 0 154 155 /* End blatant GPL violation */ 156 157 #define NB_CHANNELS 3 158 #define DAC1_CHANNEL 0 159 #define DAC2_CHANNEL 1 160 #define ADC_CHANNEL 2 161 162 static void es1370_dac1_callback (void *opaque, int free); 163 static void es1370_dac2_callback (void *opaque, int free); 164 static void es1370_adc_callback (void *opaque, int avail); 165 166 #ifdef DEBUG_ES1370 167 168 #define ldebug(...) AUD_log ("es1370", __VA_ARGS__) 169 170 static void print_ctl (uint32_t val) 171 { 172 char buf[1024]; 173 174 buf[0] = '\0'; 175 #define a(n) if (val & CTRL_##n) strcat (buf, " "#n) 176 a (ADC_STOP); 177 a (XCTL1); 178 a (OPEN); 179 a (MSFMTSEL); 180 a (M_SBB); 181 a (DAC_SYNC); 182 a (CCB_INTRM); 183 a (M_CB); 184 a (XCTL0); 185 a (BREQ); 186 a (DAC1_EN); 187 a (DAC2_EN); 188 a (ADC_EN); 189 a (UART_EN); 190 a (JYSTK_EN); 191 a (CDC_EN); 192 a (SERR_DIS); 193 #undef a 194 AUD_log ("es1370", "ctl - PCLKDIV %d(DAC2 freq %d), freq %d,%s\n", 195 (val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV, 196 DAC2_DIVTOSR ((val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV), 197 dac1_samplerate[(val & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL], 198 buf); 199 } 200 201 static void print_sctl (uint32_t val) 202 { 203 static const char *fmt_names[] = {"8M", "8S", "16M", "16S"}; 204 char buf[1024]; 205 206 buf[0] = '\0'; 207 208 #define a(n) if (val & SCTRL_##n) strcat (buf, " "#n) 209 #define b(n) if (!(val & SCTRL_##n)) strcat (buf, " "#n) 210 b (R1LOOPSEL); 211 b (P2LOOPSEL); 212 b (P1LOOPSEL); 213 a (P2PAUSE); 214 a (P1PAUSE); 215 a (R1INTEN); 216 a (P2INTEN); 217 a (P1INTEN); 218 a (P1SCTRLD); 219 a (P2DACSEN); 220 if (buf[0]) { 221 strcat (buf, "\n "); 222 } 223 else { 224 buf[0] = ' '; 225 buf[1] = '\0'; 226 } 227 #undef b 228 #undef a 229 AUD_log ("es1370", 230 "%s" 231 "p2_end_inc %d, p2_st_inc %d, r1_fmt %s, p2_fmt %s, p1_fmt %s\n", 232 buf, 233 (val & SCTRL_P2ENDINC) >> SCTRL_SH_P2ENDINC, 234 (val & SCTRL_P2STINC) >> SCTRL_SH_P2STINC, 235 fmt_names [(val >> SCTRL_SH_R1FMT) & 3], 236 fmt_names [(val >> SCTRL_SH_P2FMT) & 3], 237 fmt_names [(val >> SCTRL_SH_P1FMT) & 3] 238 ); 239 } 240 #else 241 #define ldebug(...) 242 #define print_ctl(...) 243 #define print_sctl(...) 244 #endif 245 246 #ifdef VERBOSE_ES1370 247 #define dolog(...) AUD_log ("es1370", __VA_ARGS__) 248 #else 249 #define dolog(...) 250 #endif 251 252 #ifndef SILENT_ES1370 253 #define lwarn(...) AUD_log ("es1370: warning", __VA_ARGS__) 254 #else 255 #define lwarn(...) 256 #endif 257 258 struct chan { 259 uint32_t shift; 260 uint32_t leftover; 261 uint32_t scount; 262 uint32_t frame_addr; 263 uint32_t frame_cnt; 264 }; 265 266 typedef struct ES1370State { 267 PCIDevice dev; 268 QEMUSoundCard card; 269 MemoryRegion io; 270 struct chan chan[NB_CHANNELS]; 271 SWVoiceOut *dac_voice[2]; 272 SWVoiceIn *adc_voice; 273 274 uint32_t ctl; 275 uint32_t status; 276 uint32_t mempage; 277 uint32_t codec; 278 uint32_t sctl; 279 } ES1370State; 280 281 struct chan_bits { 282 uint32_t ctl_en; 283 uint32_t stat_int; 284 uint32_t sctl_pause; 285 uint32_t sctl_inten; 286 uint32_t sctl_fmt; 287 uint32_t sctl_sh_fmt; 288 uint32_t sctl_loopsel; 289 void (*calc_freq) (ES1370State *s, uint32_t ctl, 290 uint32_t *old_freq, uint32_t *new_freq); 291 }; 292 293 #define TYPE_ES1370 "ES1370" 294 #define ES1370(obj) \ 295 OBJECT_CHECK(ES1370State, (obj), TYPE_ES1370) 296 297 static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl, 298 uint32_t *old_freq, uint32_t *new_freq); 299 static void es1370_dac2_and_adc_calc_freq (ES1370State *s, uint32_t ctl, 300 uint32_t *old_freq, 301 uint32_t *new_freq); 302 303 static const struct chan_bits es1370_chan_bits[] = { 304 {CTRL_DAC1_EN, STAT_DAC1, SCTRL_P1PAUSE, SCTRL_P1INTEN, 305 SCTRL_P1FMT, SCTRL_SH_P1FMT, SCTRL_P1LOOPSEL, 306 es1370_dac1_calc_freq}, 307 308 {CTRL_DAC2_EN, STAT_DAC2, SCTRL_P2PAUSE, SCTRL_P2INTEN, 309 SCTRL_P2FMT, SCTRL_SH_P2FMT, SCTRL_P2LOOPSEL, 310 es1370_dac2_and_adc_calc_freq}, 311 312 {CTRL_ADC_EN, STAT_ADC, 0, SCTRL_R1INTEN, 313 SCTRL_R1FMT, SCTRL_SH_R1FMT, SCTRL_R1LOOPSEL, 314 es1370_dac2_and_adc_calc_freq} 315 }; 316 317 static void es1370_update_status (ES1370State *s, uint32_t new_status) 318 { 319 uint32_t level = new_status & (STAT_DAC1 | STAT_DAC2 | STAT_ADC); 320 321 if (level) { 322 s->status = new_status | STAT_INTR; 323 } 324 else { 325 s->status = new_status & ~STAT_INTR; 326 } 327 pci_set_irq(&s->dev, !!level); 328 } 329 330 static void es1370_reset (ES1370State *s) 331 { 332 size_t i; 333 334 s->ctl = 1; 335 s->status = 0x60; 336 s->mempage = 0; 337 s->codec = 0; 338 s->sctl = 0; 339 340 for (i = 0; i < NB_CHANNELS; ++i) { 341 struct chan *d = &s->chan[i]; 342 d->scount = 0; 343 d->leftover = 0; 344 if (i == ADC_CHANNEL) { 345 AUD_close_in (&s->card, s->adc_voice); 346 s->adc_voice = NULL; 347 } 348 else { 349 AUD_close_out (&s->card, s->dac_voice[i]); 350 s->dac_voice[i] = NULL; 351 } 352 } 353 pci_irq_deassert(&s->dev); 354 } 355 356 static void es1370_maybe_lower_irq (ES1370State *s, uint32_t sctl) 357 { 358 uint32_t new_status = s->status; 359 360 if (!(sctl & SCTRL_P1INTEN) && (s->sctl & SCTRL_P1INTEN)) { 361 new_status &= ~STAT_DAC1; 362 } 363 364 if (!(sctl & SCTRL_P2INTEN) && (s->sctl & SCTRL_P2INTEN)) { 365 new_status &= ~STAT_DAC2; 366 } 367 368 if (!(sctl & SCTRL_R1INTEN) && (s->sctl & SCTRL_R1INTEN)) { 369 new_status &= ~STAT_ADC; 370 } 371 372 if (new_status != s->status) { 373 es1370_update_status (s, new_status); 374 } 375 } 376 377 static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl, 378 uint32_t *old_freq, uint32_t *new_freq) 379 380 { 381 *old_freq = dac1_samplerate[(s->ctl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL]; 382 *new_freq = dac1_samplerate[(ctl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL]; 383 } 384 385 static void es1370_dac2_and_adc_calc_freq (ES1370State *s, uint32_t ctl, 386 uint32_t *old_freq, 387 uint32_t *new_freq) 388 389 { 390 uint32_t old_pclkdiv, new_pclkdiv; 391 392 new_pclkdiv = (ctl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV; 393 old_pclkdiv = (s->ctl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV; 394 *new_freq = DAC2_DIVTOSR (new_pclkdiv); 395 *old_freq = DAC2_DIVTOSR (old_pclkdiv); 396 } 397 398 static void es1370_update_voices (ES1370State *s, uint32_t ctl, uint32_t sctl) 399 { 400 size_t i; 401 uint32_t old_freq, new_freq, old_fmt, new_fmt; 402 403 for (i = 0; i < NB_CHANNELS; ++i) { 404 struct chan *d = &s->chan[i]; 405 const struct chan_bits *b = &es1370_chan_bits[i]; 406 407 new_fmt = (sctl & b->sctl_fmt) >> b->sctl_sh_fmt; 408 old_fmt = (s->sctl & b->sctl_fmt) >> b->sctl_sh_fmt; 409 410 b->calc_freq (s, ctl, &old_freq, &new_freq); 411 412 if ((old_fmt != new_fmt) || (old_freq != new_freq)) { 413 d->shift = (new_fmt & 1) + (new_fmt >> 1); 414 ldebug ("channel %zu, freq = %d, nchannels %d, fmt %d, shift %d\n", 415 i, 416 new_freq, 417 1 << (new_fmt & 1), 418 (new_fmt & 2) ? AUDIO_FORMAT_S16 : AUDIO_FORMAT_U8, 419 d->shift); 420 if (new_freq) { 421 struct audsettings as; 422 423 as.freq = new_freq; 424 as.nchannels = 1 << (new_fmt & 1); 425 as.fmt = (new_fmt & 2) ? AUDIO_FORMAT_S16 : AUDIO_FORMAT_U8; 426 as.endianness = 0; 427 428 if (i == ADC_CHANNEL) { 429 s->adc_voice = 430 AUD_open_in ( 431 &s->card, 432 s->adc_voice, 433 "es1370.adc", 434 s, 435 es1370_adc_callback, 436 &as 437 ); 438 } 439 else { 440 s->dac_voice[i] = 441 AUD_open_out ( 442 &s->card, 443 s->dac_voice[i], 444 i ? "es1370.dac2" : "es1370.dac1", 445 s, 446 i ? es1370_dac2_callback : es1370_dac1_callback, 447 &as 448 ); 449 } 450 } 451 } 452 453 if (((ctl ^ s->ctl) & b->ctl_en) 454 || ((sctl ^ s->sctl) & b->sctl_pause)) { 455 int on = (ctl & b->ctl_en) && !(sctl & b->sctl_pause); 456 457 if (i == ADC_CHANNEL) { 458 AUD_set_active_in (s->adc_voice, on); 459 } 460 else { 461 AUD_set_active_out (s->dac_voice[i], on); 462 } 463 } 464 } 465 466 s->ctl = ctl; 467 s->sctl = sctl; 468 } 469 470 static inline uint32_t es1370_fixup (ES1370State *s, uint32_t addr) 471 { 472 addr &= 0xff; 473 if (addr >= 0x30 && addr <= 0x3f) 474 addr |= s->mempage << 8; 475 return addr; 476 } 477 478 static void es1370_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) 479 { 480 ES1370State *s = opaque; 481 struct chan *d = &s->chan[0]; 482 483 addr = es1370_fixup (s, addr); 484 485 switch (addr) { 486 case ES1370_REG_CONTROL: 487 es1370_update_voices (s, val, s->sctl); 488 print_ctl (val); 489 break; 490 491 case ES1370_REG_MEMPAGE: 492 s->mempage = val & 0xf; 493 break; 494 495 case ES1370_REG_SERIAL_CONTROL: 496 es1370_maybe_lower_irq (s, val); 497 es1370_update_voices (s, s->ctl, val); 498 print_sctl (val); 499 break; 500 501 case ES1370_REG_DAC1_SCOUNT: 502 case ES1370_REG_DAC2_SCOUNT: 503 case ES1370_REG_ADC_SCOUNT: 504 d += (addr - ES1370_REG_DAC1_SCOUNT) >> 2; 505 d->scount = (val & 0xffff) | (d->scount & ~0xffff); 506 ldebug ("chan %td CURR_SAMP_CT %d, SAMP_CT %d\n", 507 d - &s->chan[0], val >> 16, (val & 0xffff)); 508 break; 509 510 case ES1370_REG_ADC_FRAMEADR: 511 d += 2; 512 goto frameadr; 513 case ES1370_REG_DAC1_FRAMEADR: 514 case ES1370_REG_DAC2_FRAMEADR: 515 d += (addr - ES1370_REG_DAC1_FRAMEADR) >> 3; 516 frameadr: 517 d->frame_addr = val; 518 ldebug ("chan %td frame address %#x\n", d - &s->chan[0], val); 519 break; 520 521 case ES1370_REG_PHANTOM_FRAMECNT: 522 lwarn ("writing to phantom frame count %#x\n", val); 523 break; 524 case ES1370_REG_PHANTOM_FRAMEADR: 525 lwarn ("writing to phantom frame address %#x\n", val); 526 break; 527 528 case ES1370_REG_ADC_FRAMECNT: 529 d += 2; 530 goto framecnt; 531 case ES1370_REG_DAC1_FRAMECNT: 532 case ES1370_REG_DAC2_FRAMECNT: 533 d += (addr - ES1370_REG_DAC1_FRAMECNT) >> 3; 534 framecnt: 535 d->frame_cnt = val; 536 d->leftover = 0; 537 ldebug ("chan %td frame count %d, buffer size %d\n", 538 d - &s->chan[0], val >> 16, val & 0xffff); 539 break; 540 541 default: 542 lwarn ("writel %#x <- %#x\n", addr, val); 543 break; 544 } 545 } 546 547 static uint64_t es1370_read(void *opaque, hwaddr addr, unsigned size) 548 { 549 ES1370State *s = opaque; 550 uint32_t val; 551 struct chan *d = &s->chan[0]; 552 553 addr = es1370_fixup (s, addr); 554 555 switch (addr) { 556 case ES1370_REG_CONTROL: 557 val = s->ctl; 558 break; 559 case ES1370_REG_STATUS: 560 val = s->status; 561 break; 562 case ES1370_REG_MEMPAGE: 563 val = s->mempage; 564 break; 565 case ES1370_REG_CODEC: 566 val = s->codec; 567 break; 568 case ES1370_REG_SERIAL_CONTROL: 569 val = s->sctl; 570 break; 571 572 case ES1370_REG_DAC1_SCOUNT: 573 case ES1370_REG_DAC2_SCOUNT: 574 case ES1370_REG_ADC_SCOUNT: 575 d += (addr - ES1370_REG_DAC1_SCOUNT) >> 2; 576 val = d->scount; 577 #ifdef DEBUG_ES1370 578 { 579 uint32_t curr_count = d->scount >> 16; 580 uint32_t count = d->scount & 0xffff; 581 582 curr_count <<= d->shift; 583 count <<= d->shift; 584 dolog ("read scount curr %d, total %d\n", curr_count, count); 585 } 586 #endif 587 break; 588 589 case ES1370_REG_ADC_FRAMECNT: 590 d += 2; 591 goto framecnt; 592 case ES1370_REG_DAC1_FRAMECNT: 593 case ES1370_REG_DAC2_FRAMECNT: 594 d += (addr - ES1370_REG_DAC1_FRAMECNT) >> 3; 595 framecnt: 596 val = d->frame_cnt; 597 #ifdef DEBUG_ES1370 598 { 599 uint32_t size = ((d->frame_cnt & 0xffff) + 1) << 2; 600 uint32_t curr = ((d->frame_cnt >> 16) + 1) << 2; 601 if (curr > size) { 602 dolog ("read framecnt curr %d, size %d %d\n", curr, size, 603 curr > size); 604 } 605 } 606 #endif 607 break; 608 609 case ES1370_REG_ADC_FRAMEADR: 610 d += 2; 611 goto frameadr; 612 case ES1370_REG_DAC1_FRAMEADR: 613 case ES1370_REG_DAC2_FRAMEADR: 614 d += (addr - ES1370_REG_DAC1_FRAMEADR) >> 3; 615 frameadr: 616 val = d->frame_addr; 617 break; 618 619 case ES1370_REG_PHANTOM_FRAMECNT: 620 val = ~0U; 621 lwarn ("reading from phantom frame count\n"); 622 break; 623 case ES1370_REG_PHANTOM_FRAMEADR: 624 val = ~0U; 625 lwarn ("reading from phantom frame address\n"); 626 break; 627 628 default: 629 val = ~0U; 630 lwarn ("readl %#x -> %#x\n", addr, val); 631 break; 632 } 633 return val; 634 } 635 636 static void es1370_transfer_audio (ES1370State *s, struct chan *d, int loop_sel, 637 int max, int *irq) 638 { 639 uint8_t tmpbuf[4096]; 640 uint32_t addr = d->frame_addr; 641 int sc = d->scount & 0xffff; 642 int csc = d->scount >> 16; 643 int csc_bytes = (csc + 1) << d->shift; 644 int cnt = d->frame_cnt >> 16; 645 int size = d->frame_cnt & 0xffff; 646 if (size < cnt) { 647 return; 648 } 649 int left = ((size - cnt + 1) << 2) + d->leftover; 650 int transferred = 0; 651 int temp = MIN (max, MIN (left, csc_bytes)); 652 int index = d - &s->chan[0]; 653 654 addr += (cnt << 2) + d->leftover; 655 656 if (index == ADC_CHANNEL) { 657 while (temp > 0) { 658 int acquired, to_copy; 659 660 to_copy = MIN ((size_t) temp, sizeof (tmpbuf)); 661 acquired = AUD_read (s->adc_voice, tmpbuf, to_copy); 662 if (!acquired) 663 break; 664 665 pci_dma_write (&s->dev, addr, tmpbuf, acquired); 666 667 temp -= acquired; 668 addr += acquired; 669 transferred += acquired; 670 } 671 } 672 else { 673 SWVoiceOut *voice = s->dac_voice[index]; 674 675 while (temp > 0) { 676 int copied, to_copy; 677 678 to_copy = MIN ((size_t) temp, sizeof (tmpbuf)); 679 pci_dma_read (&s->dev, addr, tmpbuf, to_copy); 680 copied = AUD_write (voice, tmpbuf, to_copy); 681 if (!copied) 682 break; 683 temp -= copied; 684 addr += copied; 685 transferred += copied; 686 } 687 } 688 689 if (csc_bytes == transferred) { 690 *irq = 1; 691 d->scount = sc | (sc << 16); 692 ldebug ("sc = %d, rate = %f\n", 693 (sc + 1) << d->shift, 694 (sc + 1) / (double) 44100); 695 } 696 else { 697 *irq = 0; 698 d->scount = sc | (((csc_bytes - transferred - 1) >> d->shift) << 16); 699 } 700 701 cnt += (transferred + d->leftover) >> 2; 702 703 if (s->sctl & loop_sel) { 704 /* Bah, how stupid is that having a 0 represent true value? 705 i just spent few hours on this shit */ 706 AUD_log ("es1370: warning", "non looping mode\n"); 707 } 708 else { 709 d->frame_cnt = size; 710 711 if ((uint32_t) cnt <= d->frame_cnt) 712 d->frame_cnt |= cnt << 16; 713 } 714 715 d->leftover = (transferred + d->leftover) & 3; 716 } 717 718 static void es1370_run_channel (ES1370State *s, size_t chan, int free_or_avail) 719 { 720 uint32_t new_status = s->status; 721 int max_bytes, irq; 722 struct chan *d = &s->chan[chan]; 723 const struct chan_bits *b = &es1370_chan_bits[chan]; 724 725 if (!(s->ctl & b->ctl_en) || (s->sctl & b->sctl_pause)) { 726 return; 727 } 728 729 max_bytes = free_or_avail; 730 max_bytes &= ~((1 << d->shift) - 1); 731 if (!max_bytes) { 732 return; 733 } 734 735 es1370_transfer_audio (s, d, b->sctl_loopsel, max_bytes, &irq); 736 737 if (irq) { 738 if (s->sctl & b->sctl_inten) { 739 new_status |= b->stat_int; 740 } 741 } 742 743 if (new_status != s->status) { 744 es1370_update_status (s, new_status); 745 } 746 } 747 748 static void es1370_dac1_callback (void *opaque, int free) 749 { 750 ES1370State *s = opaque; 751 752 es1370_run_channel (s, DAC1_CHANNEL, free); 753 } 754 755 static void es1370_dac2_callback (void *opaque, int free) 756 { 757 ES1370State *s = opaque; 758 759 es1370_run_channel (s, DAC2_CHANNEL, free); 760 } 761 762 static void es1370_adc_callback (void *opaque, int avail) 763 { 764 ES1370State *s = opaque; 765 766 es1370_run_channel (s, ADC_CHANNEL, avail); 767 } 768 769 static const MemoryRegionOps es1370_io_ops = { 770 .read = es1370_read, 771 .write = es1370_write, 772 .valid = { 773 .min_access_size = 1, 774 .max_access_size = 4, 775 }, 776 .impl = { 777 .min_access_size = 4, 778 .max_access_size = 4, 779 }, 780 .endianness = DEVICE_LITTLE_ENDIAN, 781 }; 782 783 static const VMStateDescription vmstate_es1370_channel = { 784 .name = "es1370_channel", 785 .version_id = 2, 786 .minimum_version_id = 2, 787 .fields = (VMStateField[]) { 788 VMSTATE_UINT32 (shift, struct chan), 789 VMSTATE_UINT32 (leftover, struct chan), 790 VMSTATE_UINT32 (scount, struct chan), 791 VMSTATE_UINT32 (frame_addr, struct chan), 792 VMSTATE_UINT32 (frame_cnt, struct chan), 793 VMSTATE_END_OF_LIST () 794 } 795 }; 796 797 static int es1370_post_load (void *opaque, int version_id) 798 { 799 uint32_t ctl, sctl; 800 ES1370State *s = opaque; 801 size_t i; 802 803 for (i = 0; i < NB_CHANNELS; ++i) { 804 if (i == ADC_CHANNEL) { 805 if (s->adc_voice) { 806 AUD_close_in (&s->card, s->adc_voice); 807 s->adc_voice = NULL; 808 } 809 } 810 else { 811 if (s->dac_voice[i]) { 812 AUD_close_out (&s->card, s->dac_voice[i]); 813 s->dac_voice[i] = NULL; 814 } 815 } 816 } 817 818 ctl = s->ctl; 819 sctl = s->sctl; 820 s->ctl = 0; 821 s->sctl = 0; 822 es1370_update_voices (s, ctl, sctl); 823 return 0; 824 } 825 826 static const VMStateDescription vmstate_es1370 = { 827 .name = "es1370", 828 .version_id = 2, 829 .minimum_version_id = 2, 830 .post_load = es1370_post_load, 831 .fields = (VMStateField[]) { 832 VMSTATE_PCI_DEVICE (dev, ES1370State), 833 VMSTATE_STRUCT_ARRAY (chan, ES1370State, NB_CHANNELS, 2, 834 vmstate_es1370_channel, struct chan), 835 VMSTATE_UINT32 (ctl, ES1370State), 836 VMSTATE_UINT32 (status, ES1370State), 837 VMSTATE_UINT32 (mempage, ES1370State), 838 VMSTATE_UINT32 (codec, ES1370State), 839 VMSTATE_UINT32 (sctl, ES1370State), 840 VMSTATE_END_OF_LIST () 841 } 842 }; 843 844 static void es1370_on_reset(DeviceState *dev) 845 { 846 ES1370State *s = container_of(dev, ES1370State, dev.qdev); 847 es1370_reset (s); 848 } 849 850 static void es1370_realize(PCIDevice *dev, Error **errp) 851 { 852 ES1370State *s = ES1370(dev); 853 uint8_t *c = s->dev.config; 854 855 c[PCI_STATUS + 1] = PCI_STATUS_DEVSEL_SLOW >> 8; 856 857 #if 0 858 c[PCI_CAPABILITY_LIST] = 0xdc; 859 c[PCI_INTERRUPT_LINE] = 10; 860 c[0xdc] = 0x00; 861 #endif 862 863 c[PCI_INTERRUPT_PIN] = 1; 864 c[PCI_MIN_GNT] = 0x0c; 865 c[PCI_MAX_LAT] = 0x80; 866 867 memory_region_init_io (&s->io, OBJECT(s), &es1370_io_ops, s, "es1370", 256); 868 pci_register_bar (&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io); 869 870 AUD_register_card ("es1370", &s->card); 871 es1370_reset (s); 872 } 873 874 static void es1370_exit(PCIDevice *dev) 875 { 876 ES1370State *s = ES1370(dev); 877 int i; 878 879 for (i = 0; i < 2; ++i) { 880 AUD_close_out(&s->card, s->dac_voice[i]); 881 } 882 883 AUD_close_in(&s->card, s->adc_voice); 884 AUD_remove_card(&s->card); 885 } 886 887 static int es1370_init (PCIBus *bus) 888 { 889 pci_create_simple (bus, -1, TYPE_ES1370); 890 return 0; 891 } 892 893 static Property es1370_properties[] = { 894 DEFINE_AUDIO_PROPERTIES(ES1370State, card), 895 DEFINE_PROP_END_OF_LIST(), 896 }; 897 898 static void es1370_class_init (ObjectClass *klass, void *data) 899 { 900 DeviceClass *dc = DEVICE_CLASS (klass); 901 PCIDeviceClass *k = PCI_DEVICE_CLASS (klass); 902 903 k->realize = es1370_realize; 904 k->exit = es1370_exit; 905 k->vendor_id = PCI_VENDOR_ID_ENSONIQ; 906 k->device_id = PCI_DEVICE_ID_ENSONIQ_ES1370; 907 k->class_id = PCI_CLASS_MULTIMEDIA_AUDIO; 908 k->subsystem_vendor_id = 0x4942; 909 k->subsystem_id = 0x4c4c; 910 set_bit(DEVICE_CATEGORY_SOUND, dc->categories); 911 dc->desc = "ENSONIQ AudioPCI ES1370"; 912 dc->vmsd = &vmstate_es1370; 913 dc->reset = es1370_on_reset; 914 device_class_set_props(dc, es1370_properties); 915 } 916 917 static const TypeInfo es1370_info = { 918 .name = TYPE_ES1370, 919 .parent = TYPE_PCI_DEVICE, 920 .instance_size = sizeof (ES1370State), 921 .class_init = es1370_class_init, 922 .interfaces = (InterfaceInfo[]) { 923 { INTERFACE_CONVENTIONAL_PCI_DEVICE }, 924 { }, 925 }, 926 }; 927 928 static void es1370_register_types (void) 929 { 930 type_register_static (&es1370_info); 931 pci_register_soundhw("es1370", "ENSONIQ AudioPCI ES1370", es1370_init); 932 } 933 934 type_init (es1370_register_types) 935